| /external/llvm/test/CodeGen/AArch64/ |
| D | dp2.ll | 36 ; CHECK: {{lsr|lsrv}} {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
78 ; CHECK: {{lsr|lsrv}} {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
156 ; CHECK: {{lsr|lsrv}} {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
|
| /external/valgrind/none/tests/arm64/ |
| D | integer.stdout.exp | 1919 lsrv x21,x20,x19 :: rd 00258aa089fbe992 rm 4b154113f7d32514, rn cce230caafbf9cc9, cin 0, nzcv 00000…
1920 lsrv x21,x20,x19 :: rd 0000cf575655c875 rm 33d5d595721d4f13, rn f4509311f443a7ce, cin 0, nzcv 00000…
1921 lsrv x21,x20,x19 :: rd 000004a3c6de6954 rm 4a3c6de6954cbc17, rn 111b21e39fbd7254, cin 0, nzcv 00000…
1922 lsrv x21,x20,x19 :: rd 0000000003eed719 rm fbb5c64ed1b044c6, rn 33ca4c4fb3960326, cin 0, nzcv 00000…
1923 lsrv x21,x20,x19 :: rd 000000000adf164e rm 2b7c5939d7c0f528, rn b73870a5a6630162, cin 0, nzcv 00000…
1924 lsrv x21,x20,x19 :: rd 0017f20c8c562e6d rm 02fe41918ac5cdba, rn 48e0815289728f05, cin 0, nzcv 00000…
1925 lsrv x21,x20,x19 :: rd 0000000000002d82 rm b60a8f381f187bae, rn 008c208cc413ff72, cin 0, nzcv 00000…
1955 lsrv w21,w20,w19 :: rd 00000000007be992 rm 4b154113f7d32514, rn cce230caafbf9cc9, cin 0, nzcv 00000…
1956 lsrv w21,w20,w19 :: rd 000000000001c875 rm 33d5d595721d4f13, rn f4509311f443a7ce, cin 0, nzcv 00000…
1957 lsrv w21,w20,w19 :: rd 0000000000000954 rm 4a3c6de6954cbc17, rn 111b21e39fbd7254, cin 0, nzcv 00000…
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-arithmetic-encoding.s | 402 lsrv w1, w2, w3
403 lsrv x1, x2, x3
|
| D | basic-a64-instructions.s | 1522 lsrv w17, w18, w19
1523 lsrv x20, x21, x22
|
| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 933 lsrv(rd, rn, rm); in Lsr()
|
| D | assembler-arm64.h | 1119 void lsrv(const Register& rd, const Register& rn, const Register& rm);
|
| D | assembler-arm64.cc | 1258 void Assembler::lsrv(const Register& rd, in lsrv() function in v8::internal::Assembler
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 675 void lsrv(const Register& rd, const Register& rn, const Register& rm);
|
| D | macro-assembler-aarch64.h | 1630 lsrv(rd, rn, rm); in Lsr()
|
| D | assembler-aarch64.cc | 563 void Assembler::lsrv(const Register& rd, in lsrv() function in vixl::aarch64::Assembler
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 235 __ lsrv(w19, w20, w21); in GenerateTestSequenceBase() local
236 __ lsrv(x22, x23, x24); in GenerateTestSequenceBase() local
|
| D | test-disasm-aarch64.cc | 916 COMPARE(lsrv(w6, w7, w8), "lsr w6, w7, w8"); in TEST()
917 COMPARE(lsrv(x9, x10, x11), "lsr x9, x10, x11"); in TEST()
|
| D | test-assembler-aarch64.cc | 9484 TEST(lsrv) { in TEST() argument
9502 __ lsrv(x0, x0, xzr); in TEST() local
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 760 void lsrv(const Register& rd, const Register& rn, const Register& rm)
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 711 def : ShiftAlias<"lsrv", LSRVWr, GPR32>;
712 def : ShiftAlias<"lsrv", LSRVXr, GPR64>;
|