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Searched refs:mla (Results 1 – 25 of 84) sorted by relevance

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/external/libavc/common/armv8/
Dih264_inter_pred_filters_luma_vert_av8.s142 mla v14.8h, v12.8h, v22.8h // temp += temp1 * 20
145 mla v20.8h, v18.8h , v22.8h // temp4 += temp3 * 20
152 mla v16.8h, v12.8h , v22.8h
159 mla v14.8h, v12.8h , v22.8h
166 mla v18.8h, v12.8h , v22.8h
173 mla v16.8h, v12.8h , v22.8h
181 mla v14.8h, v12.8h , v22.8h
187 mla v18.8h, v12.8h , v22.8h
201 mla v14.8h, v12.8h , v22.8h // temp += temp1 * 20
205 mla v20.8h, v18.8h , v22.8h // temp4 += temp3 * 20
[all …]
Dih264_inter_pred_luma_vert_qpel_av8.s149 mla v14.8h, v12.8h , v22.8h // temp += temp1 * 20
152 mla v20.8h, v18.8h , v22.8h // temp4 += temp3 * 20
159 mla v16.8h, v12.8h , v22.8h
166 mla v14.8h, v12.8h , v22.8h
175 mla v18.8h, v12.8h , v22.8h
182 mla v16.8h, v12.8h , v22.8h
192 mla v14.8h, v12.8h , v22.8h
198 mla v18.8h, v12.8h , v22.8h
216 mla v14.8h, v12.8h , v22.8h // temp += temp1 * 20
222 mla v20.8h, v18.8h , v22.8h // temp4 += temp3 * 20
[all …]
Dih264_weighted_bi_pred_av8.s179 mla v4.8h, v6.8h , v2.h[2] //weight 2 mult. for rows 1,2
181 mla v8.8h, v10.8h , v2.h[2] //weight 2 mult. for rows 3,4
211 mla v4.8h, v6.8h , v2.h[2] //weight 2 mult. for row 1
215 mla v8.8h, v10.8h , v2.h[2] //weight 2 mult. for row 2
219 mla v12.8h, v14.8h , v2.h[2] //weight 2 mult. for row 3
221 mla v16.8h, v18.8h , v2.h[2] //weight 2 mult. for row 4
257 mla v20.8h, v22.8h , v2.h[2] //weight 2 mult. for row 1L
261 mla v4.8h, v6.8h , v2.h[2] //weight 2 mult. for row 1H
265 mla v24.8h, v26.8h , v2.h[2] //weight 2 mult. for row 2L
269 mla v8.8h, v10.8h , v2.h[2] //weight 2 mult. for row 2H
[all …]
Dih264_inter_pred_luma_horz_hpel_vert_hpel_av8.s117 mla v18.8h, v20.8h , v28.8h
121 mla v20.8h, v24.8h , v28.8h
127 mla v22.8h, v24.8h , v28.8h
198 mla v18.8h, v20.8h , v28.8h
202 mla v20.8h, v24.8h , v28.8h
208 mla v22.8h, v24.8h , v28.8h
277 mla v18.8h, v20.8h , v28.8h
281 mla v20.8h, v24.8h , v28.8h
287 mla v22.8h, v24.8h , v28.8h
359 mla v18.8h, v20.8h , v28.8h
[all …]
Dih264_inter_pred_luma_horz_hpel_vert_qpel_av8.s171 mla v6.8h, v8.8h , v22.8h
185 mla v8.8h, v10.8h , v22.8h
199 mla v10.8h, v12.8h , v22.8h
213 mla v12.8h, v14.8h , v22.8h
227 mla v14.8h, v16.8h , v22.8h
244 mla v16.8h, v18.8h , v22.8h
272 mla v20.8h, v2.8h , v22.8h
315 mla v8.8h, v2.8h , v22.8h
353 mla v28.8h, v2.8h , v22.8h
419 mla v6.8h, v8.8h , v22.8h
[all …]
Dih264_inter_pred_luma_horz_qpel_vert_hpel_av8.s179 mla v18.8h, v20.8h , v28.8h
183 mla v20.8h, v24.8h , v28.8h
189 mla v22.8h, v24.8h , v28.8h
266 mla v18.8h, v20.8h , v28.8h
270 mla v20.8h, v24.8h , v28.8h
276 mla v22.8h, v24.8h , v28.8h
350 mla v18.8h, v20.8h , v28.8h
354 mla v20.8h, v24.8h , v28.8h
360 mla v22.8h, v24.8h , v28.8h
437 mla v18.8h, v20.8h , v28.8h
[all …]
Dih264_deblk_luma_av8.s369 mla v12.8h, v8.8h , v1.h[0] //(p0+q0+p1)+3*p2+2*p3 L
370 mla v4.8h, v16.8h , v1.h[0] //(p0+q0+p1)+3*p2+2*p3 H
883 mla v24.8h, v20.8h , v28.8h //p2 + X2(p1) + X2(p0) + X2(q0) + q1 L
884 mla v26.8h, v22.8h , v28.8h //p2 + X2(p1) + X2(p0) + X2(q0) + q1 H
959 mla v14.8h, v18.8h , v28.8h //p1 + X2(p0) + X2(q0) + X2(q1) + q2L
961 mla v4.8h, v26.8h , v28.8h //p1 + X2(p0) + X2(q0) + X2(q1) + q2H
994 mla v18.8h, v16.8h , v28.8h //X2(q3) + X3(q2) + q1 + q0 + p0 L
998 mla v26.8h, v4.8h , v28.8h //X2(q3) + X3(q2) + q1 + q0 + p0 H
/external/capstone/suite/MC/AArch64/
Dneon-mla-mls-instructions.s.cs2 0x20,0x94,0x22,0x0e = mla v0.8b, v1.8b, v2.8b
3 0x20,0x94,0x22,0x4e = mla v0.16b, v1.16b, v2.16b
4 0x20,0x94,0x62,0x0e = mla v0.4h, v1.4h, v2.4h
5 0x20,0x94,0x62,0x4e = mla v0.8h, v1.8h, v2.8h
6 0x20,0x94,0xa2,0x0e = mla v0.2s, v1.2s, v2.2s
7 0x20,0x94,0xa2,0x4e = mla v0.4s, v1.4s, v2.4s
Dneon-2velem.s.cs2 0x20,0x08,0x82,0x2f = mla v0.2s, v1.2s, v2.s[2]
3 0x20,0x08,0x96,0x2f = mla v0.2s, v1.2s, v22.s[2]
4 0x03,0x01,0xa2,0x6f = mla v3.4s, v8.4s, v2.s[1]
5 0x03,0x09,0xb6,0x6f = mla v3.4s, v8.4s, v22.s[3]
6 0x20,0x00,0x62,0x2f = mla v0.4h, v1.4h, v2.h[2]
7 0x20,0x00,0x6f,0x2f = mla v0.4h, v1.4h, v15.h[2]
8 0x20,0x08,0x72,0x6f = mla v0.8h, v1.8h, v2.h[7]
9 0x20,0x08,0x6e,0x6f = mla v0.8h, v1.8h, v14.h[6]
/external/llvm/test/MC/AArch64/
Dneon-mla-mls-instructions.s8 mla v0.8b, v1.8b, v2.8b
9 mla v0.16b, v1.16b, v2.16b
10 mla v0.4h, v1.4h, v2.4h
11 mla v0.8h, v1.8h, v2.8h
12 mla v0.2s, v1.2s, v2.2s
13 mla v0.4s, v1.4s, v2.4s
Dneon-2velem.s9 mla v0.2s, v1.2s, v2.s[2]
10 mla v0.2s, v1.2s, v22.s[2]
11 mla v3.4s, v8.4s, v2.s[1]
12 mla v3.4s, v8.4s, v22.s[3]
19 mla v0.4h, v1.4h, v2.h[2]
20 mla v0.4h, v1.4h, v15.h[2]
21 mla v0.8h, v1.8h, v2.h[7]
22 mla v0.8h, v1.8h, v14.h[6]
Dneon-diagnostics.s114 mla v0.16b, v1.8b, v2.8b
2949 mla v0.2d, v1.2d, v16.d[1]
2950 mla v0.2s, v1.2s, v2.s[4]
2951 mla v0.4s, v1.4s, v2.s[4]
2952 mla v0.2h, v1.2h, v2.h[1]
2953 mla v0.4h, v1.4h, v2.h[8]
2954 mla v0.8h, v1.8h, v2.h[8]
2955 mla v0.4h, v1.4h, v16.h[2]
2956 mla v0.8h, v1.8h, v16.h[2]
Darm64-advsimd.s334 mla.8b v0, v0, v0
405 ; CHECK: mla.8b v0, v0, v0 ; encoding: [0x00,0x94,0x20,0x0e]
1217 mla.4h v0, v0, v0[0]
1218 mla.8h v0, v0, v0[1]
1219 mla.2s v0, v0, v0[2]
1220 mla.4s v0, v0, v0[3]
1286 ; CHECK: mla.4h v0, v0, v0[0] ; encoding: [0x00,0x00,0x40,0x2f]
1287 ; CHECK: mla.8h v0, v0, v0[1] ; encoding: [0x00,0x00,0x50,0x6f]
1288 ; CHECK: mla.2s v0, v0, v0[2] ; encoding: [0x00,0x08,0x80,0x2f]
1289 ; CHECK: mla.4s v0, v0, v0[3] ; encoding: [0x00,0x08,0xa0,0x6f]
/external/llvm/test/CodeGen/AArch64/
Dneon-mla-mls.ll5 ;CHECK: mla {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
12 ;CHECK: mla {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
19 ;CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
26 ;CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
33 ;CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
40 ;CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
Darm64-promote-const.ll47 ; PROMOTED-NEXT: mla.16b v0, v0, v[[REGNUM]]
58 ; REGULAR-NEXT: mla.16b v0, v0, v[[REGNUM]]
/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/
Dthumb2-mla.ll9 ; CHECK: mla r0, r0, r1, r2
17 ; CHECK: mla r0, r0, r1, r2
Dthumb2-mul.ll16 ; CHECK: mla r0, r2, r0, r1
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-mla.ll11 ; CHECK: mla r0, r0, r1, r2
22 ; CHECK: mla r0, r0, r1, r2
Dthumb2-mul.ll16 ; CHECK: mla r0, r2, r0, r1
/external/llvm/test/CodeGen/ARM/
Dgep-optimization.ll11 ; CHECK-AT2: mla r0, r1, [[REG1]], r0
35 ; CHECK-AT2: mla r0, r1, [[REG1]], r0
59 ; CHECK-AT2: mla r0, r1, [[REG1]], r0
/external/llvm/test/MC/ARM/
Dmul-v4.s14 @ ARMV4: mla r0, r1, r2, r3 @ encoding: [0x91,0x32,0x20,0xe0]
18 mla r0, r1, r2, r3 label
Ddirective-arch-armv4.s33 mla r4, r5, r6, r3
/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/
Dmul.ll46 ; ASM-NEXT: mla r1, r2, r1, r3
58 ; IASM-NOT: mla
/external/llvm/lib/CodeGen/
DREADME.txt10 mla r4, r3, lr, r4
19 mla r4, r3, lr, r4
27 mla r4, r3, lr, r4
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DREADME.txt10 mla r4, r3, lr, r4
19 mla r4, r3, lr, r4
27 mla r4, r3, lr, r4

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