| /external/libpng/ |
| D | configure.ac | 306 AC_ARG_ENABLE([hardware-optimizations],
307 AS_HELP_STRING([[[--enable-hardware-optimizations]]],
308 [Enable hardware optimizations: =no/off, yes/on:]),
314 [Disable ARM_NEON optimizations])
317 [Disable MIPS_MSA optimizations])
320 [Disable POWERPC VSX optimizations])
323 [Disable INTEL_SSE optimizations])
331 [Enable ARM_NEON optimizations])
336 [Enable MIPS_MSA optimizations])
341 [Enable Intel SSE optimizations])
[all …]
|
| D | config.h.in | 72 /* Turn on ARM Neon optimizations at run-time */
78 /* Enable ARM Neon optimizations */
81 /* Enable Intel SSE optimizations */
84 /* Turn on MIPS MSA optimizations at run-time */
90 /* Enable MIPS MSA optimizations */
93 /* Turn on POWERPC VSX optimizations at run-time */
99 /* Enable POWERPC VSX optimizations */
|
| /external/libpng/contrib/intel/ |
| D | configure.ac.patch | 9 # In order to compile Intel SSE optimizations for libpng, please add
20 [Enable Intel SSE optimizations: =no/off, yes/on:]
21 [no/off: disable the optimizations;]
22 [yes/on: enable the optimizations.]
28 [Disable Intel SSE optimizations])
33 [Enable Intel SSE optimizations]);;
39 # or where Intel optimizations were explicitly requested (this allows a
|
| D | INSTALL | 60 [Enable Intel SSE optimizations: =no/off, yes/on:]
61 [no/off: disable the optimizations;]
62 [yes/on: enable the optimizations.]
68 [Disable Intel SSE optimizations])
73 [Enable Intel SSE optimizations]);;
79 # or where Intel optimizations were explicitly requested (this allows a
106 * enable SSE optimizations. This means that these optimizations will
|
| D | intel_sse.patch | 20 + [Enable Intel SSE optimizations: =no/off, yes/on:]
21 + [no/off: disable the optimizations;]
22 + [yes/on: enable the optimizations.]
28 + [Disable Intel SSE optimizations])
33 + [Enable Intel SSE optimizations]);;
39 +# or where Intel optimizations were explicitly requested (this allows a
96 + * enable SSE optimizations. This means that these optimizations will
|
| /external/llvm/docs/HistoricalNotes/ |
| D | 2001-06-01-GCCOptimizations2.txt | 10 If we were to reimplement any of these optimizations, I assume that we
14 Static optimizations, xlation unit at a time:
17 Link time optimizations:
20 Of course, many optimizations could be shared between llvmopt and
24 > BTW, about SGI, "borrowing" SSA-based optimizations from one compiler and
31 optimizations are written in C++ and are actually somewhat
35 > But your larger point is valid that adding SSA based optimizations is
46 optimization" happens right along with other data optimizations (ie, CSE
49 As far as REAL back end optimizations go, it looks something like this:
|
| D | 2001-06-01-GCCOptimizations.txt | 7 Take a look at this document (which describes the order of optimizations
31 I've marked optimizations with a [t] to indicate things that I believe to
36 optimizations are done on the tree representation].
38 Given the lack of "strong" optimizations that would take a long time to
41 SSA based optimizations that could be adapted (besides the fact that their
|
| /external/swiftshader/third_party/LLVM/docs/HistoricalNotes/ |
| D | 2001-06-01-GCCOptimizations2.txt | 10 If we were to reimplement any of these optimizations, I assume that we
14 Static optimizations, xlation unit at a time:
17 Link time optimizations:
20 Of course, many optimizations could be shared between llvmopt and
24 > BTW, about SGI, "borrowing" SSA-based optimizations from one compiler and
31 optimizations are written in C++ and are actually somewhat
35 > But your larger point is valid that adding SSA based optimizations is
46 optimization" happens right along with other data optimizations (ie, CSE
49 As far as REAL back end optimizations go, it looks something like this:
|
| D | 2001-06-01-GCCOptimizations.txt | 7 Take a look at this document (which describes the order of optimizations
31 I've marked optimizations with a [t] to indicate things that I believe to
36 optimizations are done on the tree representation].
38 Given the lack of "strong" optimizations that would take a long time to
41 SSA based optimizations that could be adapted (besides the fact that their
|
| /external/adhd/cras/ |
| D | configure.ac | 97 AC_ARG_ENABLE(sse42, [AS_HELP_STRING([--enable-sse42],[enable SSE42 optimizations])], have_sse42=$e…
102 AC_DEFINE(HAVE_SSE42,1,[Define to enable SSE42 optimizations.])
109 AC_ARG_ENABLE(avx, [AS_HELP_STRING([--enable-avx],[enable AVX optimizations])], have_avx=$enableval…
114 AC_DEFINE(HAVE_AVX,1,[Define to enable AVX optimizations.])
121 AC_ARG_ENABLE(avx2, [AS_HELP_STRING([--enable-avx2],[enable AVX2 optimizations])], have_avx2=$enabl…
126 AC_DEFINE(HAVE_AVX2,1,[Define to enable AVX2 optimizations.])
133 AC_ARG_ENABLE(fma, [AS_HELP_STRING([--enable-fma],[enable FMA optimizations])], have_fma=$enableval…
138 AC_DEFINE(HAVE_FMA,1,[Define to enable FMA optimizations.])
|
| /external/pdfium/third_party/libpng16/contrib/intel/ |
| D | INSTALL | 60 [Enable Intel SSE optimizations: =no/off, yes/on:]
61 [no/off: disable the optimizations;]
62 [yes/on: enable the optimizations.]
68 [Disable Intel SSE optimizations])
73 [Enable Intel SSE optimizations]);;
79 # or where Intel optimizations were explicitly requested (this allows a
106 * enable SSE optimizations. This means that these optimizations will
|
| D | intel_sse.patch | 20 + [Enable Intel SSE optimizations: =no/off, yes/on:]
21 + [no/off: disable the optimizations;]
22 + [yes/on: enable the optimizations.]
28 + [Disable Intel SSE optimizations])
33 + [Enable Intel SSE optimizations]);;
39 +# or where Intel optimizations were explicitly requested (this allows a
94 + * enable SSE optimizations. This means that these optimizations will
|
| /external/tensorflow/tensorflow/core/protobuf/ |
| D | rewriter_config.proto | 26 // Enable some aggressive optimizations that use assumptions that TF graphs
36 // Arithmetic optimizations (default is ON)
38 // Control dependency optimizations (default is ON).
40 // Loop optimizations (default is OFF).
82 // optimizations to turn on and the order of the optimizations (replacing the
|
| /external/llvm/docs/CommandGuide/ |
| D | opt.rst | 13 takes LLVM source files as input, runs the specified optimizations or analyses
25 optimized output file. The optimizations available via :program:`opt` depend
28 option to determine what optimizations you can use.
77 applying other optimizations. It is essentially the same as :option:`-strip`
106 line options to enable various optimizations or analyses. To see the new
107 complete list of optimizations, use the :option:`-help` and :option:`-load`
|
| D | llc.rst | 96 Disable optimizations that may produce excess precision for floating point.
102 Enable optimizations that assume no Inf values.
106 Enable optimizations that assume no NAN values.
110 Enable optimizations that make unsafe assumptions about IEEE math (e.g. that
112 optimizations allow the code generator to make use of some instructions which
|
| /external/proguard/src/proguard/ant/ |
| D | ConfigurationTask.java | 61 … configuration.optimizations = extendClassSpecifications(configuration.optimizations, in appendTo()
62 … this.configuration.optimizations); in appendTo()
215 configuration.optimizations = extendFilter(configuration.optimizations, in addConfiguredOptimization()
|
| /external/proguard/src/proguard/gui/ |
| D | OptimizationsDialog.java | 189 public void setFilter(String optimizations) in setFilter() argument
191 StringMatcher filter = optimizations != null && optimizations.length() > 0 ? in setFilter()
192 new ListParser(new NameParser()).parse(optimizations) : in setFilter()
|
| /external/swiftshader/third_party/LLVM/docs/CommandGuide/ |
| D | opt.pod | 14 source files as input, runs the specified optimizations or analyses on it, and then
25 output file. The optimizations available via B<opt> depend upon what
28 what optimizations you can use.
89 applying other optimizations. It is essentially the same as B<-strip> but it
123 enable various optimizations or analyses. To see the new complete list of
124 optimizations, use the B<-help> and B<-load> options together. For example:
|
| D | llc.pod | 83 Disable optimizations that may produce excess precision for floating point.
89 Enable optimizations that assume no Inf values.
93 Enable optimizations that assume no NAN values.
97 Enable optimizations that make unsafe assumptions about IEEE math (e.g. that
99 optimizations allow the code generator to make use of some instructions which
|
| /external/skia/resources/lua/ |
| D | slides_content2.lua | 77 - Separate pass for optimizations (optional)
81 - GPU optimizations
94 Skia In Blink : MPD optimizations*
|
| /external/skqp/platform_tools/android/apps/skqp/src/main/assets/resources/lua/ |
| D | slides_content2.lua | 77 - Separate pass for optimizations (optional)
81 - GPU optimizations
94 Skia In Blink : MPD optimizations*
|
| /external/skqp/resources/lua/ |
| D | slides_content2.lua | 77 - Separate pass for optimizations (optional)
81 - GPU optimizations
94 Skia In Blink : MPD optimizations*
|
| /external/mesa3d/src/compiler/nir/ |
| D | nir_opt_algebraic.py | 65 optimizations = [ variable
459 optimizations += [
474 optimizations += [(bitfield_reverse('x@32'), ('bitfield_reverse', 'x'))]
480 optimizations += [
499 optimizations += [
531 print nir_algebraic.AlgebraicPass("nir_opt_algebraic", optimizations).render()
|
| /external/tensorflow/tensorflow/docs_src/performance/ |
| D | performance_guide.md | 18 * [Input pipeline optimizations](#input-pipeline-optimization)
163 compiled with the [Intel MKL](#tensorflow_with_intel_mkl-dnn) optimizations,
171 transparent and take advantages of micro optimizations where a GPU Op may be
255 is recommended to compile TensorFlow with all of the optimizations available for
257 in [Comparing compiler optimizations](#comparing-compiler-optimizations).
262 cross-compile with the highest optimizations for the target platform. The
282 * Use a version of gcc that supports all of the optimizations of the target
441 TensorFlow. While the name is not completely accurate, these optimizations are
444 MKL optimizations.
471 The [Comparing compiler optimizations](#comparing-compiler-optimizations)
[all …]
|
| /external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
| D | radeon_compiler_regalloc_tests.c | 51 unsigned optimizations = 1; in test_runner_rc_regalloc() local
63 rc_pair_schedule(c, &optimizations); in test_runner_rc_regalloc()
|