/external/mesa3d/src/gallium/drivers/r600/ |
D | r600_state_common.c | 52 void r600_add_atom(struct r600_context *rctx, in r600_add_atom() argument 57 assert(rctx->atoms[id] == NULL); in r600_add_atom() 58 rctx->atoms[id] = atom; in r600_add_atom() 62 void r600_init_atom(struct r600_context *rctx, in r600_init_atom() argument 70 r600_add_atom(rctx, atom, id); in r600_init_atom() 73 void r600_emit_cso_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_cso_state() argument 75 r600_emit_command_buffer(rctx->b.gfx.cs, ((struct r600_cso_state*)atom)->cb); in r600_emit_cso_state() 78 void r600_emit_alphatest_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_alphatest_state() argument 80 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_alphatest_state() 84 if (rctx->b.chip_class >= EVERGREEN && a->cb0_export_16bpc) { in r600_emit_alphatest_state() [all …]
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D | r600_pipe.c | 67 struct r600_context *rctx = (struct r600_context *)context; in r600_destroy_context() local 70 r600_isa_destroy(rctx->isa); in r600_destroy_context() 72 r600_sb_context_destroy(rctx->sb_context); in r600_destroy_context() 74 r600_resource_reference(&rctx->dummy_cmask, NULL); in r600_destroy_context() 75 r600_resource_reference(&rctx->dummy_fmask, NULL); in r600_destroy_context() 78 rctx->b.b.set_constant_buffer(&rctx->b.b, sh, R600_BUFFER_INFO_CONST_BUFFER, NULL); in r600_destroy_context() 79 free(rctx->driver_consts[sh].constants); in r600_destroy_context() 82 if (rctx->fixed_func_tcs_shader) in r600_destroy_context() 83 rctx->b.b.delete_tcs_state(&rctx->b.b, rctx->fixed_func_tcs_shader); in r600_destroy_context() 85 if (rctx->dummy_pixel_shader) { in r600_destroy_context() [all …]
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D | r600_blit.c | 55 struct r600_context *rctx = (struct r600_context *)ctx; in r600_blitter_begin() local 57 util_blitter_save_vertex_buffer_slot(rctx->blitter, rctx->vertex_buffer_state.vb); in r600_blitter_begin() 58 util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso); in r600_blitter_begin() 59 util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader); in r600_blitter_begin() 60 util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader); in r600_blitter_begin() 61 util_blitter_save_tessctrl_shader(rctx->blitter, rctx->tcs_shader); in r600_blitter_begin() 62 util_blitter_save_tesseval_shader(rctx->blitter, rctx->tes_shader); in r600_blitter_begin() 63 util_blitter_save_so_targets(rctx->blitter, rctx->b.streamout.num_targets, in r600_blitter_begin() 64 (struct pipe_stream_output_target**)rctx->b.streamout.targets); in r600_blitter_begin() 65 util_blitter_save_rasterizer(rctx->blitter, rctx->rasterizer_state.cso); in r600_blitter_begin() [all …]
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D | evergreen_state.c | 459 struct r600_context *rctx = (struct r600_context *)ctx; in evergreen_create_rs_state() local 531 if (rctx->b.chip_class == CAYMAN) { in evergreen_create_rs_state() 600 texture_buffer_sampler_view(struct r600_context *rctx, in texture_buffer_sampler_view() argument 651 LIST_ADDTAIL(&view->list, &rctx->texture_buffers); in texture_buffer_sampler_view() 662 struct r600_context *rctx = (struct r600_context*)ctx; in evergreen_create_sampler_view_custom() local 690 return texture_buffer_sampler_view(rctx, view, width0, height0); in evergreen_create_sampler_view_custom() 882 static void evergreen_emit_config_state(struct r600_context *rctx, struct r600_atom *atom) in evergreen_emit_config_state() argument 884 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in evergreen_emit_config_state() 889 radeon_emit(cs, S_008C04_NUM_CLAUSE_TEMP_GPRS(rctx->r6xx_num_clause_temp_gprs)); in evergreen_emit_config_state() 909 static void evergreen_emit_clip_state(struct r600_context *rctx, struct r600_atom *atom) in evergreen_emit_clip_state() argument [all …]
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D | r600_state.c | 246 static void r600_emit_polygon_offset(struct r600_context *rctx, struct r600_atom *a) in r600_emit_polygon_offset() argument 248 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_polygon_offset() 317 struct r600_context *rctx = (struct r600_context *)ctx; in r600_create_blend_state_mode() local 329 if (rctx->b.family > CHIP_R600) in r600_create_blend_state_mode() 386 if (rctx->b.family > CHIP_R600) { in r600_create_blend_state_mode() 458 struct r600_context *rctx = (struct r600_context *)ctx; in r600_create_rs_state() local 483 if (rctx->b.chip_class == R700) { in r600_create_rs_state() 507 S_028A4C_PS_ITER_SAMPLE(state->multisample && rctx->ps_iter_samples > 1); in r600_create_rs_state() 508 if (rctx->b.family == CHIP_RV770) { in r600_create_rs_state() 510 sc_mode_cntl |= S_028A4C_TILE_COVER_DISABLE(state->multisample && rctx->ps_iter_samples > 1); in r600_create_rs_state() [all …]
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D | evergreen_compute.c | 104 struct r600_context *rctx = NULL; in evergreen_set_rat() local 110 rctx = pipe->ctx; in evergreen_set_rat() 112 COMPUTE_DBG(rctx->screen, "bind rat: %i \n", id); in evergreen_set_rat() 137 evergreen_init_color_surface_rat(rctx, surf); in evergreen_set_rat() 140 static void evergreen_cs_set_vertex_buffer(struct r600_context *rctx, in evergreen_cs_set_vertex_buffer() argument 145 struct r600_vertexbuf_state *state = &rctx->cs_vertex_buffer_state; in evergreen_cs_set_vertex_buffer() 154 rctx->b.flags |= R600_CONTEXT_INV_VERTEX_CACHE; in evergreen_cs_set_vertex_buffer() 157 r600_mark_atom_dirty(rctx, &state->atom); in evergreen_cs_set_vertex_buffer() 160 static void evergreen_cs_set_constant_buffer(struct r600_context *rctx, in evergreen_cs_set_constant_buffer() argument 172 rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_COMPUTE, cb_index, &cb); in evergreen_cs_set_constant_buffer() [all …]
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D | r600_hw_context.c | 89 void r600_flush_emit(struct r600_context *rctx) in r600_flush_emit() argument 91 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_flush_emit() 95 if (!rctx->b.flags) { in r600_flush_emit() 100 if (rctx->b.flags & R600_CONTEXT_STREAMOUT_FLUSH) in r600_flush_emit() 101 rctx->b.flags |= r600_get_flush_flags(R600_COHERENCY_SHADER); in r600_flush_emit() 103 if (rctx->b.flags & R600_CONTEXT_WAIT_3D_IDLE) { in r600_flush_emit() 106 if (rctx->b.flags & R600_CONTEXT_WAIT_CP_DMA_IDLE) { in r600_flush_emit() 112 if (rctx->b.family >= CHIP_CAYMAN) { in r600_flush_emit() 114 rctx->b.flags |= R600_CONTEXT_PS_PARTIAL_FLUSH; in r600_flush_emit() 121 if (rctx->b.flags & R600_CONTEXT_PS_PARTIAL_FLUSH) { in r600_flush_emit() [all …]
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D | r600_pipe.h | 535 static inline void r600_set_atom_dirty(struct r600_context *rctx, in r600_set_atom_dirty() argument 545 rctx->dirty_atoms |= mask; in r600_set_atom_dirty() 547 rctx->dirty_atoms &= ~mask; in r600_set_atom_dirty() 550 static inline void r600_mark_atom_dirty(struct r600_context *rctx, in r600_mark_atom_dirty() argument 553 r600_set_atom_dirty(rctx, atom, true); in r600_mark_atom_dirty() 556 static inline void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_atom() argument 558 atom->emit(&rctx->b, atom); in r600_emit_atom() 559 r600_set_atom_dirty(rctx, atom, false); in r600_emit_atom() 562 static inline void r600_set_cso_state(struct r600_context *rctx, in r600_set_cso_state() argument 566 r600_set_atom_dirty(rctx, &state->atom, cso != NULL); in r600_set_cso_state() [all …]
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D | evergreen_hw_context.c | 31 void evergreen_dma_copy_buffer(struct r600_context *rctx, in evergreen_dma_copy_buffer() argument 38 struct radeon_winsys_cs *cs = rctx->b.dma.cs; in evergreen_dma_copy_buffer() 63 r600_need_dma_space(&rctx->b, ncopy * 5, rdst, rsrc); in evergreen_dma_copy_buffer() 67 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, rsrc, RADEON_USAGE_READ, in evergreen_dma_copy_buffer() 69 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, rdst, RADEON_USAGE_WRITE, in evergreen_dma_copy_buffer() 85 void evergreen_cp_dma_clear_buffer(struct r600_context *rctx, in evergreen_cp_dma_clear_buffer() argument 90 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in evergreen_cp_dma_clear_buffer() 93 assert(rctx->screen->b.has_cp_dma); in evergreen_cp_dma_clear_buffer() 104 rctx->b.flags |= r600_get_flush_flags(coher) | in evergreen_cp_dma_clear_buffer() 112 r600_need_cs_space(rctx, in evergreen_cp_dma_clear_buffer() [all …]
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D | evergreen_compute.h | 41 void evergreen_init_atom_start_compute_cs(struct r600_context *rctx); 42 void evergreen_init_compute_state_functions(struct r600_context *rctx); 43 void evergreen_emit_cs_shader(struct r600_context *rctx, struct r600_atom * atom);
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D | compute_memory_pool.c | 383 struct r600_context *rctx = (struct r600_context *)pipe; in compute_memory_promote_item() local 405 rctx->b.b.resource_copy_region(pipe, in compute_memory_promote_item() 430 struct r600_context *rctx = (struct r600_context *)pipe; in compute_memory_demote_item() local 459 rctx->b.b.resource_copy_region(pipe, in compute_memory_demote_item() 489 struct r600_context *rctx = (struct r600_context *)pipe; in compute_memory_move_item() local 510 rctx->b.b.resource_copy_region(pipe, in compute_memory_move_item() 520 rctx->b.b.resource_copy_region(pipe, in compute_memory_move_item() 526 rctx->b.b.resource_copy_region(pipe, in compute_memory_move_item()
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | r600_viewport.c | 28 #define GET_MAX_SCISSOR(rctx) (rctx->chip_class >= EVERGREEN ? 16384 : 8192) argument 35 struct r600_common_context *rctx = (struct r600_common_context *)ctx; in r600_set_scissor_states() local 39 rctx->scissors.states[start_slot + i] = state[i]; in r600_set_scissor_states() 41 if (!rctx->scissor_enabled) in r600_set_scissor_states() 44 rctx->scissors.dirty_mask |= ((1 << num_scissors) - 1) << start_slot; in r600_set_scissor_states() 45 rctx->set_atom_dirty(rctx, &rctx->scissors.atom, true); in r600_set_scissor_states() 51 static void r600_get_scissor_from_viewport(struct r600_common_context *rctx, in r600_get_scissor_from_viewport() argument 66 scissor->maxx = scissor->maxy = GET_MAX_SCISSOR(rctx); in r600_get_scissor_from_viewport() 89 static void r600_clamp_scissor(struct r600_common_context *rctx, in r600_clamp_scissor() argument 93 unsigned max_scissor = GET_MAX_SCISSOR(rctx); in r600_clamp_scissor() [all …]
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D | r600_streamout.c | 32 static void r600_set_streamout_enable(struct r600_common_context *rctx, bool enable); 40 struct r600_common_context *rctx = (struct r600_common_context *)ctx; in r600_create_so_target() local 49 u_suballocator_alloc(rctx->allocator_zeroed_memory, 4, 4, in r600_create_so_target() 77 void r600_streamout_buffers_dirty(struct r600_common_context *rctx) in r600_streamout_buffers_dirty() argument 79 struct r600_atom *begin = &rctx->streamout.begin_atom; in r600_streamout_buffers_dirty() 80 unsigned num_bufs = util_bitcount(rctx->streamout.enabled_mask); in r600_streamout_buffers_dirty() 81 unsigned num_bufs_appended = util_bitcount(rctx->streamout.enabled_mask & in r600_streamout_buffers_dirty() 82 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty() 87 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty() 93 if (rctx->chip_class >= SI) { in r600_streamout_buffers_dirty() [all …]
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D | r600_pipe_common.c | 168 struct r600_common_context *rctx = in r600_draw_rectangle() local 191 rctx->b.set_viewport_states(&rctx->b, 0, 1, &viewport); in r600_draw_rectangle() 196 u_upload_alloc(rctx->uploader, 0, sizeof(float) * 24, 256, &offset, &buf, (void**)&vb); in r600_draw_rectangle() 222 util_draw_vertex_buffer(&rctx->b, NULL, buf, blitter->vb_slot, offset, in r600_draw_rectangle() 227 static void r600_dma_emit_wait_idle(struct r600_common_context *rctx) in r600_dma_emit_wait_idle() argument 229 struct radeon_winsys_cs *cs = rctx->dma.cs; in r600_dma_emit_wait_idle() 232 if (rctx->chip_class >= CIK) in r600_dma_emit_wait_idle() 234 else if (rctx->chip_class >= EVERGREEN) in r600_dma_emit_wait_idle() 350 struct r600_common_context *rctx = (struct r600_common_context *)ctx; in r600_flush_from_st() local 351 struct radeon_winsys *ws = rctx->ws; in r600_flush_from_st() [all …]
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D | r600_query.c | 50 static void r600_query_sw_destroy(struct r600_common_context *rctx, in r600_query_sw_destroy() argument 53 struct pipe_screen *screen = rctx->b.screen; in r600_query_sw_destroy() 81 static bool r600_query_sw_begin(struct r600_common_context *rctx, in r600_query_sw_begin() argument 91 query->begin_result = rctx->num_draw_calls; in r600_query_sw_begin() 94 query->begin_result = rctx->num_spill_draw_calls; in r600_query_sw_begin() 97 query->begin_result = rctx->num_compute_calls; in r600_query_sw_begin() 100 query->begin_result = rctx->num_spill_compute_calls; in r600_query_sw_begin() 103 query->begin_result = rctx->num_dma_calls; in r600_query_sw_begin() 106 query->begin_result = rctx->num_cp_dma_calls; in r600_query_sw_begin() 109 query->begin_result = rctx->num_vs_flushes; in r600_query_sw_begin() [all …]
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D | r600_texture.c | 45 bool r600_prepare_for_dma_blit(struct r600_common_context *rctx, in r600_prepare_for_dma_blit() argument 53 if (!rctx->dma.cs) in r600_prepare_for_dma_blit() 92 r600_texture_discard_cmask(rctx->screen, rdst); in r600_prepare_for_dma_blit() 97 rctx->b.flush_resource(&rctx->b, &rsrc->resource.b.b); in r600_prepare_for_dma_blit() 142 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in r600_copy_to_staging_texture() local 153 rctx->dma_copy(ctx, dst, 0, 0, 0, 0, src, transfer->level, in r600_copy_to_staging_texture() 160 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in r600_copy_from_staging_texture() local 175 rctx->dma_copy(ctx, dst, transfer->level, in r600_copy_from_staging_texture() 306 static void r600_eliminate_fast_color_clear(struct r600_common_context *rctx, in r600_eliminate_fast_color_clear() argument 309 struct r600_common_screen *rscreen = rctx->screen; in r600_eliminate_fast_color_clear() [all …]
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D | r600_buffer_common.c | 241 r600_invalidate_buffer(struct r600_common_context *rctx, in r600_invalidate_buffer() argument 251 if (rctx->ws->buffer_is_user_ptr(rbuffer->buf)) in r600_invalidate_buffer() 255 if (r600_rings_is_buffer_referenced(rctx, rbuffer->buf, RADEON_USAGE_READWRITE) || in r600_invalidate_buffer() 256 !rctx->ws->buffer_wait(rbuffer->buf, 0, RADEON_USAGE_READWRITE)) { in r600_invalidate_buffer() 257 rctx->invalidate_buffer(&rctx->b, &rbuffer->b.b); in r600_invalidate_buffer() 268 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in r600_invalidate_resource() local 273 (void)r600_invalidate_buffer(rctx, rbuffer); in r600_invalidate_resource() 285 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in r600_buffer_get_transfer() local 286 struct r600_transfer *transfer = slab_alloc(&rctx->pool_transfers); in r600_buffer_get_transfer() 300 static bool r600_can_dma_copy_buffer(struct r600_common_context *rctx, in r600_can_dma_copy_buffer() argument [all …]
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D | r600_pipe_common.h | 730 bool r600_common_context_init(struct r600_common_context *rctx, 733 void r600_common_context_cleanup(struct r600_common_context *rctx); 748 bool r600_check_device_reset(struct r600_common_context *rctx); 762 void r600_query_init(struct r600_common_context *rctx); 768 void r600_streamout_buffers_dirty(struct r600_common_context *rctx); 773 void r600_emit_streamout_end(struct r600_common_context *rctx); 774 void r600_update_prims_generated_query_state(struct r600_common_context *rctx, 776 void r600_streamout_init(struct r600_common_context *rctx); 782 bool r600_prepare_for_dma_blit(struct r600_common_context *rctx, 804 void vi_dcc_disable_if_incompatible_format(struct r600_common_context *rctx, [all …]
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D | r600_cs.h | 69 static inline unsigned radeon_add_to_buffer_list(struct r600_common_context *rctx, in radeon_add_to_buffer_list() argument 76 return rctx->ws->cs_add_buffer( in radeon_add_to_buffer_list() 100 radeon_add_to_buffer_list_check_mem(struct r600_common_context *rctx, in radeon_add_to_buffer_list_check_mem() argument 108 !radeon_cs_memory_below_limit(rctx->screen, ring->cs, in radeon_add_to_buffer_list_check_mem() 109 rctx->vram + rbo->vram_usage, in radeon_add_to_buffer_list_check_mem() 110 rctx->gtt + rbo->gart_usage)) in radeon_add_to_buffer_list_check_mem() 111 ring->flush(rctx, RADEON_FLUSH_ASYNC, NULL); in radeon_add_to_buffer_list_check_mem() 113 return radeon_add_to_buffer_list(rctx, ring, rbo, usage, priority); in radeon_add_to_buffer_list_check_mem() 116 static inline void r600_emit_reloc(struct r600_common_context *rctx, in r600_emit_reloc() argument 122 bool has_vm = ((struct r600_common_screen*)rctx->b.screen)->info.has_virtual_memory; in r600_emit_reloc() [all …]
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D | r600_query.h | 167 bool r600_query_hw_init(struct r600_common_context *rctx, 169 void r600_query_hw_destroy(struct r600_common_context *rctx, 171 bool r600_query_hw_begin(struct r600_common_context *rctx, 173 bool r600_query_hw_end(struct r600_common_context *rctx, 175 bool r600_query_hw_get_result(struct r600_common_context *rctx, 282 void r600_query_hw_reset_buffers(struct r600_common_context *rctx,
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D | cayman_msaa.c | 128 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in cayman_init_msaa() local 131 cayman_get_sample_position(ctx, 1, 0, rctx->sample_locations_1x[0]); in cayman_init_msaa() 134 cayman_get_sample_position(ctx, 2, i, rctx->sample_locations_2x[i]); in cayman_init_msaa() 136 cayman_get_sample_position(ctx, 4, i, rctx->sample_locations_4x[i]); in cayman_init_msaa() 138 cayman_get_sample_position(ctx, 8, i, rctx->sample_locations_8x[i]); in cayman_init_msaa() 140 cayman_get_sample_position(ctx, 16, i, rctx->sample_locations_16x[i]); in cayman_init_msaa()
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D | r600_test_dma.c | 186 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in r600_test_dma() local 304 rctx->clear_buffer(ctx, dst, 0, rdst->surface.surf_size, 0, true); in r600_test_dma() 317 unsigned old_num_draw_calls = rctx->num_draw_calls; in r600_test_dma() 318 unsigned old_num_dma_calls = rctx->num_dma_calls; in r600_test_dma() 373 rctx->dma_copy(ctx, dst, 0, dstx, dsty, dstz, src, 0, &box); in r600_test_dma() 376 gfx_blits += rctx->num_draw_calls > old_num_draw_calls; in r600_test_dma() 377 dma_blits += rctx->num_dma_calls > old_num_dma_calls; in r600_test_dma()
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/external/boringssl/src/crypto/evp/ |
D | p_rsa.c | 101 RSA_PKEY_CTX *rctx; in pkey_rsa_init() local 102 rctx = OPENSSL_malloc(sizeof(RSA_PKEY_CTX)); in pkey_rsa_init() 103 if (!rctx) { in pkey_rsa_init() 106 OPENSSL_memset(rctx, 0, sizeof(RSA_PKEY_CTX)); in pkey_rsa_init() 108 rctx->nbits = 2048; in pkey_rsa_init() 109 rctx->pad_mode = RSA_PKCS1_PADDING; in pkey_rsa_init() 110 rctx->saltlen = -2; in pkey_rsa_init() 112 ctx->data = rctx; in pkey_rsa_init() 148 RSA_PKEY_CTX *rctx = ctx->data; in pkey_rsa_cleanup() local 150 if (rctx == NULL) { in pkey_rsa_cleanup() [all …]
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/external/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_state_draw.c | 721 static void si_emit_surface_sync(struct r600_common_context *rctx, in si_emit_surface_sync() argument 724 struct radeon_winsys_cs *cs = rctx->gfx.cs; in si_emit_surface_sync() 736 struct r600_common_context *rctx = &sctx->b; in si_emit_cache_flush() local 737 struct radeon_winsys_cs *cs = rctx->gfx.cs; in si_emit_cache_flush() 740 if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER) in si_emit_cache_flush() 751 if (rctx->flags & SI_CONTEXT_INV_ICACHE) in si_emit_cache_flush() 753 if (rctx->flags & SI_CONTEXT_INV_SMEM_L1) in si_emit_cache_flush() 756 if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_CB) { in si_emit_cache_flush() 768 if (rctx->chip_class == VI) in si_emit_cache_flush() 769 r600_gfx_write_event_eop(rctx, V_028A90_FLUSH_AND_INV_CB_DATA_TS, in si_emit_cache_flush() [all …]
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/external/mesa3d/src/gallium/drivers/r600/sb/ |
D | sb_core.cpp | 48 sb_context *r600_sb_context_create(struct r600_context *rctx) { in r600_sb_context_create() argument 52 if (sctx->init(rctx->isa, translate_chip(rctx->b.family), in r600_sb_context_create() 53 translate_chip_class(rctx->b.chip_class))) { in r600_sb_context_create() 58 unsigned df = rctx->screen->b.debug_flags; in r600_sb_context_create() 90 int r600_sb_bytecode_process(struct r600_context *rctx, in r600_sb_bytecode_process() argument 98 sb_context *ctx = (sb_context *)rctx->sb_context; in r600_sb_bytecode_process() 100 rctx->sb_context = ctx = r600_sb_context_create(rctx); in r600_sb_bytecode_process()
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