| /hardware/intel/common/libmix/mix_vbp/viddec_fw/fw/parser/ |
| D | viddec_parse_sc.c | 21 uint32_t data_left=0, phase = 0, ret = 0; in viddec_parse_sc() local
31 phase = cxt->phase; in viddec_parse_sc()
36 while((data_left > 0) &&(phase < 3)) in viddec_parse_sc()
40 if(((((uint32_t)ptr) & 0x3) == 0) && (phase == 0)) in viddec_parse_sc()
73 phase++; in viddec_parse_sc()
75 if(phase > 2) in viddec_parse_sc()
77 phase = 2; in viddec_parse_sc()
94 if((*ptr == THIRD_STARTCODE_BYTE) && (phase == 2)) in viddec_parse_sc()
96 phase = 3; in viddec_parse_sc()
101 phase = 0; in viddec_parse_sc()
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| D | viddec_pm_utils_bstream.c | 147 uint32_t *phase, /* Phase for emulation */ in viddec_pm_utils_getbytes() argument
160 if((cur_byte == 0x3) &&(*phase == 2)) in viddec_pm_utils_getbytes()
162 *phase = 0; in viddec_pm_utils_getbytes()
176 *phase +=( ((*phase < 2) && emul_reqd ) ? 1: 0 ); in viddec_pm_utils_getbytes()
180 *phase=0; in viddec_pm_utils_getbytes()
340 cxt->phase = 0; in viddec_pm_utils_bstream_init()
385 …if(viddec_pm_utils_getbytes(bstream, &data, &act_bytes, &(cxt->phase), bytes_required, cxt->is_em… in viddec_pm_utils_bstream_skipbits()
423 uint32_t act_bytes, phase; in viddec_pm_utils_bstream_peekbits() local
425 phase = cxt->phase; in viddec_pm_utils_bstream_peekbits()
427 …if(viddec_pm_utils_getbytes(bstream, &data, &act_bytes, &phase, bytes_required, cxt->is_emul_reqd,… in viddec_pm_utils_bstream_peekbits()
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| D | viddec_parse_sc_fast_loop.c | 171 &cxt->phase ); in viddec_parse_sc()
179 cxt->phase++; in viddec_parse_sc()
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| D | vbp_mp42_parser.c | 480 uint32 data_left = 0, phase = 0, ret = 0; in vbp_get_sc_pos_mp42() local
484 phase = *sc_phase; in vbp_get_sc_pos_mp42()
488 while ((data_left > 0) && (phase < 3)) { in vbp_get_sc_pos_mp42()
491 if (((((uint32) ptr) & 0x3) == 0) && (phase == 0)) { in vbp_get_sc_pos_mp42()
519 phase++; in vbp_get_sc_pos_mp42()
523 if (phase > 2) { in vbp_get_sc_pos_mp42()
524 phase = 2; in vbp_get_sc_pos_mp42()
539 if (phase == 2) { in vbp_get_sc_pos_mp42()
549 phase = 0; in vbp_get_sc_pos_mp42()
552 phase = 3; in vbp_get_sc_pos_mp42()
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| D | vbp_utils.c | 339 cxt->getbits.phase = 0; in vbp_utils_parse_es_buffer()
429 pcontext->parser_cxt->parse_cubby.phase = 0; in vbp_utils_create_context()
505 pcontext->parser_cxt->parse_cubby.phase = 0; in vbp_utils_parse_buffer()
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| D | viddec_pm.c | 117 cxt->parse_cubby.phase=0; in viddec_pm_init_context()
303 cxt->parse_cubby.phase = 0; in viddec_pm_parse_for_sccode()
325 cxt->parse_cubby.phase = 0; in viddec_pm_parse_for_sccode()
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| D | vbp_vc1_parser.c | 239 cubby.phase = 0; in vbp_parse_start_code_helper_vc1()
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| /hardware/intel/common/libmix/mix_vbp/viddec_fw/fw/codecs/mp4/parser/ |
| D | viddec_parse_sc_mp4.c | 25 uint32_t data_left=0, phase = 0, ret = 0; in viddec_parse_sc_mp4() local
34 phase = cxt->phase; in viddec_parse_sc_mp4()
39 while((data_left > 0) &&(phase < 3)) in viddec_parse_sc_mp4()
43 if(((((uint32_t)ptr) & 0x3) == 0) && (phase == 0)) in viddec_parse_sc_mp4()
76 phase++; in viddec_parse_sc_mp4()
78 if(phase > 2) in viddec_parse_sc_mp4()
80 phase = 2; in viddec_parse_sc_mp4()
98 if(phase == 2) in viddec_parse_sc_mp4()
106 phase = 0; in viddec_parse_sc_mp4()
111 phase = 3; in viddec_parse_sc_mp4()
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| /hardware/intel/common/libmix/mix_vbp/viddec_fw/fw/parser/include/ |
| D | viddec_pm_utils_bstream.h | 44 uint32_t phase; member
69 uint32_t phase=cxt->phase; in viddec_pm_utils_bstream_get_au_offsets() local
73 if(cxt->phase > 0) in viddec_pm_utils_bstream_get_au_offsets()
75 phase = phase - ((cxt->bstrm_buf.buf_bitoff != 0)? 1: 0 ); in viddec_pm_utils_bstream_get_au_offsets()
77 *is_emul = (cxt->is_emul_reqd) && (phase > 0) && in viddec_pm_utils_bstream_get_au_offsets()
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| D | viddec_pm_parse.h | 13 uint32_t phase; /* phase information(state) for sc */ member
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| /hardware/intel/common/libmix/videodecoder/securevideo/clovertrail/ |
| D | VideoDecoderAVCSecure.cpp | 354 uint32_t left = 0, data = 0, phase = 0; in findNalUnitOffset() local
367 phase = 0; in findNalUnitOffset()
370 while ((left > 0) && (phase < 3)) { in findNalUnitOffset()
372 if (((((uint32_t)ptr) & 0x3) == 0) && (phase == 0)) { in findNalUnitOffset()
393 phase++; in findNalUnitOffset()
394 if (phase > 2) { in findNalUnitOffset()
396 phase = 2; in findNalUnitOffset()
398 } else if ((*ptr == STARTCODE_01) && (phase == 2)) { in findNalUnitOffset()
400 phase = 3; in findNalUnitOffset()
403 phase = 0; in findNalUnitOffset()
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| /hardware/interfaces/gnss/1.1/ |
| D | IGnssMeasurementCallback.hal | 28 ADR_STATE_HALF_CYCLE_RESOLVED = 1 << 3, // Carrier-phase half-cycle ambiguity resolved
46 * Similar information about carrier phase signal tracking is still reported in these
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| D | IGnssMeasurement.hal | 35 * no clock discontinuities are expected and, when supported, carrier phase should be
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| /hardware/interfaces/vr/1.0/ |
| D | IVr.hal | 22 * called once from the VrManagerService during its boot phase.
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| /hardware/libhardware/modules/local_time/ |
| D | Android.bp | 18 // the oscillator backing the CLOCK_MONOTONIC implementation is phase locked to
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| /hardware/interfaces/gnss/1.0/ |
| D | IGnssMeasurementCallback.hal | 53 /** A valid 'carrier phase' is stored in the data structure. */
55 /** A valid 'carrier phase uncertainty' is stored in the data structure. */
441 * It is mandatory that this value be provided at typical carrier phase PRR
469 * 'carrier phase' is given by the equation:
470 * accumulated delta range = -k * carrier phase (where k is a constant)
517 * The RF phase detected by the receiver, in the range [0.0, 1.0].
518 * This is usually the fractional part of the complete carrier phase
522 * The value contains the 'carrier-phase uncertainty' in it.
530 * 1-Sigma uncertainty of the carrier-phase.
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| /hardware/interfaces/configstore/1.0/ |
| D | ISurfaceFlingerConfigs.hal | 22 * - The phase offset between hardware vsync and when apps are woken up by the
24 * - The phase offset between hardware vsync and when SurfaceFlinger wakes up
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| /hardware/interfaces/wifi/supplicant/1.0/ |
| D | ISupplicantStaIfaceCallback.hal | 101 * processing for the association phase and that data connection is
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| /hardware/interfaces/audio/effect/2.0/ |
| D | IEffect.hal | 259 * INVALID_STATE if the engine has finished the disable phase;
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| /hardware/interfaces/audio/effect/4.0/ |
| D | IEffect.hal | 243 * INVALID_STATE if the engine has finished the disable phase;
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| /hardware/interfaces/radio/1.0/ |
| D | types.hal | 1815 RadioCapabilityPhase phase;
|