| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/bfin/ |
| D | move2.s | 28 A0.X = A0.X;
29 A0.W = A0.W;
36 R2 = A0.W;
37 R3 = A0.X;
52 A0.X = R3;
53 A0.W = R2;
57 A0.X = A0.W;
58 A0.X = A1.W;
59 A0.X = A1.X;
62 A1.X = A0.W;
[all …]
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| D | arith_mode.s | 5 R0.L = A0;
6 R0.L = A0 (FU);
7 R0.L = A0 (IS);
8 R0.L = A0 (IU);
9 R0.L = A0 (T);
10 R0.L = A0 (TFU); // Not documented
11 R0.L = A0 (S2RND);
12 R0.L = A0 (ISS2);
13 R0.L = A0 (IH);
17 R0 = A0;
[all …]
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| D | move2.d | 24 20: 00 39 A0.X = A0.X;
25 22: 09 39 A0.W = A0.W;
30 2c: 11 31 R2 = A0.W;
31 2e: 18 31 R3 = A0.X;
44 48: 03 38 A0.X = R3;
45 4a: 0a 38 A0.W = R2;
48 50: 01 39 A0.X = A0.W;
49 52: 03 39 A0.X = A1.W;
50 54: 02 39 A0.X = A1.X;
52 58: 11 39 A1.X = A0.W;
[all …]
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| D | arith_mode.d | 9 0: 03 c0 00 38 R0.L = A0;
10 4: 83 c0 00 38 R0.L = A0 \(FU\);
11 8: 03 c1 00 38 R0.L = A0 \(IS\);
12 c: 83 c1 00 38 R0.L = A0 \(IU\);
13 10: 43 c0 00 38 R0.L = A0 \(T\);
14 14: c3 c0 00 38 R0.L = A0 \(TFU\);
15 18: 23 c0 00 38 R0.L = A0 \(S2RND\);
16 1c: 23 c1 00 38 R0.L = A0 \(ISS2\);
17 20: 63 c1 00 38 R0.L = A0 \(IH\);
18 24: 0b c0 00 38 R0 = A0;
[all …]
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| D | invalid_arith_mode.s | 7 R0.L = A0 (W32);
11 R0 = A0 (T);
12 R0 = A0 (TFU);
13 R0 = A0 (IH);
14 R0 = A0 (W32);
30 A0 = R1.L * R2.H (IU); define
31 A0 = R1.L * R2.H (T); define
32 A0 = R1.L * R2.H (TFU); define
33 A0 = R1.L * R2.H (S2RND); define
34 A0 = R1.L * R2.H (ISS2); define
[all …]
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| D | logical2.s | 47 R0.L = CC = BXORSHIFT(A0, R0);
48 R0.L = CC = BXORSHIFT(A0, R1);
50 R3.L = CC = BXORSHIFT(A0, R0);
51 R3.L = CC = BXORSHIFT(A0, R1);
54 R0.L = CC = BXOR(A0, R0);
55 R0.L = CC = BXOR(A0, R1);
57 R3.L = CC = BXOR(A0, R0);
58 R3.L = CC = BXOR(A0, R1);
61 R0.L = CC = BXOR(A0, A1, CC);
62 R0.L = CC = BXOR(A0, A1, CC);
[all …]
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| D | arithmetic.d | 9 0: 10 c4 [0-3][[:xdigit:]] 00 A0 = ABS A0;
10 4: 10 c4 [0-3][[:xdigit:]] 40 A0 = ABS A1;
11 8: 30 c4 [0-3][[:xdigit:]] 00 A1 = ABS A0;
13 10: 10 c4 [0-3][[:xdigit:]] c0 A1 = ABS A1, A0 = ABS A0;
66 80: 0b c4 [0-3][[:xdigit:]] c0 A0 -= A1;
67 84: 0b c4 [0-3][[:xdigit:]] e0 A0 -= A1 \(W32\);
74 90: 0b c4 [0-3][[:xdigit:]] 80 A0 \+= A1;
75 94: 0b c4 [0-3][[:xdigit:]] a0 A0 \+= A1 \(W32\);
80 a0: 0b c4 [0-3][[:xdigit:]] 0e R7 = \(A0 \+= A1\);
81 a4: 0b c4 [0-3][[:xdigit:]] 4c R6.L = \(A0 \+= A1\);
[all …]
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| D | move.d | 8 0: 38 31 R7 = A0.X;
33 32: 08 c4 [0|3][0|f] c0 A0 = A1;
34 36: 08 c4 [0|3][0|f] e0 A1 = A0;
35 3a: 09 c4 00 20 A0 = R0;
37 42: 8b c0 00 39 R4 = A0 \(FU\);
39 4a: 0b c0 80 39 R6 = A0;
41 52: 0f c0 80 39 R7 = A1, R6 = A0;
42 56: 8f c0 00 38 R1 = A1, R0 = A0 \(FU\);
57 66: 09 c4 28 40 A0.X = R5.L;
59 6e: 0a c4 3f 00 R0.L = A0.X;
[all …]
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| D | parallel2.d | 8 0: 08 cc 3f c0 A0 = A1 \|\| P0 = \[SP \+ 0x14\] \|\| NOP;
10 8: 08 cc 3f e0 A1 = A0 \|\| P0 = \[P5 \+ 0x18\] \|\| NOP;
12 10: 09 cc 00 20 A0 = R0 \|\| P0 = \[P4 \+ 0x1c\] \|\| NOP;
16 20: 8b c8 00 39 R4 = A0 \(FU\) \|\| P0 = \[P3 \+ 0x24\] \|\| NOP;
20 30: 0b c8 80 39 R6 = A0 \|\| P0 = \[P4 \+ 0x2c\] \|\| NOP;
24 40: 0f c8 80 39 R7 = A1, R6 = A0 \|\| P0 = \[P4 \+ 0x34\] \|\| NOP;
26 48: 8f c8 00 38 R1 = A1, R0 = A0 \(FU\) \|\| P0 = \[P4 \+ 0x38\] \|\| NOP;
28 50: 09 cc 28 40 A0.X = R5.L \|\| P0 = \[P4 \+ 0x3c\] \|\| NOP;
32 60: 0a cc 3f 00 R0.L = A0.X \|\| R1 = \[I0 \+\+ M1\] \|\| NOP;
36 70: 09 cc 18 00 A0.L = R3.L \|\| R0 = \[I0 \+\+ M3\] \|\| NOP;
[all …]
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| D | logical2.d | 31 2c: 0b c6 00 00 R0.L = CC = BXORSHIFT \(A0, R0\);
32 30: 0b c6 08 00 R0.L = CC = BXORSHIFT \(A0, R1\);
33 34: 0b c6 00 06 R3.L = CC = BXORSHIFT \(A0, R0\);
34 38: 0b c6 08 06 R3.L = CC = BXORSHIFT \(A0, R1\);
35 3c: 0b c6 00 40 R0.L = CC = BXOR \(A0, R0\);
36 40: 0b c6 08 40 R0.L = CC = BXOR \(A0, R1\);
37 44: 0b c6 00 46 R3.L = CC = BXOR \(A0, R0\);
38 48: 0b c6 08 46 R3.L = CC = BXOR \(A0, R1\);
39 4c: 0c c6 00 40 R0.L = CC = BXOR \(A0, A1, CC\);
40 50: 0c c6 00 40 R0.L = CC = BXOR \(A0, A1, CC\);
[all …]
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| D | shift.d | 18 c: 83 c6 08 41 A0 = A0 >> 0x1f;
19 10: 83 c6 f8 00 A0 = A0 << 0x1f;
36 4c: 03 c6 08 00 A0 = ASHIFT A0 BY R1.L;
50 70: 83 c6 f8 41 A0 = A0 >> 0x1;
51 74: 83 c6 00 00 A0 = A0 << 0x0;
60 94: 03 c6 30 40 A0 = LSHIFT A0 BY R6.L;
68 ac: 83 c6 00 80 A0 = ROT A0 BY 0x0;
69 b0: 83 c6 50 80 A0 = ROT A0 BY 0xa;
74 c4: 03 c6 38 80 A0 = ROT A0 BY R7.L;
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| D | parallel2.s | 2 A0 = A1 || P0 = [sp+20]; define
7 R4 = A0 (fu) || P0 = [p3+36];
11 R6 = A0, R7 = a1 || P0 = [P4+52];
14 A0.X = r5.l || p0 = [p4+60];
18 A0.L = r3.l || r0 = [i0 ++ m3];
20 A0.h = r6.H || r0 = [i1 ++ m2];
22 r0.l = A0 (iu) || r4 = [i1 ++ m0];
25 R2.l = A0, r2.H = A1 (IH) || r0 = [i2 ++ m2];
26 R2.l = A0, r2.H = A1 || r0 = [i2 ++ m3];
32 A0 = A0 >> 31 || r0 = [fp - 32]; define
[all …]
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| D | logical.d | 29 1a: 0b c6 00 4e R7.L = CC = BXOR \(A0, R0\);
30 1e: 0b c6 08 4e R7.L = CC = BXOR \(A0, R1\);
31 22: 0c c6 00 4a R5.L = CC = BXOR \(A0, A1, CC\);
32 26: 0c c6 00 48 R4.L = CC = BXOR \(A0, A1, CC\);
35 2a: 0b c6 38 06 R3.L = CC = BXORSHIFT \(A0, R7\);
36 2e: 0b c6 10 04 R2.L = CC = BXORSHIFT \(A0, R2\);
37 32: 0c c6 00 00 A0 = BXORSHIFT \(A0, A1, CC\);
38 36: 0c c6 00 00 A0 = BXORSHIFT \(A0, A1, CC\);
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| D | vector.d | 35 54: 11 c4 [c-f][[:xdigit:]] 0b R7 = A1 \+ A0, R5 = A1 - A0 \(NS\);
36 58: 11 c4 [c-f][[:xdigit:]] 6c R3 = A0 \+ A1, R6 = A0 - A1 \(S\);
66 a8: 00 c0 13 46 A1 = R2.L \* R3.H, A0 = R2.H \* R3.H;
67 ac: 01 c0 08 c0 A1 \+= R1.H \* R0.H, A0 = R1.L \* R0.L;
68 b0: 60 c0 2f c8 A1 = R5.H \* R7.H, A0 \+= R5.L \* R7.L \(W32\);
69 b4: 01 c1 01 c0 A1 \+= R0.H \* R1.H, A0 = R0.L \* R1.L \(IS\);
70 b8: 90 c0 1c c8 A1 = R3.H \* R4.H \(M\), A0 \+= R3.L \* R4.L \(FU\);
71 bc: 01 c0 24 96 A1 \+= R4.H \* R4.L, A0 -= R4.H \* R4.H;
72 c0: 25 c1 3e e8 R0.H = \(A1 \+= R7.H \* R6.H\), R0.L = \(A0 \+= R7.L \* R6.L\) \(ISS2\);
73 c4: 27 c0 81 28 R2.H = A1, R2.L = \(A0 \+= R0.L \* R1.L\) \(S2RND\);
[all …]
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| D | shift.s | 18 A0 = A0 >> 31; define
37 A0 = Ashift a0 by r1.l; define
55 A0 = A0 >> 1; define
56 A0 = A0 << 0; define
66 A0 = Lshift a0 By R6.L; define
76 a0 = rot A0 by 0;
77 A0 = ROT a0 BY 10; define
83 A0 = ROT A0 by r7.l; define
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| D | parallel.d | 20 30: 08 ce 08 00 BITMUX \(R1, R0, A0\) \(ASR\) \|\| I1 -= 0x4 \|\| NOP;
22 38: 08 ce 13 00 BITMUX \(R2, R3, A0\) \(ASR\) \|\| I0 \+= 0x2 \|\| NOP;
24 40: 08 ce 25 40 BITMUX \(R4, R5, A0\) \(ASL\) \|\| SP = \[P0\] \|\| NOP;
26 48: 08 ce 3e 40 BITMUX \(R7, R6, A0\) \(ASL\) \|\| FP = \[P1\+\+\] \|\| NOP;
32 60: 10 cc 3f 00 A0 = ABS A0 \|\| P2 = \[SP \+ 0x3c\] \|\| R0 = \[I0\];
34 68: 10 cc 3f 40 A0 = ABS A1 \|\| P3 = \[FP -0x3c\] \|\| R1 = \[I1 \+\+ M0\];
36 70: 30 cc 3f 00 A1 = ABS A0 \|\| P4 = \[FP -0x4\] \|\| R2 = \[I1\+\+\];
40 80: 10 cc 3f c0 A1 = ABS A1, A0 = ABS A0 \|\| R4 = \[P5 \+ 0x38\] \|\| R0.H = W\[I0\];
78 118: 0b cc 3f c0 A0 -= A1 \|\| B\[P4\] = R2 \|\| R2 = \[I1\+\+\];
80 120: 0b cc 3f e0 A0 -= A1 \(W32\) \|\| B\[P5\] = R2 \|\| R3 = \[I1\+\+\];
[all …]
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| D | arithmetic.s | 5 A0 = ABS A1; define
8 A1 = abs a1, a0 = ABS A0;
82 A0 -= A1;
93 A0 += A1 (w32);
99 r6.l = (A0 += a1);
130 A0 += R2.L * r3.H (FU);
131 A0 += r4.h * r1.L;
133 A0 -= R5.H * r2.H;
147 r0.L = (A0 = r1.h * R2.l) (tfu);
149 r3.l = (A0 += r7.H * r6.h) (T);
[all …]
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| D | move.s | 4 r7 = A0.X;
29 A0 = A1; define
34 R4 = A0 (fu);
38 R6 = A0, R7 = a1;
62 A0.X = r5.l;
66 A0.L = r3.l;
68 A0.h = r6.H;
70 r0.l = A0 (iu);
73 R2.l = A0, r2.H = A1 (IH);
74 R2.l = A0, r2.H = A1;
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| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/metag/ |
| D | metacore12.s | 7 ADD D0.7,D0.7,A0.7
31 ADDLE PC,D0Re0,A0.7
42 ADDLE D1Re0,D0.7,A0.7
49 ADDLE A1LbP,D0Re0,A0.7
56 ADDPL PCX,D0.7,A0.7
64 ADDNV A0.7,D0Re0,D0.7
69 ADDLE D1.7,D0Re0,A0.7
73 ADDNV A0.7,D0.7,D0.7
78 ADDLE D1.7,D0.7,A0.7
83 ADDLE RA,D0.7,A0.7
[all …]
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| D | metacore21.s | 7 ADD D0.7,D0.7,A0.7
34 ADDGE D0Re0,D0.7,A0.7
39 ADDVS TTCTRL,D0Re0,A0.7
48 ADDGE TTREC,D0Re0,A0.7
56 ADDVS A0.7,D0Re0,D1.7
58 ADDGT A1.7,D0Re0,A0.7
60 ADDNE A0.7,D0.7,D0.7
61 ADDVS A0.7,D0.7,D1Re0
66 ADDGT RA,D0.7,A0.7
75 ADDVS RAWX,D0.7,A0.7
[all …]
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| D | metacore21.d | 15 .*: 0039fe01 ADD D0\.7,D0\.7,A0\.7
42 .*: 0401fe37 ADDGE D0Re0,D0\.7,A0\.7
47 .*: 04083f0f ADDVS TTCTRL,D0Re0,A0\.7
56 .*: 04183f17 ADDGE TTREC,D0Re0,A0\.7
64 .*: 04381e6f ADDVS A0\.7,D0Re0,D1\.7
66 .*: 04383e9b ADDGT A1\.7,D0Re0,A0\.7
68 .*: 0439ce64 ADDNE A0\.7,D0\.7,D0\.7
69 .*: 0439d06f ADDVS A0\.7,D0\.7,D1Re0
74 .*: 0481fedb ADDGT RA,D0\.7,A0\.7
83 .*: 04e9fecf ADDVS RAWX,D0\.7,A0\.7
[all …]
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| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-metag/ |
| D | stub_pic_shared.d | 9 .*: 82900101 ADDT A0.2,CPC0,#0x20
10 .*: 82120660 ADD A0.2,A0.2,#0x40cc
11 .*: a3100c20 MOV D0Re0,A0.2
15 .*: 82900101 ADDT A0.2,CPC0,#0x20
16 .*: 82120580 ADD A0.2,A0.2,#0x40b0
17 .*: c600806a GETD PC,\[A0.2\]
22 .*: 82980101 ADDT A0.3,CPC0,#0x20
23 .*: 82180100 ADD A0.3,A0.3,#0x20
24 .*: a3180ca0 MOV PC,A0.3
29 .*: 829ffef9 ADDT A0.3,CPC0,#0xffdf
[all …]
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| D | stub_pic_app.d | 15 .*: 82108105 MOVT A0.2,#0x1020
16 .*: 821496e0 ADD A0.2,A0.2,#0x92dc
17 .*: c600806a GETD PC,\[A0.2\]
22 .*: 82188105 MOVT A0.3,#0x1020
23 .*: ac1a91a3 JUMP A0.3,#0x5234
24 .*: 82188105 MOVT A0.3,#0x1020
25 .*: ac1a9183 JUMP A0.3,#0x5230
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| D | stub_shared.d | 10 .*: 82900001 ADDT A0.2,CPC0,#0
11 .*: 82120700 ADD A0.2,A0.2,#0x40e0
12 .*: a3100c20 MOV D0Re0,A0.2
16 .*: 82900001 ADDT A0.2,CPC0,#0
17 .*: 82120620 ADD A0.2,A0.2,#0x40c4
18 .*: c600806a GETD PC,\[A0.2\]
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| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/tic6x/ |
| D | predicate-bad-2.s | 5 [A0] nop
11 [!A0] nop
18 [A0] nop
24 [!A0] nop
31 [A0] nop
37 [!A0] nop
44 [A0] nop
50 [!A0] nop
57 [A0] nop
63 [!A0] nop
[all …]
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