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Searched refs:AVR_INSN (Results 1 – 6 of 6) sorted by relevance

/toolchain/binutils/binutils-2.27/include/opcode/
Davr.h147 AVR_INSN (clc, "", "1001010010001000", 1, AVR_ISA_1200, 0x9488)
148 AVR_INSN (clh, "", "1001010011011000", 1, AVR_ISA_1200, 0x94d8)
149 AVR_INSN (cli, "", "1001010011111000", 1, AVR_ISA_1200, 0x94f8)
150 AVR_INSN (cln, "", "1001010010101000", 1, AVR_ISA_1200, 0x94a8)
151 AVR_INSN (cls, "", "1001010011001000", 1, AVR_ISA_1200, 0x94c8)
152 AVR_INSN (clt, "", "1001010011101000", 1, AVR_ISA_1200, 0x94e8)
153 AVR_INSN (clv, "", "1001010010111000", 1, AVR_ISA_1200, 0x94b8)
154 AVR_INSN (clz, "", "1001010010011000", 1, AVR_ISA_1200, 0x9498)
156 AVR_INSN (sec, "", "1001010000001000", 1, AVR_ISA_1200, 0x9408)
157 AVR_INSN (seh, "", "1001010001011000", 1, AVR_ISA_1200, 0x9458)
[all …]
DChangeLog-04151374 (AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
/toolchain/binutils/binutils-2.27/opcodes/
Davr-dis.c39 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ macro
DChangeLog-02031062 (AVR_INSN): No longer provide bin_mask field in initializer.
/toolchain/binutils/binutils-2.27/gas/config/
Dtc-avr.c48 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ macro
/toolchain/binutils/binutils-2.27/gas/
DChangeLog-20111644 (AVR_INSN): Change definition to match.