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Searched refs:D64 (Results 1 – 3 of 3) sorted by relevance

/toolchain/binutils/binutils-2.27/opcodes/
Dmips-opc.c378 #define D64 ASE_DSP64 macro
1227 {"ldx", "d,t(b)", 0x7c00020a, 0xfc0007ff, WR_1|RD_2|RD_3|LM, 0, IOCT2, D64, 0},
2135 {"absq_s.pw", "d,t", 0x7c000456, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2136 {"absq_s.qh", "d,t", 0x7c000256, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2139 {"addq.pw", "d,s,t", 0x7c000494, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2140 {"addq.qh", "d,s,t", 0x7c000294, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2142 {"addq_s.pw", "d,s,t", 0x7c000594, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2143 {"addq_s.qh", "d,s,t", 0x7c000394, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2146 {"addu.ob", "d,s,t", 0x7c000014, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2148 {"addu_s.ob", "d,s,t", 0x7c000114, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
[all …]
DChangeLog-2013958 * mips-opc.c (M3D, SMT, MX, IVIRT, IVIRT64, D32, D33, D64,
/toolchain/benchmark/panorama_input/
Dtest_008.ppm8188 …o5Kp6W|BVv>e�Me�O]xFhZOfA),310501)%&/*,501<78.)*-*,(&'360:=7;D64=/,=#!3'=,B53 …