Searched refs:Disp32S (Results 1 – 8 of 8) sorted by relevance
| /toolchain/binutils/binutils-2.27/opcodes/ |
| D | i386-opc.tbl | 26 …4, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
30 …S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
38 …No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { SReg2, Word|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
40 …No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { SReg3, Word|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
42 …No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Word|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, SReg2 }
44 …No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Word|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, SReg3 }
56 …f|No_ldSuf, { Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg6…
57 …No_ldSuf, { Reg16|Reg32|Reg64, Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
62 …uf|No_sSuf|No_qSuf|No_ldSuf, { Reg8|Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32 }
63 …uf|No_sSuf|No_qSuf|No_ldSuf, { Reg8|Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16 }
[all …]
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| D | i386-opc.h | 708 Disp32S, enumerator
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| D | ChangeLog | 63 * i386-opc.tbl (jmp): Remove Disp32S from non-64-bit variant.
68 Remove Disp32S from non-64-bit variants. Remove Disp16 from
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| D | i386-gen.c | 615 BITFIELD (Disp32S),
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| D | ChangeLog-2011 | 257 * i386-opc.tbl: Add Disp32S to 64bit call.
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| D | ChangeLog-2008 | 935 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
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| D | ChangeLog-2007 | 840 (Disp32S): Likewise.
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| /toolchain/binutils/binutils-2.27/gas/ |
| D | ChangeLog-0001 | 3739 (Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros.
3747 (Disp): Add Disp64 and Disp32S.
3748 (AnyMem): Add Disp32S.
3766 (mode_from_disp_size): Support Disp32S.
3775 output of 64bit immediates, handling of Imm32S and Disp32S type.
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