Searched refs:QI (Results 1 – 24 of 24) sorted by relevance
59 #define DIVQI(x, y) ((QI) (x) / (QI) (y))61 #define MODQI(x, y) ((QI) (x) % (QI) (y))63 #define SRAQI(x, y) ((QI) (x) >> (y))66 extern QI RORQI (QI, int);67 extern QI ROLQI (QI, int);72 #define NOTQI(x) (! (QI) (x))75 #define EQQI(x, y) ((QI) (x) == (QI) (y))76 #define NEQI(x, y) ((QI) (x) != (QI) (y))77 #define LTQI(x, y) ((QI) (x) < (QI) (y))78 #define LEQI(x, y) ((QI) (x) <= (QI) (y))[all …]
34 typedef int8_t QI; typedef
496 (sequence ((QI f))517 (sequence ((QI f))648 (sequence ((QI f))669 (sequence ((QI f))750 (set rd (ext DI (mem QI (add rm (ext DI disp10))))))768 (set rd (zext DI (mem QI (add rm (ext DI disp10))))))814 (set rd (ext DI (mem QI (add rm rn)))))850 (sequence ((QI result7) (QI result6) (QI result5) (QI result4)851 (QI result3) (QI result2) (QI result1) (QI result0))852 (set result0 (expr (subword QI rm 7) (subword QI rn 7)))[all …]
298 (type register QI (16))313 (type register QI (16))328 (type register QI (4))348 (type register QI (36))677 (arithmetic16 addbrpof addb add OP1_0 OP2_3 regb8 upof16 QI "pof")678 (arithmetic16 subbrpof subb sub OP1_2 OP2_3 regb8 upof16 QI "pof")681 (arithmetic16 addbrpag addb add OP1_0 OP2_3 regb8 upag16 QI "pag")682 (arithmetic16 subbrpag subb sub OP1_2 OP2_3 regb8 upag16 QI "pag")697 (arithmetic17 addcbrpof addcb addc OP1_1 OP2_3 regb8 upof16 QI "pof")698 (arithmetic17 subcbrpof subcb subc OP1_3 OP2_3 regb8 upof16 QI "pof")[all …]
234 ; QI mode gr encoding for m32c is different than for m16c. The hardware242 (df f-src32-rn-unprefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 10 2 UINT246 ; QI mode gr encoding for m32c is different than for m16c. The hardware254 (df f-src32-rn-prefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 18 2 UINT302 (dnf f-dst16-rn-QI-s "destination Rn for m16c" (MACH16 m16c-isa) 5 1)310 ; QI mode gr encoding for m32c is different than for m16c. The hardware318 (df f-dst32-rn-unprefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 8 2 UINT322 (df f-dst32-rn-prefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 16 2 UINT576 (sll (ext INT (trunc QI (and value #xff))) 16)))579 (sll (ext INT (trunc QI (and value #xff))) 16)))[all …]
239 (type register QI (128))240 (get (index) (c-call QI "get_spr" index ))248 ;; (type register QI (128))257 (type register QI (512))258 (get (index) (c-call QI "get_h_registers" index ))271 (dsh h-pabits "page bits" () (register QI))318 (add-cflag (sll QI a 4) (sll QI b 4) c)322 (sub-cflag (sll QI a 4) (sll QI b 4) c)569 (sequence ((QI result) (BI newcbit) (QI isLreg) (HI 16bval))601 (sequence ((QI result) (BI newcbit))[all …]
431 (sll HI (nflag QI (srl value (mul ws 8))) 6))))557 (set-mem-psw (mem QI lmem8) (and imm16 #xFF) ws2))567 (set-mem-psw (mem QI hmem8) (and imm16 #xFF) ws2))578 (set-psw Rm (index-of Rm) (mem QI lmem8) ws2))588 (set-psw Rm (index-of Rm) (mem QI hmem8) ws2))599 (set-mem-psw (mem QI lmem8) Rm ws2))609 (set-mem-psw (mem QI hmem8) Rm ws2))620 (set-psw Rdm (index-of Rdm) (and #xFF (mem QI Rs)) ws2))632 (set-psw Rdm (index-of Rdm) (and #xFF (mem QI Rs)) ws2))646 (set-psw Rdm (index-of Rdm) (and #xFF (mem QI Rs)) ws2)))[all …]
675 (binary-logical-op-m andb andb "reg/mem" OP1_8 OP2_6 QI and Rj Ri)678 (binary-logical-op-m orb orb "reg/mem" OP1_9 OP2_6 QI or Rj Ri)681 (binary-logical-op-m eorb eorb "reg/mem" OP1_9 OP2_E QI xor Rj Ri)690 (set QI (mem QI Ri)691 (and QI692 (or QI u4 (const #xf0))693 (mem QI Ri)))702 (set QI (mem QI Ri) (or QI u4 (mem QI Ri)))711 (set QI (mem QI Ri) (xor QI u4 (mem QI Ri)))722 (set QI (mem QI Ri)[all …]
32 (define-pmacro (QI-ext x) "How to sign-extend a byte to dword" (ext SI x))35 (define-pmacro (QI-zext x) "How to zero-extend a byte to dword" (zext SI x))326 ((crisv32-timing-c-QI crisv32-timing-c-HI)372 (define-pmacro cris-timing-const-QI cris-timing-const-HI)373 (define-pmacro cris-timing-const-sr-QI cris-timing-const-sr-HI)383 (QI 0) (QI 1) (HI 4) (SI 8))442 ((SI 2) (QI 3)449 (QI 0) (QI 1) (HI 4) (SI 8))1751 (fsem QI)1772 (fsem QI))[all …]
496 (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI imm))))))503 (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI imm))))))594 (set (mem QI (add r0 (ext SI (trunc HI imm)))) r1)601 (set r2 (ext SI (trunc QI r0)))806 (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI gp16))))))813 (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI gp16))))))841 (set (mem QI (add r0 (ext SI (trunc HI gp16)))) r1)918 (set (mem QI (add r0 (ext SI (trunc HI gotofflo16)))) r1)925 (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI gotofflo16))))))932 (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI gotofflo16))))))
112 (set (mem QI (add rma (ext SI cdisp12))) (and crn #xff)))121 (set crn (ext SI (mem QI (add rma (ext SI cdisp12))))))130 (set crn (zext SI (mem QI (add rma (ext SI cdisp12))))))169 (set crn (zext SI (mem QI rma)))189 (set crn (zext SI (mem QI rma)))209 (set crn (zext SI (mem QI rma)))
325 (define-pmacro (xd x) (reg h-xd (and (index-of x) (inv QI 1))))337 (set rn (add rn (ext SI (and QI imm8 255)))))470 (set tbit (eq r0 (ext SI (and QI imm8 255)))))609 (set rn (ext SI (subword QI rm 3))))621 (set rn (zext SI (subword QI rm 3))))685 (sequence ((QI m) (QI n) (SF res))888 (sequence ((QI n) (SF res))1074 (set rn (ext DI (and QI imm8 255))))1117 (set rn (ext SI (mem QI rm))))1123 (sequence ((QI data))[all …]
263 (set avc2c3CRq (ext SI (and QI (srl avc2c3CRq 0) #xff)))277 (set avc2c3CRq (zext SI (and QI (srl avc2c3CRq 0) #xff)))489 (set avc2c3CRq (sra avc2c3CRq (and QI (srl avc2c3CRp 0) #x1f)))496 (set avc2c3CRq (srl avc2c3CRq (and QI (srl avc2c3CRp 0) #x1f)))503 (set avc2c3CRq (sll avc2c3CRq (and QI (srl avc2c3CRp 0) #x1f)))531 (set avc2c3CRq (subword SI (sll (or (sll (zext DI avc2c3CRq) 32) (zext DI avc2c3CRp)) (and QI (srl …538 …l (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) …545 …l (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) …922 (set concat38 (sra (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCC…931 (set concat39 (sra (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCC…[all …]
1387 (load-op b OP2_8 QI ext-expr)1389 (load-op ub OP2_9 QI zext-expr)2076 (store-op b OP2_0 QI)2120 (set (mem QI new-src2) src1)2395 (or USI (zext SI (inv QI uimm8)) (const #xff00))))2413 (set QI (mem QI (add sr slo16))2414 (or QI (mem QI (add sr slo16))2415 (sll QI (const 1) (sub (const 7) uimm3))))2424 (set QI (mem QI (add sr slo16))2425 (and QI (mem QI (add sr slo16))[all …]
259 (set avcc3CRq (ext SI (and QI (srl avcc3CRq 0) #xff)))273 (set avcc3CRq (zext SI (and QI (srl avcc3CRq 0) #xff)))485 (set avcc3CRq (sra avcc3CRq (and QI (srl avcc3CRp 0) #x1f)))492 (set avcc3CRq (srl avcc3CRq (and QI (srl avcc3CRp 0) #x1f)))499 (set avcc3CRq (sll avcc3CRq (and QI (srl avcc3CRp 0) #x1f)))527 …SI (sll (or (sll (zext DI (zext SI avcc3CRq)) 32) (zext DI avcc3CRp)) (and QI (srl avccopCCR0 0) #…534 …sll (or (sll (zext DI (zext SI avccopCCR2)) 32) (zext DI avccopCCR3)) (and QI (srl avccopCCR0 0) #…541 …sll (or (sll (zext DI (zext SI avccopCCR4)) 32) (zext DI avccopCCR5)) (and QI (srl avccopCCR0 0) #…852 (set avcv1CRq (ext SI (and QI (srl avcv1CRq 0) #xff)))866 (set avcv1CRq (zext SI (and QI (srl avcv1CRq 0) #xff)))[all …]
1137 (set rnc (ext SI (mem QI rma)))1198 (set (mem QI (add (zext SI udisp7) tp)) (and rn3c #xff)))1226 (set rn3c (ext SI (mem QI (add (zext SI udisp7) tp))))1250 (set rn3uc (zext SI (mem QI (add (zext SI udisp7) tp))))1268 (set (mem QI (add rma (ext SI sdisp16))) (and rnc #xff)))1296 (set rnc (ext SI (mem QI (add rma (ext SI sdisp16)))))1320 (set rnuc (zext SI (mem QI (add rma (ext SI sdisp16)))))1355 (set rn (ext SI (and QI rn #xff)))1683 (sequence ((DI temp) (QI shamt))2626 (set (mem QI rma) (and crn #xff))[all …]
979 (set rt (ext WI (mem QI (add base (ext SI (trunc HI lo16))))))990 (set rt (zext WI (mem QI (add base (ext SI (trunc HI lo16))))))1036 (set (mem QI (add base (ext SI (trunc HI lo16)))) (and QI rt #xFF))
2918 (sll DI (ext DI (trunc QI (reg h-spr (add index 1472))))3769 (sequence ((BI tmp) (QI cc) (SI result))3822 (sequence ((WI shift) (SI tmp) (QI cc))3824 (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r)3850 (sequence ((DI tmp) (QI cc))3972 (sequence ((WI tmp) (QI cc))4143 (sequence ((BI tmp) (QI cc) (SI result))4204 (sequence ((WI shift) (SI tmp) (QI cc))4206 (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r)4244 (sequence ((WI tmp) (QI cc))[all …]
632 (set WI rD (ext WI (mem QI (load-store-addr rA simm16 1))))980 (extbh-insn extbs ext WI QI)
1550 (load-insn ldrb QI OPW_BYTE load-from-ea)1607 (testset-insn testsetb QI OPW_BYTE)1770 (store-insn strb QI OPW_BYTE store-to-ea)
467 (rot32.b): QI, not SI.
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