/toolchain/binutils/binutils-2.27/include/opcode/ |
D | spu-insns.h | 143 APUOP(M_STOP, RR, 0x000, "stop", _A0(), 00000, BR) /* STOP stop */ 144 APUOP(M_STOP2, RR, 0x000, "stop", _A1(A_U14), 00000, BR) /* STOP stop */ 145 APUOP(M_STOPD, RR, 0x140, "stopd", _A3(A_T,A_A,A_B), 00111, BR) /* STOPD stop (wit… 146 APUOP(M_LNOP, RR, 0x001, "lnop", _A0(), 00000, LNOP) /* LNOP no_operation */ 147 APUOP(M_SYNC, RR, 0x002, "sync", _A0(), 00000, BR) /* SYNC flush_pipe */ 148 APUOP(M_DSYNC, RR, 0x003, "dsync", _A0(), 00000, BR) /* DSYNC flush_store_queue */ 149 APUOP(M_MFSPR, RR, 0x00c, "mfspr", _A2(A_T,A_S), 00002, SPR) /* MFSPR RT<-SA */ 150 APUOP(M_RDCH, RR, 0x00d, "rdch", _A2(A_T,A_H), 00002, SPR) /* ReaDCHannel RT<-CA:data */ 151 APUOP(M_RCHCNT, RR, 0x00f, "rchcnt", _A2(A_T,A_H), 00002, SPR) /* ReaDCHanCouNT RT<-CA:count */ 160 APUOP(M_MTSPR, RR, 0x10c, "mtspr", _A2(A_S,A_T), 00001, SPR) /* MTSPR SA<-RT */ [all …]
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D | spu.h | 30 RR, enumerator
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/toolchain/binutils/binutils-2.27/opcodes/ |
D | i370-opc.c | 293 #define RR(op, r1, r2) \ macro 297 #define RR_MASK RR (0xff, 0x0, 0x0) 479 { "ar", 2, {{RR(0x1a,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} }, 480 { "adr", 2, {{RR(0x2a,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} }, 481 { "aer", 2, {{RR(0x3a,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} }, 482 { "alr", 2, {{RR(0x1e,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} }, 483 { "aur", 2, {{RR(0x2e,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} }, 484 { "awr", 2, {{RR(0x3e,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} }, 485 { "axr", 2, {{RR(0x36,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} }, 486 { "balr", 2, {{RR(0x05,0,0), 0}}, {{RR_MASK, 0}}, I370, {RR_R1, RR_R2} }, [all …]
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D | ia64-raw.tbl | 197 RR#; IC:mov-to-IND-RR+6; IC:mem-readers, IC:mem-writers, itc.i, itc.d, itr.i, itr.d, IC:non-access,… 198 RR#; IC:mov-to-IND-RR+6; IC:mov-from-IND-RR+6; impliedF
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D | ia64-waw.tbl | 139 RR#; IC:mov-to-IND-RR+6; IC:mov-to-IND-RR+6; impliedF
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D | ia64-ic.tbl | 133 mov-from-IND-RR; IC:mov-from-IND[Field(ireg) == rr] 202 mov-to-IND-RR; IC:mov-to-IND[Field(ireg) == rr]
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/hppa/unsorted/ |
D | brlenbug.s | 1414 ldo RR'L$C0016(%r1),%r1 ;# 8836 movhi-2 1420 ldo RR'L$C0017(%r1),%r1 ;# 8838 movhi-2 1429 ldo RR'L$C0018(%r1),%r1 ;# 8843 movhi-2 1438 ldo RR'L$C0019(%r1),%r1 ;# 8848 movhi-2 1447 ldo RR'L$C0020(%r1),%r1 ;# 8853 movhi-2 1456 ldo RR'L$C0021(%r1),%r1 ;# 8858 movhi-2 1465 ldo RR'L$C0022(%r1),%r1 ;# 8863 movhi-2 1474 ldo RR'L$C0023(%r1),%r1 ;# 8868 movhi-2 1483 ldo RR'L$C0024(%r1),%r1 ;# 8873 movhi-2 1492 ldo RR'L$C0025(%r1),%r1 ;# 8878 movhi-2 [all …]
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/toolchain/binutils/binutils-2.27/gas/config/ |
D | tc-arm.c | 19069 tCE("and", 0000000, _and, 3, (RR, oRR, SH), arit, t_arit3c), 19070 tC3("ands", 0100000, _ands, 3, (RR, oRR, SH), arit, t_arit3c), 19071 tCE("eor", 0200000, _eor, 3, (RR, oRR, SH), arit, t_arit3c), 19072 tC3("eors", 0300000, _eors, 3, (RR, oRR, SH), arit, t_arit3c), 19073 tCE("sub", 0400000, _sub, 3, (RR, oRR, SH), arit, t_add_sub), 19074 tC3("subs", 0500000, _subs, 3, (RR, oRR, SH), arit, t_add_sub), 19075 tCE("add", 0800000, _add, 3, (RR, oRR, SHG), arit, t_add_sub), 19076 tC3("adds", 0900000, _adds, 3, (RR, oRR, SHG), arit, t_add_sub), 19077 tCE("adc", 0a00000, _adc, 3, (RR, oRR, SH), arit, t_arit3c), 19078 tC3("adcs", 0b00000, _adcs, 3, (RR, oRR, SH), arit, t_arit3c), [all …]
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/toolchain/binutils/binutils-2.27/binutils/testsuite/binutils-all/mips/ |
D | mips16-undecoded.s | 163 # RR major opcode
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/toolchain/binutils/binutils-2.27/gas/doc/ |
D | c-s390.texi | 164 For example, the @samp{lr} mnemonic denotes the instruction format @samp{RR} 379 @item RR format: <insn> R1,R2
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/toolchain/binutils/binutils-2.27/cpu/ |
D | ip2k.cpu | 150 TEST NOT INC DECSZ RR RL SWAP INCSZ
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/toolchain/benchmark/panorama_input/ |
D | test_034.ppm | 81 ''#/LRYX^eTZ_Z`egnpipsa�dh�kX�SW�RR�OT�QV�TV�TS�TR�SQ�RP�QQ�RR�SR�SR�SR�VR�VR�SR�SS�fY�l[��[��Y… 90 ''".KQXX^eTZ_[afgmqdin`�eg�lW�RV�QS�PV�RV�TV�TS�TR�SS�TR�SQ�RQ�RR�SR�SQ�TQ�TR�QR�QS�eY�k_��]��X… 96 ''".JPWX^eV[`^dheko]bgStVf�hT�RT�RY�VV�RT�ST�SQ�RR�SS�TS�TP�QQ�RS�TQ�RR�VR�VQ�RR�SV�gZ�l_��_��^… 104 ''".JPWX^eW]a`fk]bgHMR]}ag�lV�VW�WX�TT�QT�ST�SQ�RQ�RQ�RR�SS�TS�TR�SQ�RQ�TQ�TQ�WR�XW�kg�{}������… 116 ,*)&#/JPWY_fW]aW]aDJO`fkf�kf�kW�WX�XV�TT�SV�TT�SR�SR�SQ�RR�SS�TR�SR�SR�SR�VQ�TQ�WQ�WR�iV�mQ… 133 *%#0JPYY_hQW[?EJ^dhntxd�ke�lT�TV�VV�TV�TV�TT�SR�VR�VR�VS�WS�TS�TR�SQ�RR�VR�VQ�VQ�VO�gV�nT��T��T… 184 )(%,17>KQX]bg`fkbhmekod�hg�lT�TS�ST�VV�WT�VT�VR�VR�VR�VR�VQ�TR�VR�VQ�TR�VR�VQ�RR�SR�iY�pX��W… 225 … !-OT[Z`gVZ_afkhnpkpsa�fa�fS�RT�ST�VT�VT�VT�VR�VR�VP�QP�QR�SQ�RQ�RR�SR�VR�VR�VR�VQ�oV�tS��T��S��… 242 !!-KQXZ`gVZ_`eignphoq]�ba�gT�VT�VT�VV�WV�WT�VR�VR�VR�SQ�RR�SR�SR�SR�SR�SR�SR�SR�SR�sV�vQ��S��S��S…
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D | test_003.ppm | 3727 ,7lvY|�i`hHksR[d>T]7T[36=BH#FL(JK*>? -%( B?RROOmq.{<KR 5187 …7: YY?mmSxv[{x^��o��n��s��u��t��d}|_��t��~��t}~`��gggM{{a��u�~f|z_PM386 DB,RR;55 () &!')��… 5208 (60.<64������ii]||o{}apsWSV<`bI=>*AB.RR;DD-gfIhgJvuX}|_��h��p��{��|��u��t��w��x|}_ST6]Z?��h~z`{… 7137 !CJ.PT<SX?RT=WYB]]EZZCRR.bb>__6nnExxR��`dd=RR,WW.SS*YW1b`;ZS/ZS/aW6|qQugHi[<hZ;ugH|kJ�sRqdBwiH��]… 9443 …ZSK_VK[RH[RHulanfVXP?eZJ`VE_TDZP?bYEg^J`WCsiVpkOvpTgeBliF?=ECin-��J~�7dkRRTT LI-DA%4/>:%[VH83…
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D | test_006.ppm | 18 A)-'J34I3-nXR{nPh[=RR"114<:B5BDQ#?L!1>0<!-&1-8 2595 (=",D)3>#(8"*Q7<_OIH71qiXQI788!RR;AD/<?*<?* */ 3817 B8 AARR"af%uz8~�>MV 7190 …mhA{vO�|I{H�{PYS()!*#F?7PF<`WLbZJZRBkdLg`IvsTolMSP/TQ0JL'`b=_a7qtJee>RR,]T5phI^Q3qeFgT8_L0n]…
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D | test_012.ppm | 6916 …lh0qn6|{Bvu<��Y��M��[��_�~a ?4*F</VK>^SFbXKbTE[M>�zVslHki=��]usKHEII RR);=;=KM#ad:WX,>?IJ… 8737 …hQtJFi?_�XOvIPwJJoCSxLRxHQwFFm<7^-KtBX�OO{Ce�Y_�Sb�W^�OQwBDh3Y}Hi�]d�W_�S^�RR{Il�bk�_^�ROuB?f3Io<Y…
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D | test_007.ppm | 3032 4. KE7HB1KE5f_H]V>EERR)am*u�>z�Akx1W`(=F()"?;#CD&CD&:< …
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D | test_008.ppm | 7607 …B~`=�dA�g>�}T��S��`��W��]��kƬv��g��R�n>hS#lV(v`3x`6�qHoY0_I _O'C3-'<6KKRR EM_g.S`%MZ>J-8(>…
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D | test_011.ppm | 6370 ()6RR;b]L^XH{m_zl^;,vgX.0 "!1'70#/EDZ&4)A 7L/"CW'.B(…
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/toolchain/binutils/binutils-2.27/gas/ |
D | ChangeLog-2010 | 764 of just RR.
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D | ChangeLog-9697 | 1170 (hppa_fix_adjustable): Don't adjust anything with a RR% or LR% 5016 any reloc with an LR% or RR% field selector for SOM.
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D | ChangeLog-0001 | 5585 * config/tc-hppa.c (hppa_fix_adjustable): Correct LR%/RR% comment. 5619 the comment for symbols involved in LR% and RR% expressions.
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D | ChangeLog-0203 | 6499 that implicitly use LR and RR selectors.
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/toolchain/binutils/binutils-2.27/bfd/ |
D | ChangeLog-9193 | 3539 * hppa.c (round_down,round,round_up,L,R,LS,RS,LD,RD,LR,RR): Make 3653 LR, RR, hppa_field_adjust): New functions.
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D | ChangeLog-9495 | 7061 the final value twice for LR and RR field selectors.
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