| /toolchain/binutils/binutils-2.27/gas/ |
| D | flonum-konst.c | 186 #define X (LITTLENUM_TYPE *) macro
189 {X zero, X zero, X zero, 0, '+'},
190 {X minus_1, X minus_1 + 19, X minus_1 + 19, -20, '+'},
191 {X minus_2, X minus_2 + 19, X minus_2 + 19, -20, '+'},
192 {X minus_3, X minus_3 + 19, X minus_3 + 19, -20, '+'},
193 {X minus_4, X minus_4 + 18, X minus_4 + 18, -20, '+'},
194 {X minus_5, X minus_5 + 16, X minus_5 + 16, -20, '+'},
195 {X minus_6, X minus_6 + 13, X minus_6 + 13, -20, '+'},
196 {X minus_7, X minus_7 + 6, X minus_7 + 6, -20, '+'},
197 {X minus_8, X minus_8 + 13, X minus_8 + 13, -40, '+'},
[all …]
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| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mmix/ |
| D | regt-op.s | 3 Main LDA X,Y,Z
7 LDO X,Y,$73
9 LDW X,$38,$212
12 LDB X,Y,Z0
16 STHT X,Y,203
18 CSWAP X,$38,211
21 LDA X,Y
22 LDB X,Y
23 LDT X,Y
24 LDBU X,Y
[all …]
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| D | regt-op.l | 6 3 0000 22170C43 Main LDA X,Y,Z
10 7 0010 8C170C49 LDO X,Y,\$73
12 9 0018 841726D4 LDW X,\$38,\$212
15 12 0020 81170CB0 LDB X,Y,Z0
19 16 0030 B3170CCB STHT X,Y,203
21 18 0038 951726D3 CSWAP X,\$38,211
24 21 0040 23170C00 LDA X,Y
25 22 0044 81170C00 LDB X,Y
26 23 0048 89170C00 LDT X,Y
27 24 004c 83170C00 LDBU X,Y
[all …]
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| D | regx-op.s | 1 # For insns where X is a constant: 'X'-type operands.
3 Main PRELD X,Y,Z
5 SYNCD X,$32,Z
7 STCO X,Y,$73
9 PRELD X,$38,$212
12 SYNCD X,Y,Z0
14 STCO X,$132,Z0
16 PRELD X,Y,203
18 SYNCD X,$38,211
21 STCO X,Y,0
[all …]
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| D | regy-op.s | 3 Main NEG X,Y,Z
5 NEG X,32,Z
7 NEG X,Y,$73
9 NEG X,38,$212
12 NEG X,Y,Z0
14 NEG X,132,Z0
16 NEG X,Y,203
18 NEG X,38,211
21 NEG X,Y,0
26 NEG X,Z
[all …]
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| D | pushgo-op.s | 1 # PUSHGO. Like T, but $X can be expressed as a constant.
3 Main PUSHGO X,Y,Z
7 PUSHGO X,$32,Z
11 PUSHGO X,Y,$73
15 PUSHGO X,$38,$212
20 PUSHGO X,Y,Z0
24 PUSHGO X,$32,Z0
28 PUSHGO X,Y,203
32 PUSHGO X,$38,211
37 PUSHGO X,Y
[all …]
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| D | regy-op.l | 6 3 0000 347B0C43 Main NEG X,Y,Z
8 5 0008 347B2043 NEG X,32,Z
10 7 0010 347B0C49 NEG X,Y,\$73
12 9 0018 347B26D4 NEG X,38,\$212
15 12 0020 357B0CB0 NEG X,Y,Z0
17 14 0028 357B84B0 NEG X,132,Z0
19 16 0030 357B0CCB NEG X,Y,203
21 18 0038 357B26D3 NEG X,38,211
24 21 0040 357B0C00 NEG X,Y,0
29 26 0050 347B0043 NEG X,Z
[all …]
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| D | regx-op.l | 6 3 0000 9A7B0C43 Main PRELD X,Y,Z
8 5 0008 B87B2043 SYNCD X,\$32,Z
10 7 0010 B47B0C49 STCO X,Y,\$73
12 9 0018 9A7B26D4 PRELD X,\$38,\$212
15 12 0020 B97B0CB0 SYNCD X,Y,Z0
17 14 0028 B57B84B0 STCO X,\$132,Z0
19 16 0030 9B7B0CCB PRELD X,Y,203
21 18 0038 B97B26D3 SYNCD X,\$38,211
24 21 0040 B57B0C00 STCO X,Y,0
28 25 0050 B97B0C00 SYNCD X,Y,0
[all …]
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| D | pushgo-op.l | 6 3 0000 BE170C43 Main PUSHGO X,Y,Z
10 7 0010 BE172043 PUSHGO X,\$32,Z
14 11 0020 BE170C49 PUSHGO X,Y,\$73
18 15 0030 BE1726D4 PUSHGO X,\$38,\$212
23 20 0040 BF170CB0 PUSHGO X,Y,Z0
27 24 0050 BF1720B0 PUSHGO X,\$32,Z0
31 28 0060 BF170CCB PUSHGO X,Y,203
35 32 0070 BF1726D3 PUSHGO X,\$38,211
40 37 0080 BF170C00 PUSHGO X,Y
46 43 0090 BF171B00 PUSHGO X,\$27
[all …]
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| D | reg3-op.s | 3 Main MUL X,Y,Z
7 16ADDU X,Y,$73
9 CSN X,$38,$212
12 MULU X,Y,Z0
16 MXOR X,Y,203
18 NAND X,$38,211
21 SADD X,Y,0
25 16ADDU X,Y,0
27 ADDU X,$38,0
29 X IS $23 label
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| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/m68hc11/ |
| D | all_insns.s | 9 L5: adca 105,X
11 L7: adca 81,X
14 L10: adcb 236,X
16 L12: adcb 205,X
19 L15: adda 242,X
21 L17: adda 227,X
24 L20: addb 194,X
26 L22: addb 248,X
29 L25: addd 231,X
31 L27: addd 118,X
[all …]
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| D | opers12.d | 8 0+0+ <start> anda \[0xc,X\]
12 0+0009 <L1> ldy 0x0,X
21 0+001f <L1\+0x16> orab 0xff,X
22 0+0022 <L1\+0x19> orab 0xff00,X
23 0+0025 <L1\+0x1c> anda 0x100,X
24 0+0029 <L1\+0x20> andb 0xfeff,X
25 0+002d <L1\+0x24> anda \[0xc,X\]
30 0+0040 <L1\+0x37> std A,X
31 0+0042 <L1\+0x39> ldx B,X
33 0+0046 <L1\+0x3d> addd 1,\+X
[all …]
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| D | movb.d | 11 [ ]+ 2: 18 0a 0f 0f movb 0xf,X, 0xf,X
12 [ ]+ 6: 18 0a 0f 0f movb 0xf,X, 0xf,X
13 [ ]+ a: 18 0a 0f 0f movb 0xf,X, 0xf,X
15 [ ]+10: 18 0a 0f 0f movb 0xf,X, 0xf,X
16 [ ]+14: 18 0a 0f 0f movb 0xf,X, 0xf,X
17 [ ]+18: 18 0a 0f 0f movb 0xf,X, 0xf,X
19 [ ]+1e: 18 0a 0f 10 movb 0xf,X, 0xfff0,X
20 [ ]+22: 18 0a 0f 10 movb 0xf,X, 0xfff0,X
21 [ ]+26: 18 0a 0f 10 movb 0xf,X, 0xfff0,X
23 [ ]+2c: 18 0a 10 0f movb 0xfff0,X, 0xf,X
[all …]
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| D | 9s12x-mov.d | 10 00000005 <.text\+0x5> movb #0x44, 0x0,X
13 00000014 <.text\+0x14> movb #0xfe, \[D,X\]
16 00000024 <.text\+0x24> movb 0x00003456 <a2>, 0x1,X
21 00000042 <.text\+0x42> movb 1,X\+, 0x00001234 <a1>
22 00000047 <.text\+0x47> movb 2,-X, 0xf,X
25 00000056 <.text\+0x56> movb 0xfff1,Y, \[D,X\]
27 00000060 <.text\+0x60> movb \[D,X\], 0x00001234 <a1>
28 00000065 <.text\+0x65> movb \[D,Y\], 0xe,X
31 00000074 <.text\+0x74> movb \[D,X\], \[D,X\]
33 0000007e <.text\+0x7e> movb \[0x1234,X\], 0x00003456 <a2>
[all …]
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| D | insns12.d | 18 0+c <call_test\+0xc> call 0x0,X, 0x3
24 0+15 <call_test\+0x15> call 0xc,X, 0x0
33 0+1e <call_test\+0x1e> call \[D,X\]
38 0+28 <call_test\+0x28> call \[0x0,X\]
44 0+31 <special_test\+0x4> maxa 0x0,X
46 0+39 <special_test\+0xc> maxa \[D,X\]
47 0+3c <special_test\+0xf> maxa \[0x0,X\]
49 0+41 <special_test\+0x14> maxm 0x0,X
51 0+49 <special_test\+0x1c> maxm \[D,X\]
52 0+4c <special_test\+0x1f> maxm \[0x0,X\]
[all …]
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| D | opers12-dwarf2.d | 17 0: a4 e3 00 0c anda \[0xc,X\]
25 9: ed 00 ldy 0x0,X
43 1f: ea e0 ff orab 0xff,X
45 22: ea e1 00 orab 0xff00,X
47 25: a4 e2 01 00 anda 0x100,X
49 29: e4 e2 fe ff andb 0xfeff,X
51 2d: a4 e3 00 0c anda \[0xc,X\]
61 40: 6c e4 std A,X
63 42: ee e5 ldx B,X
67 46: e3 20 addd 1,\+X
[all …]
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| D | 9s12x-exg-sex-tfr.d | 17 0x00000010 exg X,CCR
24 0x0000001e exg X,D
27 0x00000024 exg CCR,X
29 0x00000028 exg X,X
30 0x0000002a exg Y,X
31 0x0000002c exg SP,X
34 0x00000032 exg X,Y
39 0x0000003c exg X,SP
44 0x00000046 sex D,X
53 0x00000058 tfr X,D
[all …]
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| D | insns9s12x.d | 10 0x00000004 addy 2,X\+
11 0x00000007 aded 0x0,X
13 0x0000000d adey \[D,X\]
28 0x0000003f comw 0x0,X
35 0x00000054 decw 0x0,X
41 0x00000067 gldab 0x0,X
45 0x00000073 gldy \[D,X\]
48 0x0000007e gstd 0x5000,X
51 0x0000008c gsty \[D,X\]
71 0x000000c3 rorw 0x0,X
[all …]
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| /toolchain/binutils/binutils-2.27/gas/config/ |
| D | tc-ns32k.h | 76 #define TC_FRAG_INIT(X) \ argument
79 frag_opcode_frag (X) = NULL; \
80 frag_opcode_offset (X) = 0; \
81 frag_bsr (X) = 0; \
86 #define frag_opcode_frag(X) (X)->tc_frag_data.fr_opcode_fragP argument
87 #define frag_opcode_offset(X) (X)->tc_frag_data.fr_opcode_offset argument
88 #define frag_bsr(X) (X)->tc_frag_data.fr_bsr argument
100 #define fix_im_disp(X) (X)->fx_im_disp argument
101 #define fix_bit_fixP(X) (X)->fx_bit_fixP argument
102 #define fix_opcode_frag(X) (X)->tc_fix_data.opcode_fragP argument
[all …]
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| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/bfin/ |
| D | move2.s | 28 A0.X = A0.X;
30 A1.X = A1.X;
35 R1 = A1.X;
37 R3 = A0.X;
52 A0.X = R3;
54 A1.X = R1;
57 A0.X = A0.W;
58 A0.X = A1.W;
59 A0.X = A1.X;
61 A1.X = A1.W;
[all …]
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| D | load.d | 25 44: 02 62 R2 = -0x40 \(X\);.*
26 46: 20 e1 7f 00 R0 = 0x7f \(X\);.*
27 4a: 02 68 P2 = 0x0 \(X\);.*
28 4c: 06 6b SP = -0x20 \(X\);.*
29 4e: 67 69 FP = 0x2c \(X\);.*
30 50: 3f e1 00 08 L3 = 0x800 \(X\);.*
31 54: 36 e1 ff 7f M2 = 0x7fff \(X\);.*
32 58: 81 60 R1 = 0x10 \(X\);.*
33 5a: 3c e1 00 00 L0 = 0x0 \(X\);.*
34 5e: 27 e1 01 00 R7 = 0x1 \(X\);.*
[all …]
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| D | move2.d | 24 20: 00 39 A0.X = A0.X;
26 24: 12 39 A1.X = A1.X;
29 2a: 0a 31 R1 = A1.X;
31 2e: 18 31 R3 = A0.X;
44 48: 03 38 A0.X = R3;
46 4c: 11 38 A1.X = R1;
48 50: 01 39 A0.X = A0.W;
49 52: 03 39 A0.X = A1.W;
50 54: 02 39 A0.X = A1.X;
51 56: 13 39 A1.X = A1.W;
[all …]
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| D | allinsn16.d | 296 [^:]+: 20 01 + A0.X = \[SP\+\+\];
298 [^:]+: 22 01 + A1.X = \[SP\+\+\];
360 [^:]+: 60 01 + \[--SP\] = A0.X;
362 [^:]+: 62 01 + \[--SP\] = A1.X;
12552 [^:]+: 00 31 + R0 = A0.X;
12554 [^:]+: 02 31 + R0 = A1.X;
12560 [^:]+: 08 31 + R1 = A0.X;
12562 [^:]+: 0a 31 + R1 = A1.X;
12568 [^:]+: 10 31 + R2 = A0.X;
12570 [^:]+: 12 31 + R2 = A1.X;
[all …]
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| /toolchain/binutils/binutils-2.27/opcodes/ |
| D | mcore-dis.c | 80 static const char X[] = "??"; variable
84 "ss2", "ss3", "ss4", "gcr", "gsr", X, X, X,
85 X, X, X, X, X, X, X, X,
86 X, X, X, X, X, X, X, X
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| D | m32c-opc.c | 15686 { { MNEM, OP (X), ' ', OP (DSP_16_U8), '[', OP (SRC16AN), ']', ',', OP (DST16RNHI), 0 } },
15692 { { MNEM, OP (X), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DST16RNHI), 0 } },
15698 { { MNEM, OP (X), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DST16RNHI), 0 } },
15704 { { MNEM, OP (X), ' ', OP (DSP_16_U8), '[', OP (SRC16AN), ']', ',', OP (DST16ANHI), 0 } },
15710 { { MNEM, OP (X), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', OP (DST16ANHI), 0 } },
15716 { { MNEM, OP (X), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', OP (DST16ANHI), 0 } },
15722 … { { MNEM, OP (X), ' ', OP (DSP_16_U8), '[', OP (SRC16AN), ']', ',', '[', OP (DST16AN), ']', 0 } },
15728 { { MNEM, OP (X), ' ', OP (DSP_16_U8), '[', 's', 'b', ']', ',', '[', OP (DST16AN), ']', 0 } },
15734 { { MNEM, OP (X), ' ', OP (DSP_16_S8), '[', 'f', 'b', ']', ',', '[', OP (DST16AN), ']', 0 } },
15740 …{ { MNEM, OP (X), ' ', OP (DSP_16_U8), '[', OP (SRC16AN), ']', ',', OP (DSP_24_U8), '[', OP (DST16…
[all …]
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