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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ilp32/
Dx86-64-xsave.d12 [ ]*[a-f0-9]+: 0f ae 20 xsave \(%rax\)
13 [ ]*[a-f0-9]+: 41 0f ae 20 xsave \(%r8\)
14 [ ]*[a-f0-9]+: 41 0f ae 24 00 xsave \(%r8,%rax,1\)
15 [ ]*[a-f0-9]+: 42 0f ae 24 00 xsave \(%rax,%r8,1\)
16 [ ]*[a-f0-9]+: 43 0f ae 24 38 xsave \(%r8,%r15,1\)
17 [ ]*[a-f0-9]+: 48 0f ae 20 xsave64 \(%rax\)
18 [ ]*[a-f0-9]+: 49 0f ae 20 xsave64 \(%r8\)
19 [ ]*[a-f0-9]+: 49 0f ae 24 00 xsave64 \(%r8,%rax,1\)
20 [ ]*[a-f0-9]+: 4a 0f ae 24 00 xsave64 \(%rax,%r8,1\)
21 [ ]*[a-f0-9]+: 0f ae 28 xrstor \(%rax\)
[all …]
Dx86-64-xsave-intel.d13 [ ]*[a-f0-9]+: 0f ae 20 xsave \[rax\]
14 [ ]*[a-f0-9]+: 41 0f ae 20 xsave \[r8\]
15 [ ]*[a-f0-9]+: 41 0f ae 24 00 xsave \[r8\+rax\*1\]
16 [ ]*[a-f0-9]+: 42 0f ae 24 00 xsave \[rax\+r8\*1\]
17 [ ]*[a-f0-9]+: 43 0f ae 24 38 xsave \[r8\+r15\*1\]
18 [ ]*[a-f0-9]+: 48 0f ae 20 xsave64 \[rax\]
19 [ ]*[a-f0-9]+: 49 0f ae 20 xsave64 \[r8\]
20 [ ]*[a-f0-9]+: 49 0f ae 24 00 xsave64 \[r8\+rax\*1\]
21 [ ]*[a-f0-9]+: 4a 0f ae 24 00 xsave64 \[rax\+r8\*1\]
22 [ ]*[a-f0-9]+: 0f ae 28 xrstor \[rax\]
[all …]
Dx86-64-mem.d22 [ ]*[a-f0-9]+: 0f ae 06 fxsave \(%rsi\)
23 [ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%rsi\)
24 [ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%rsi\)
25 [ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%rsi\)
26 [ ]*[a-f0-9]+: 0f ae 3e clflush \(%rsi\)
38 [ ]*[a-f0-9]+: 0f ae 06 fxsave \(%rsi\)
39 [ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%rsi\)
40 [ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%rsi\)
41 [ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%rsi\)
42 [ ]*[a-f0-9]+: 0f ae 3e clflush \(%rsi\)
Dx86-64-mem-intel.d22 [ ]*[a-f0-9]+: 0f ae 06 fxsave \[rsi\]
23 [ ]*[a-f0-9]+: 0f ae 0e fxrstor \[rsi\]
24 [ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[rsi\]
25 [ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[rsi\]
26 [ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[rsi\]
38 [ ]*[a-f0-9]+: 0f ae 06 fxsave \[rsi\]
39 [ ]*[a-f0-9]+: 0f ae 0e fxrstor \[rsi\]
40 [ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[rsi\]
41 [ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[rsi\]
42 [ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[rsi\]
Drex.d11 [ ]*[0-9a-f]+:[ ]+40 0f ae 00[ ]+rex fxsave[ ]+\(%rax\)
12 [ ]*[0-9a-f]+:[ ]+48 0f ae 00[ ]+fxsave64[ ]+\(%rax\)
13 [ ]*[0-9a-f]+:[ ]+41 0f ae 00[ ]+fxsave[ ]+\(%r8\)
14 [ ]*[0-9a-f]+:[ ]+49 0f ae 00[ ]+fxsave64[ ]+\(%r8\)
15 [ ]*[0-9a-f]+:[ ]+42 0f ae 04 05 00 00 00 00[ ]+fxsave[ ]+(0x0)?\(,%r8(,1)?\)
16 [ ]*[0-9a-f]+:[ ]+4a 0f ae 04 05 00 00 00 00[ ]+fxsave64[ ]+(0x0)?\(,%r8(,1)?\)
17 [ ]*[0-9a-f]+:[ ]+43 0f ae 04 00[ ]+fxsave[ ]+\(%r8,%r8(,1)?\)
18 [ ]*[0-9a-f]+:[ ]+4b 0f ae 04 00[ ]+fxsave64[ ]+\(%r8,%r8(,1)?\)
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/
Dx86-64-xsave.d11 [ ]*[a-f0-9]+: 0f ae 20 xsave \(%rax\)
12 [ ]*[a-f0-9]+: 41 0f ae 20 xsave \(%r8\)
13 [ ]*[a-f0-9]+: 41 0f ae 24 00 xsave \(%r8,%rax,1\)
14 [ ]*[a-f0-9]+: 42 0f ae 24 00 xsave \(%rax,%r8,1\)
15 [ ]*[a-f0-9]+: 43 0f ae 24 38 xsave \(%r8,%r15,1\)
16 [ ]*[a-f0-9]+: 48 0f ae 20 xsave64 \(%rax\)
17 [ ]*[a-f0-9]+: 49 0f ae 20 xsave64 \(%r8\)
18 [ ]*[a-f0-9]+: 49 0f ae 24 00 xsave64 \(%r8,%rax,1\)
19 [ ]*[a-f0-9]+: 4a 0f ae 24 00 xsave64 \(%rax,%r8,1\)
20 [ ]*[a-f0-9]+: 0f ae 28 xrstor \(%rax\)
[all …]
Dx86-64-xsave-intel.d13 [ ]*[a-f0-9]+: 0f ae 20 xsave \[rax\]
14 [ ]*[a-f0-9]+: 41 0f ae 20 xsave \[r8\]
15 [ ]*[a-f0-9]+: 41 0f ae 24 00 xsave \[r8\+rax\*1\]
16 [ ]*[a-f0-9]+: 42 0f ae 24 00 xsave \[rax\+r8\*1\]
17 [ ]*[a-f0-9]+: 43 0f ae 24 38 xsave \[r8\+r15\*1\]
18 [ ]*[a-f0-9]+: 48 0f ae 20 xsave64 \[rax\]
19 [ ]*[a-f0-9]+: 49 0f ae 20 xsave64 \[r8\]
20 [ ]*[a-f0-9]+: 49 0f ae 24 00 xsave64 \[r8\+rax\*1\]
21 [ ]*[a-f0-9]+: 4a 0f ae 24 00 xsave64 \[rax\+r8\*1\]
22 [ ]*[a-f0-9]+: 0f ae 28 xrstor \[rax\]
[all …]
Dx86-64-fxsave-intel.d11 [ ]*[a-f0-9]+: 0f ae 00 fxsave \[rax\]
12 [ ]*[a-f0-9]+: 41 0f ae 00 fxsave \[r8\]
13 [ ]*[a-f0-9]+: 41 0f ae 04 00 fxsave \[r8\+rax\*1\]
14 [ ]*[a-f0-9]+: 42 0f ae 04 00 fxsave \[rax\+r8\*1\]
15 [ ]*[a-f0-9]+: 43 0f ae 04 38 fxsave \[r8\+r15\*1\]
16 [ ]*[a-f0-9]+: 48 0f ae 00 fxsave64 \[rax\]
17 [ ]*[a-f0-9]+: 49 0f ae 00 fxsave64 \[r8\]
18 [ ]*[a-f0-9]+: 49 0f ae 04 00 fxsave64 \[r8\+rax\*1\]
19 [ ]*[a-f0-9]+: 4a 0f ae 04 00 fxsave64 \[rax\+r8\*1\]
20 [ ]*[a-f0-9]+: 0f ae 08 fxrstor \[rax\]
[all …]
Dx86-64-fxsave.d10 [ ]*[a-f0-9]+: 0f ae 00 fxsave \(%rax\)
11 [ ]*[a-f0-9]+: 41 0f ae 00 fxsave \(%r8\)
12 [ ]*[a-f0-9]+: 41 0f ae 04 00 fxsave \(%r8,%rax,1\)
13 [ ]*[a-f0-9]+: 42 0f ae 04 00 fxsave \(%rax,%r8,1\)
14 [ ]*[a-f0-9]+: 43 0f ae 04 38 fxsave \(%r8,%r15,1\)
15 [ ]*[a-f0-9]+: 48 0f ae 00 fxsave64 \(%rax\)
16 [ ]*[a-f0-9]+: 49 0f ae 00 fxsave64 \(%r8\)
17 [ ]*[a-f0-9]+: 49 0f ae 04 00 fxsave64 \(%r8,%rax,1\)
18 [ ]*[a-f0-9]+: 4a 0f ae 04 00 fxsave64 \(%rax,%r8,1\)
19 [ ]*[a-f0-9]+: 0f ae 08 fxrstor \(%rax\)
[all …]
Dx86-64-fsgs.d10 [ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase %ebx
11 [ ]*[a-f0-9]+: f3 48 0f ae c3 rdfsbase %rbx
12 [ ]*[a-f0-9]+: f3 41 0f ae c0 rdfsbase %r8d
13 [ ]*[a-f0-9]+: f3 49 0f ae c0 rdfsbase %r8
14 [ ]*[a-f0-9]+: f3 0f ae cb rdgsbase %ebx
15 [ ]*[a-f0-9]+: f3 48 0f ae cb rdgsbase %rbx
16 [ ]*[a-f0-9]+: f3 41 0f ae c8 rdgsbase %r8d
17 [ ]*[a-f0-9]+: f3 49 0f ae c8 rdgsbase %r8
18 [ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase %ebx
19 [ ]*[a-f0-9]+: f3 48 0f ae d3 wrfsbase %rbx
[all …]
Dx86-64-fsgs-intel.d11 [ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase ebx
12 [ ]*[a-f0-9]+: f3 48 0f ae c3 rdfsbase rbx
13 [ ]*[a-f0-9]+: f3 41 0f ae c0 rdfsbase r8d
14 [ ]*[a-f0-9]+: f3 49 0f ae c0 rdfsbase r8
15 [ ]*[a-f0-9]+: f3 0f ae cb rdgsbase ebx
16 [ ]*[a-f0-9]+: f3 48 0f ae cb rdgsbase rbx
17 [ ]*[a-f0-9]+: f3 41 0f ae c8 rdgsbase r8d
18 [ ]*[a-f0-9]+: f3 49 0f ae c8 rdgsbase r8
19 [ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase ebx
20 [ ]*[a-f0-9]+: f3 48 0f ae d3 wrfsbase rbx
[all …]
Dfsgs.d10 [ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase %ebx
11 [ ]*[a-f0-9]+: f3 0f ae cb rdgsbase %ebx
12 [ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase %ebx
13 [ ]*[a-f0-9]+: f3 0f ae db wrgsbase %ebx
14 [ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase %ebx
15 [ ]*[a-f0-9]+: f3 0f ae cb rdgsbase %ebx
16 [ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase %ebx
17 [ ]*[a-f0-9]+: f3 0f ae db wrgsbase %ebx
Dfsgs-intel.d11 [ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase ebx
12 [ ]*[a-f0-9]+: f3 0f ae cb rdgsbase ebx
13 [ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase ebx
14 [ ]*[a-f0-9]+: f3 0f ae db wrgsbase ebx
15 [ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase ebx
16 [ ]*[a-f0-9]+: f3 0f ae cb rdgsbase ebx
17 [ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase ebx
18 [ ]*[a-f0-9]+: f3 0f ae db wrgsbase ebx
Dmem.d19 [ ]*[a-f0-9]+: 0f ae 06 fxsave \(%esi\)
20 [ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%esi\)
21 [ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%esi\)
22 [ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%esi\)
23 [ ]*[a-f0-9]+: 0f ae 3e clflush \(%esi\)
34 [ ]*[a-f0-9]+: 0f ae 06 fxsave \(%esi\)
35 [ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%esi\)
36 [ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%esi\)
37 [ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%esi\)
38 [ ]*[a-f0-9]+: 0f ae 3e clflush \(%esi\)
Dx86-64-mem.d21 [ ]*[a-f0-9]+: 0f ae 06 fxsave \(%rsi\)
22 [ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%rsi\)
23 [ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%rsi\)
24 [ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%rsi\)
25 [ ]*[a-f0-9]+: 0f ae 3e clflush \(%rsi\)
37 [ ]*[a-f0-9]+: 0f ae 06 fxsave \(%rsi\)
38 [ ]*[a-f0-9]+: 0f ae 0e fxrstor \(%rsi\)
39 [ ]*[a-f0-9]+: 0f ae 16 ldmxcsr \(%rsi\)
40 [ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%rsi\)
41 [ ]*[a-f0-9]+: 0f ae 3e clflush \(%rsi\)
Dxsave.d9 [ ]*[a-f0-9]+: 0f ae 2b xrstor \(%ebx\)
10 [ ]*[a-f0-9]+: 0f ae 23 xsave \(%ebx\)
11 [ ]*[a-f0-9]+: 0f ae 33 xsaveopt \(%ebx\)
14 [ ]*[a-f0-9]+: 0f ae 29 xrstor \(%ecx\)
15 [ ]*[a-f0-9]+: 0f ae 21 xsave \(%ecx\)
16 [ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
Dx86-64-mem-intel.d22 [ ]*[a-f0-9]+: 0f ae 06 fxsave \[rsi\]
23 [ ]*[a-f0-9]+: 0f ae 0e fxrstor \[rsi\]
24 [ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[rsi\]
25 [ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[rsi\]
26 [ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[rsi\]
38 [ ]*[a-f0-9]+: 0f ae 06 fxsave \[rsi\]
39 [ ]*[a-f0-9]+: 0f ae 0e fxrstor \[rsi\]
40 [ ]*[a-f0-9]+: 0f ae 16 ldmxcsr DWORD PTR \[rsi\]
41 [ ]*[a-f0-9]+: 0f ae 1e stmxcsr DWORD PTR \[rsi\]
42 [ ]*[a-f0-9]+: 0f ae 3e clflush BYTE PTR \[rsi\]
Drex.d10 [ ]*[0-9a-f]+:[ ]+40 0f ae 00[ ]+rex fxsave[ ]+\(%rax\)
11 [ ]*[0-9a-f]+:[ ]+48 0f ae 00[ ]+fxsave64[ ]+\(%rax\)
12 [ ]*[0-9a-f]+:[ ]+41 0f ae 00[ ]+fxsave[ ]+\(%r8\)
13 [ ]*[0-9a-f]+:[ ]+49 0f ae 00[ ]+fxsave64[ ]+\(%r8\)
14 [ ]*[0-9a-f]+:[ ]+42 0f ae 04 05 00 00 00 00[ ]+fxsave[ ]+(0x0)?\(,%r8(,1)?\)
15 [ ]*[0-9a-f]+:[ ]+4a 0f ae 04 05 00 00 00 00[ ]+fxsave64[ ]+(0x0)?\(,%r8(,1)?\)
16 [ ]*[0-9a-f]+:[ ]+43 0f ae 04 00[ ]+fxsave[ ]+\(%r8,%r8(,1)?\)
17 [ ]*[0-9a-f]+:[ ]+4b 0f ae 04 00[ ]+fxsave64[ ]+\(%r8,%r8(,1)?\)
Dxsave-intel.d11 [ ]*[a-f0-9]+: 0f ae 2b xrstor \[ebx\]
12 [ ]*[a-f0-9]+: 0f ae 23 xsave \[ebx\]
13 [ ]*[a-f0-9]+: 0f ae 33 xsaveopt \[ebx\]
16 [ ]*[a-f0-9]+: 0f ae 29 xrstor \[ecx\]
17 [ ]*[a-f0-9]+: 0f ae 21 xsave \[ecx\]
18 [ ]*[a-f0-9]+: 0f ae 31 xsaveopt \[ecx\]
Dx86-64-clflushopt.d12 [ ]*[a-f0-9]+:[ ]*66 0f ae 39[ ]*clflushopt \(%rcx\)
13 [ ]*[a-f0-9]+:[ ]*66 42 0f ae bc f0 23 01 00 00[ ]*clflushopt 0x123\(%rax,%r14,8\)
14 [ ]*[a-f0-9]+:[ ]*66 0f ae 39[ ]*clflushopt \(%rcx\)
15 [ ]*[a-f0-9]+:[ ]*66 42 0f ae bc f0 34 12 00 00[ ]*clflushopt 0x1234\(%rax,%r14,8\)
Dx86-64-clwb.d12 [ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%rcx\)
13 [ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 23 01 00 00[ ]*clwb 0x123\(%rax,%r14,8\)
14 [ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%rcx\)
15 [ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 34 12 00 00[ ]*clwb 0x1234\(%rax,%r14,8\)
Dclwb.d12 [ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%ecx\)
13 [ ]*[a-f0-9]+:[ ]*66 0f ae b4 f4 c0 1d fe ff[ ]*clwb -0x1e240\(%esp,%esi,8\)
14 [ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%ecx\)
15 [ ]*[a-f0-9]+:[ ]*66 0f ae b4 f4 c0 1d fe ff[ ]*clwb -0x1e240\(%esp,%esi,8\)
Dclflushopt.d12 [ ]*[a-f0-9]+:[ ]*66 0f ae 39[ ]*clflushopt \(%ecx\)
13 [ ]*[a-f0-9]+:[ ]*66 0f ae bc f4 c0 1d fe ff[ ]*clflushopt -0x1e240\(%esp,%esi,8\)
14 [ ]*[a-f0-9]+:[ ]*66 0f ae 39[ ]*clflushopt \(%ecx\)
15 [ ]*[a-f0-9]+:[ ]*66 0f ae bc f4 c0 1d fe ff[ ]*clflushopt -0x1e240\(%esp,%esi,8\)
Dx86-64-clflushopt-intel.d12 [ ]*[a-f0-9]+:[ ]*66 0f ae 39[ ]*clflushopt BYTE PTR \[rcx\]
13 [ ]*[a-f0-9]+:[ ]*66 42 0f ae bc f0 23 01 00 00[ ]*clflushopt BYTE PTR \[rax\+r14\*8\+0x123\]
14 [ ]*[a-f0-9]+:[ ]*66 0f ae 39[ ]*clflushopt BYTE PTR \[rcx\]
15 [ ]*[a-f0-9]+:[ ]*66 42 0f ae bc f0 34 12 00 00[ ]*clflushopt BYTE PTR \[rax\+r14\*8\+0x1234\]
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/i860/
Dshift.d14 10: 00 f8 ae a1 shl %r31,%r13,%r14
25 3c: 00 f8 ae a9 shr %r31,%r13,%r14
36 68: 00 f8 ae b9 shra %r31,%r13,%r14
47 94: 00 f8 ae b1 shrd %r31,%r13,%r14
58 c0: 00 80 ae a5 shl -32768,%r13,%r14
69 ec: 00 80 ae ad shr -32768,%r13,%r14
70 f0: 00 e0 11 ae shr -8192,%r16,%r17
71 f4: ff ff 74 ae shr -1,%r19,%r20
72 f8: cd ab d7 ae shr -21555,%r22,%r23
80 118: 00 80 ae bd shra -32768,%r13,%r14

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