/toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
D | x86-64-avx512ifma_vl.d | 40 [ ]*[a-f0-9]+:[ ]*62 02 95 00 b5 f4[ ]*vpmadd52huq %xmm28,%xmm29,%xmm30 41 [ ]*[a-f0-9]+:[ ]*62 02 95 07 b5 f4[ ]*vpmadd52huq %xmm28,%xmm29,%xmm30\{%k7\} 42 [ ]*[a-f0-9]+:[ ]*62 02 95 87 b5 f4[ ]*vpmadd52huq %xmm28,%xmm29,%xmm30\{%k7\}\{z\} 43 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 31[ ]*vpmadd52huq \(%rcx\),%xmm29,%xmm30 44 [ ]*[a-f0-9]+:[ ]*62 22 95 00 b5 b4 f0 23 01 00 00[ ]*vpmadd52huq 0x123\(%rax,%r14,8\),%xmm29,%x… 45 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 31[ ]*vpmadd52huq \(%rcx\)\{1to2\},%xmm29,%xmm30 46 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 72 7f[ ]*vpmadd52huq 0x7f0\(%rdx\),%xmm29,%xmm30 47 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 b2 00 08 00 00[ ]*vpmadd52huq 0x800\(%rdx\),%xmm29,%xmm30 48 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 72 80[ ]*vpmadd52huq -0x800\(%rdx\),%xmm29,%xmm30 49 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 b2 f0 f7 ff ff[ ]*vpmadd52huq -0x810\(%rdx\),%xmm29,%xmm30 [all …]
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D | x86-64-avx512ifma_vl-intel.d | 40 [ ]*[a-f0-9]+:[ ]*62 02 95 00 b5 f4[ ]*vpmadd52huq xmm30,xmm29,xmm28 41 [ ]*[a-f0-9]+:[ ]*62 02 95 07 b5 f4[ ]*vpmadd52huq xmm30\{k7\},xmm29,xmm28 42 [ ]*[a-f0-9]+:[ ]*62 02 95 87 b5 f4[ ]*vpmadd52huq xmm30\{k7\}\{z\},xmm29,xmm28 43 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 31[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rcx\] 44 [ ]*[a-f0-9]+:[ ]*62 22 95 00 b5 b4 f0 23 01 00 00[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rax\… 45 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b5 31[ ]*vpmadd52huq xmm30,xmm29,QWORD PTR \[rcx\]\{1to2\} 46 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 72 7f[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\] 47 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 b2 00 08 00 00[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rdx\+0x… 48 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 72 80[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rdx-0x800\] 49 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b5 b2 f0 f7 ff ff[ ]*vpmadd52huq xmm30,xmm29,XMMWORD PTR \[rdx-0x8… [all …]
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D | x86-64-avx512ifma.d | 26 [ ]*[a-f0-9]+:[ ]*62 02 95 40 b5 f4[ ]*vpmadd52huq %zmm28,%zmm29,%zmm30 27 [ ]*[a-f0-9]+:[ ]*62 02 95 47 b5 f4[ ]*vpmadd52huq %zmm28,%zmm29,%zmm30\{%k7\} 28 [ ]*[a-f0-9]+:[ ]*62 02 95 c7 b5 f4[ ]*vpmadd52huq %zmm28,%zmm29,%zmm30\{%k7\}\{z\} 29 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 31[ ]*vpmadd52huq \(%rcx\),%zmm29,%zmm30 30 [ ]*[a-f0-9]+:[ ]*62 22 95 40 b5 b4 f0 23 01 00 00[ ]*vpmadd52huq 0x123\(%rax,%r14,8\),%zmm29,%z… 31 [ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 31[ ]*vpmadd52huq \(%rcx\)\{1to8\},%zmm29,%zmm30 32 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 7f[ ]*vpmadd52huq 0x1fc0\(%rdx\),%zmm29,%zmm30 33 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 00 20 00 00[ ]*vpmadd52huq 0x2000\(%rdx\),%zmm29,%zmm30 34 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 80[ ]*vpmadd52huq -0x2000\(%rdx\),%zmm29,%zmm30 35 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 c0 df ff ff[ ]*vpmadd52huq -0x2040\(%rdx\),%zmm29,%zmm30 [all …]
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D | avx512ifma_vl.d | 38 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 f4[ ]*vpmadd52huq %xmm4,%xmm5,%xmm6\{%k7\} 39 [ ]*[a-f0-9]+:[ ]*62 f2 d5 8f b5 f4[ ]*vpmadd52huq %xmm4,%xmm5,%xmm6\{%k7\}\{z\} 40 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 31[ ]*vpmadd52huq \(%ecx\),%xmm5,%xmm6\{%k7\} 41 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq -0x1e240\(%esp,%esi,8\),%xmm5,… 42 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 30[ ]*vpmadd52huq \(%eax\)\{1to2\},%xmm5,%xmm6\{%k7\} 43 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 72 7f[ ]*vpmadd52huq 0x7f0\(%edx\),%xmm5,%xmm6\{%k7\} 44 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b2 00 08 00 00[ ]*vpmadd52huq 0x800\(%edx\),%xmm5,%xmm6\{%k7\} 45 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 72 80[ ]*vpmadd52huq -0x800\(%edx\),%xmm5,%xmm6\{%k7\} 46 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b2 f0 f7 ff ff[ ]*vpmadd52huq -0x810\(%edx\),%xmm5,%xmm6\{%k7\} 47 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 7f[ ]*vpmadd52huq 0x3f8\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\} [all …]
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D | x86-64-avx512ifma-intel.d | 26 [ ]*[a-f0-9]+:[ ]*62 02 95 40 b5 f4[ ]*vpmadd52huq zmm30,zmm29,zmm28 27 [ ]*[a-f0-9]+:[ ]*62 02 95 47 b5 f4[ ]*vpmadd52huq zmm30\{k7\},zmm29,zmm28 28 [ ]*[a-f0-9]+:[ ]*62 02 95 c7 b5 f4[ ]*vpmadd52huq zmm30\{k7\}\{z\},zmm29,zmm28 29 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 31[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rcx\] 30 [ ]*[a-f0-9]+:[ ]*62 22 95 40 b5 b4 f0 23 01 00 00[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rax\… 31 [ ]*[a-f0-9]+:[ ]*62 62 95 50 b5 31[ ]*vpmadd52huq zmm30,zmm29,QWORD PTR \[rcx\]\{1to8\} 32 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 7f[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\] 33 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 00 20 00 00[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x… 34 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 80[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\] 35 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 c0 df ff ff[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx-0x2… [all …]
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D | avx512ifma-intel.d | 26 [ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 f4[ ]*vpmadd52huq zmm6,zmm5,zmm4 27 [ ]*[a-f0-9]+:[ ]*62 f2 d5 4f b5 f4[ ]*vpmadd52huq zmm6\{k7\},zmm5,zmm4 28 [ ]*[a-f0-9]+:[ ]*62 f2 d5 cf b5 f4[ ]*vpmadd52huq zmm6\{k7\}\{z\},zmm5,zmm4 29 [ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 31[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[ecx\] 30 [ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[esp\+e… 31 [ ]*[a-f0-9]+:[ ]*62 f2 d5 58 b5 30[ ]*vpmadd52huq zmm6,zmm5,QWORD PTR \[eax\]\{1to8\} 32 [ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 72 7f[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] 33 [ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b2 00 20 00 00[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[edx\+0x20… 34 [ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 72 80[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[edx-0x2000\] 35 [ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b5 b2 c0 df ff ff[ ]*vpmadd52huq zmm6,zmm5,ZMMWORD PTR \[edx-0x204… [all …]
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D | avx512ifma_vl-intel.d | 38 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 f4[ ]*vpmadd52huq xmm6\{k7\},xmm5,xmm4 39 [ ]*[a-f0-9]+:[ ]*62 f2 d5 8f b5 f4[ ]*vpmadd52huq xmm6\{k7\}\{z\},xmm5,xmm4 40 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 31[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\] 41 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b4 f4 c0 1d fe ff[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[… 42 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 30[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[eax\]\{1to2\} 43 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 72 7f[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x7f0\] 44 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b2 00 08 00 00[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[edx… 45 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 72 80[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\] 46 [ ]*[a-f0-9]+:[ ]*62 f2 d5 0f b5 b2 f0 f7 ff ff[ ]*vpmadd52huq xmm6\{k7\},xmm5,XMMWORD PTR \[edx… 47 [ ]*[a-f0-9]+:[ ]*62 f2 d5 1f b5 72 7f[ ]*vpmadd52huq xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x3f8\]\{… [all …]
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/tic6x/ |
D | insns-c674x.s | 18 [a0] absdp .S2 b3:b2,b5:b4 59 [!b1] add .D1X b5,-16,a4 68 [!a2] addad .D2 b5,b8,b13 70 addad .D2 b21,0,b5 195 [!b0] bitc4 .M1X b5,a15 199 [a1] bitr .M1X b5,a15 207 [b2] clr .S2 b10,31,0,b5 232 [!b2] cmpeq4 .S2 b9,b26,b5 237 cmpeqdp .S2X b5:b4,a7:a6,b9 271 [b0] cmpgt2 .S2X b7,a6,b5 [all …]
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D | predicate-bad-3.s | 12 [b2] addsub2 .L2 b1,b2,b5:b4 17 [!a0] ddotph2 .M2 b1:b0,b2,b5:b4 18 [!a0] ddotph2r .M2 b1:b0,b2,b5 19 [!a0] ddotpl2 .M2 b1:b0,b2,b5:b4 20 [!a0] ddotpl2r .M2 b1:b0,b2,b5
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D | insns16-m-unit.d | 11 [0-9a-f]+[02468ace] <[^>]*> 469f[ \t]+mpy \.M2 b2,b5,b2 15 [0-9a-f]+[02468ace] <[^>]*> ca9f[ \t]+mpy \.M2 b6,b5,b4 18 [0-9a-f]+[02468ace] <[^>]*> 46bf[ \t]+mpyh \.M2 b2,b5,b2 22 [0-9a-f]+[02468ace] <[^>]*> cabf[ \t]+mpyh \.M2 b6,b5,b4 64 [0-9a-f]+[02468ace] <[^>]*> 7afe[ \t]+smpyhl \.M1X a3,b5,a4 68 [0-9a-f]+[02468ace] <[^>]*> fefe[ \t]+smpyhl \.M1X a7,b5,a6
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D | insns-c674x.d | 21 [0-9a-f]+[048c] <[^>]*> c20c4b22[ \t]+\[a0\] absdp \.S2 b3:b2,b5:b4 62 [0-9a-f]+[048c] <[^>]*> 52161af0[ \t]+\[!b1\] add \.D1X b5,-16,a4 71 [0-9a-f]+[048c] <[^>]*> b6951e42[ \t]+\[!a2\] addad \.D2 b5,b8,b13 73 [0-9a-f]+[048c] <[^>]*> 02d41ec2[ \t]+addad \.D2 b21,0,b5 198 [0-9a-f]+[048c] <[^>]*> 3797d0f0[ \t]+\[!b0\] bitc4 \.M1X b5,a15 202 [0-9a-f]+[048c] <[^>]*> 8797f0f0[ \t]+\[a1\] bitr \.M1X b5,a15 205 [0-9a-f]+[048c] <[^>]*> 00940362[ \t]+bnop \.S2 b5,0 207 [0-9a-f]+[048c] <[^>]*> 00940362[ \t]+bnop \.S2 b5,0 210 [0-9a-f]+[048c] <[^>]*> 62abe0ca[ \t]+\[b2\] clr \.S2 b10,31,0,b5 235 [0-9a-f]+[048c] <[^>]*> 72e92722[ \t]+\[!b2\] cmpeq4 \.S2 b9,b26,b5 [all …]
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D | insns-bad-1.s | 56 add .L2 100,b5:b4,b9:b8 108 adddp .L2X b1:b0,b3:b2,b5:b4 181 addu .D2 b4,b5,b7:b6 184 addu .L2X a4,b7:b6,b5 234 bnop .S1X b5,0 239 callnop .S1X b5,0 251 cmpeq .L2 -17,b4,b5 252 cmpeq .L2 16,b4,b5 267 cmpeqdp .S2 a3:a2,b1:b0,b5 276 cmpgt .L2 -17,b4,b5 [all …]
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/sparc/ |
D | cfr.d | 10 0: b5 82 40 16 wr %o1, %l6, %cfr 11 4: b5 80 62 34 wr %g1, 0x234, %cfr 14 10: b5 46 80 00 rd %cfr, %i2
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D | hpcvis3.d | 33 5c: b5 bd 31 d6 fnmaddd %f20, %f22, %f24, %f26 46 90: b5 b0 02 f9 lzcnt %i1, %i2 60 c8: b3 b5 48 57 fpadd64 %f52, %f54, %f56 61 cc: b7 b5 c8 99 fchksm16 %f54, %f56, %f58 80 118: 87 b5 25 16 fpcmpugt8 %f20, %f22, %g3 81 11c: 89 b5 a5 58 fpcmpueq8 %f22, %f24, %g4 90 140: b5 b0 02 f9 lzcnt %i1, %i2
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D | edge.d | 16 18: 83 b5 00 02 edge8cc %l4, %g2, %g1 17 1c: 83 b5 00 02 edge8cc %l4, %g2, %g1 18 20: 83 b5 00 22 edge8n %l4, %g2, %g1
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D | sparc5vis4.d | 24 38: b5 b5 a3 f8 fpmax32 %f22, %f24, %f26 32 58: b7 b5 eb 79 fpminu16 %f54, %f56, %f58
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D | wrasr.d | 40 78: b5 80 40 02 wr %g1, %g2, %cfr 41 7c: b5 80 62 9a wr %g1, 0x29a, %cfr 42 80: b5 80 62 9a wr %g1, 0x29a, %cfr
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
D | maverick.d | 44 0*84 <load_store\+0x84> 6d ?10 ?b5 ?ff ? * cfldr32vs mvfx11, ?\[r0, #-1020\].* 50 0*9c <load_store\+0x9c> 6d ?30 ?b5 ?ff ? * cfldr32vs mvfx11, ?\[r0, #-1020\]!.* 56 0*b4 <load_store\+0xb4> 6d ?50 ?b5 ?ff ? * cfldr64vs mvdx11, ?\[r0, #-1020\].* 62 0*cc <load_store\+0xcc> 6d ?70 ?b5 ?ff ? * cfldr64vs mvdx11, ?\[r0, #-1020\]!.* 68 0*e4 <load_store\+0xe4> 6c ?70 ?b5 ?ff ? * cfldr64vs mvdx11, ?\[r0\], #-1020.* 104 0*174 <load_store\+0x174> 6d ?00 ?b5 ?ff ? * cfstr32vs mvfx11, ?\[r0, #-1020\].* 110 0*18c <load_store\+0x18c> 6d ?20 ?b5 ?ff ? * cfstr32vs mvfx11, ?\[r0, #-1020\]!.* 116 0*1a4 <load_store\+0x1a4> 6d ?40 ?b5 ?ff ? * cfstr64vs mvdx11, ?\[r0, #-1020\].* 122 0*1bc <load_store\+0x1bc> 6d ?60 ?b5 ?ff ? * cfstr64vs mvdx11, ?\[r0, #-1020\]!.* 128 0*1d4 <load_store\+0x1d4> 6c ?60 ?b5 ?ff ? * cfstr64vs mvdx11, ?\[r0\], #-1020.* [all …]
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/ppc/ |
D | altivec3.d | 76 .*: (12 b5 17 44|44 17 b5 12) vslv v21,v21,v2 79 .*: (12 95 b5 e3|e3 b5 95 12) vmsumudm v20,v21,v22,v23
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D | a2.d | 167 22c: (7d 6a 07 b5|b5 07 6a 7d) extsw\. r10,r11 407 5ec: (7e 95 b5 d3|d3 b5 95 7e) mulldo\. r20,r21,r22 408 5f0: (7e 95 b5 d2|d2 b5 95 7e) mulldo r20,r21,r22 413 604: (7e 95 b5 d7|d7 b5 95 7e) mullwo\. r20,r21,r22 414 608: (7e 95 b5 d6|d6 b5 95 7e) mullwo r20,r21,r22 510 788: (b5 4b ff fe|fe ff 4b b5) sthu r10,-2\(r11\) 511 78c: (b5 4b 00 02|02 00 4b b5) sthu r10,2\(r11\) 533 7e4: (7e 95 b5 11|11 b5 95 7e) subfeo\. r20,r21,r22 534 7e8: (7e 95 b5 10|10 b5 95 7e) subfeo r20,r21,r22
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/msp430/ |
D | msp430x.d | 46 0+00cc <[^>]*> 40 18 18 b5 02 00 bitx.w 2\(r5\), r8 ; 48 0+00da <[^>]*> 40 18 b2 b5 00 00 bitx.w @r5\+, &0x00000; 49 0+00e0 <[^>]*> 40 18 38 b5 bitx.w @r5\+, r8 ; 50 0+00e4 <[^>]*> 40 18 28 b5 bitx.w @r5, r8 ; 53 0+00f8 <[^>]*> 40 18 e2 b5 00 00 bitx.b @r5, &0x00000; 55 0+0104 <[^>]*> 40 18 48 b5 bitx.b r5, r8 ; 56 0+0108 <[^>]*> 40 18 82 b5 00 00 bitx.w r5, &0x00000;
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/mmix/ |
D | relax2.d | 112 R.* \[\.text\.b5\]: 114 0+40004 R_MMIX_PUSHJ \.text\.b5 115 0+40018 R_MMIX_PUSHJ \.text\.b5\+0x0+4 116 0+4002c R_MMIX_PUSHJ \.text\.b5\+0x0+8
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
D | movi.s | 8 .irp b5, 0, 0xff0000000000 14 movi \dst, \b7 + \b6 + \b5 + \b4 + \b3 + \b2 + \b1 + \b0
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/ia64/ |
D | unwind-ok.d | 11 [[:space:]]*P1:br_mem\(brmask=\[b1,b5\]\) 20 [[:space:]]*X3:spill_sprel_p\(qp=p2,t=3,reg=b5,spoff=0x10\) 46 [[:space:]]*P2:br_gr\(brmask=\[b1,b5\],gr=r32\) 51 [[:space:]]*X1:spill_psprel\(reg=b5,t=10,pspoff=0x10-0x20\) 132 [[:space:]]*P2:br_gr\(brmask=\[b4,b5\],gr=r126\)
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/toolchain/binutils/binutils-2.27/ld/testsuite/ld-powerpc/ |
D | tlsexetoc.d | 33 .* (4b ff ff b5|b5 ff ff 4b) bl .*
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