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Searched refs:gr5 (Results 1 – 8 of 8) sorted by relevance

/toolchain/binutils/binutils-2.27/include/opcode/
Dvisium.h44 #define gr5 (MASK_GR5 | MASK_GR6) macro
275 { "fabs", mode_fda, class1|(7<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 },
276 { "fadd", mode_fdab, class1|(1<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 },
277 { "fcmp", mode_rdfab,class3|(10<<27)|(15<<21)|(1<<15)|(1<<9)|(1<<3)|(4), gr5 },
278 { "fcmpe", mode_rdfab,class3|(11<<27)|(15<<21)|(1<<15)|(1<<9)|(1<<3)|(4), gr5 },
279 { "fdiv", mode_fdab, class1|(4<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 },
280 { "fload", mode_fdra, class1|(15<<21)|(1<<15)|(1<<3)|(4), gr5 },
281 { "fmove", mode_fda, class1|(12<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5},
282 { "fmult", mode_fdab, class1|(3<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 },
283 { "fneg", mode_fda, class1|(6<<27)|(15<<21)|(1<<15)|(1<<3)|(4), gr5 },
[all …]
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/frv/
Dfr405-insn.s1 smu gr4,gr5
2 smass gr4,gr5
3 smsss gr4,gr5
4 slass gr4,gr5,gr6
5 scutss gr4,gr5
6 addss gr4,gr5,gr6
7 subss gr4,gr5,gr6
Dfr405-insn.d9 .*: 81 18 41 45 smu gr4,gr5
10 .*: 81 18 41 85 smass gr4,gr5
11 .*: 81 18 41 c5 smsss gr4,gr5
12 .*: 8d 18 40 85 slass gr4,gr5,gr6
13 .*: 8b 18 01 04 scutss gr4,gr5
14 .*: 8d 18 40 05 addss gr4,gr5,gr6
15 .*: 8d 18 40 45 subss gr4,gr5,gr6
Dfdpic.s7 ldi @(gr15, #got12(foo)), gr5
21 ldi @(gr15, #gotoff12(foo)), gr5
Dfdpic.d14 8: 8a c8 f0 00 ldi @\(gr15,0\),gr5
32 2c: 8a c8 f0 00 ldi @\(gr15,0\),gr5
/toolchain/binutils/binutils-2.27/gas/doc/
Dc-visium.texi42 @code{gr5}
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/visium/
Dallinsn_gr5.d1 #as: -mtune=gr5
/toolchain/binutils/binutils-2.27/cpu/
Dfrv.cpu2219 (gr0 0)(gr1 1)(gr2 2)(gr3 3)(gr4 4)(gr5 5)(gr6 6)(gr7 7)