Searched refs:imm4 (Results 1 – 25 of 25) sorted by relevance
286 bit @@rd,imm4 cpb rbd,rbs ex rd,addr(rs)287 bit addr(rd),imm4 cpd rd,@@rs,rr,cc ex rd,rs288 bit addr,imm4 cpdb rbd,@@rs,rr,cc exb rbd,@@rs289 bit rd,imm4 cpdr rd,@@rs,rr,cc exb rbd,addr291 bitb @@rd,imm4 cpi rd,@@rs,rr,cc exb rbd,rbs292 bitb addr(rd),imm4 cpib rbd,@@rs,rr,cc ext0e imm8293 bitb addr,imm4 cpir rd,@@rs,rr,cc ext0f imm8294 bitb rbd,imm4 cpirb rbd,@@rs,rr,cc ext8e imm8319 jp cc,addr(rd) ldk rd,imm4 negb addr353 push @@rd,rs set addr,imm4 subl rrd,imm32[all …]
5 # SUBB imm4/imm16, reg23 # SUBCB imm4/imm16, reg41 # SUBCW imm4/imm16, reg59 # SUBW imm4/imm16, reg77 # SUBD imm4/imm16/imm32, regp
5 # ADDB imm4/imm16, reg24 # ADDCB imm4/imm16, reg43 # ADDCW imm4/imm16, reg62 # ADDW imm4/imm16, reg80 # ADDD imm4/imm16/imm20/imm32, regp
5 # ANDB imm4/imm16, reg23 # ANDW imm4/imm16, reg41 # ANDD imm4/imm16/imm32, regp
5 # CMPB imm4/imm16, reg24 # CMPW imm4/imm16, reg44 # CMPD imm4/imm16/imm32, regp
5 # MOVB imm4/imm16, reg24 # MOVW imm4/imm16, reg44 # MOVD imm4/imm16/imm20/imm32, regp
5 # XORB imm4/imm16, reg23 # XORW imm4/imm16, reg
5 # ORB imm4/imm16, reg23 # ORW imm4/imm16, reg
5 # MULB imm4/imm16, reg23 # MULW imm4/imm16, reg
115 # storw imm4, rbase(disp)
115 # storb imm4, rbase(disp)
283 (dnf f-imm4 "4 bit unsigned" () 8 4)285 (name imm4)289 (index f-imm4)1194 ("add $Rd,#$imm4")1195 (+ OP1_5 OP2_1 imm4 Rd)1196 (set-psw-add Rd (index-of Rd) Rd imm4 0)1230 ("adc $Rd,#$imm4")1231 (+ OP1_5 OP2_3 imm4 Rd)1232 (set-psw-add Rd (index-of Rd) Rd imm4 psw-cy)1266 ("sub $Rd,#$imm4")[all …]
264 (arith-jnz-imm4-dst-defn): Make relaxable.265 (arith-jnz16-imm4-dst-defn): Fix encodings.330 binary-arith-imm4-dst-defn): Add 1ADDR attribute.430 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,431 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
6145 ;<arith>.size:Q #imm4,sp -- for m16c6150 (.str op ".w:q #imm4,sp")6290 ;<arith>.size:Q #imm4,dst -- for m16c and m32c6293 (define-pmacro (binary-arith-imm4-dst-defn mach src dstgroup mode wstr op encoding sem)6294 (dni (.sym op mach wstr - imm4-Q - dstgroup)6295 (.str op wstr " " mach "-imm4-Q-" dstgroup "-" mode)6304 (define-pmacro (binary-arith16-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)6305 (binary-arith-imm4-dst-defn 16 Imm-8-s4 16 mode wstr op6311 (binary-arith-imm4-dst-defn 16 Imm-sh-8-s4 16 mode wstr op6317 (define-pmacro (binary-arith32-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)[all …]
213 (dshcf f-imm4 "Immediate (4 bits)" () 3 4)271 (dshcop imm4 "Immediate value (4 bits)" () h-sint f-imm4)1107 "mov.b r0, @($imm4, $rm)"1108 (+ (f-op8 #x80) rm imm4)1110 (set addr (add rm imm4))1144 "mov.b @($imm4, $rm), r0"1145 (+ (f-op8 #x84) rm imm4)1146 (set r0 (ext SI (mem QI (add rm imm4)))))
122 imm3, imm4, imm5, imm6, imm16, imm20, imm32, enumerator
146 SHIFT_INST_A("ashub", 0x80, 0x41, 23, imm4, regr),156 SHIFT_INST_L("lshb", 0x13, 0x44, 23, imm4, regr),
3929 int imm4 = (given >> 4) & 0xf; in print_insn_coprocessor() local3940 if (imm4) in print_insn_coprocessor()3941 func (stream, ", lsl #%d", imm4); in print_insn_coprocessor()3949 if (imm4 > 0) in print_insn_coprocessor()3950 func (stream, ", lsl #%d", imm4); in print_insn_coprocessor()
465 #define imm4(x) fmtconst (c_imm4, x, 0, outf) macro
209 #define imm4(x) EXPR_VALUE (x) macro1976 $$ = DSP32SHIFTIMM (1, &$1, imm4 ($5), &$3, $6.s0 ? 1 : 2, 0);
6141 * config/tc-d10v.c (build_insn): Check for unresolved imm4 or6145 * config/tc-d10v.c (build_insn): Check for unresolved imm4 or
9194 msgid "RI, #imm4"9195 msgstr "RI, #imm4"
9205 msgid "RI, #imm4"9206 msgstr "RI, #imm4"
9560 msgid "RI, #imm4"
9587 msgid "RI, #imm4"