| D | bfin-parse.y | 29 #define DSP32ALU(aopcde, HL, dst1, dst0, src0, src1, s, x, aop) \ argument
30 bfin_gen_dsp32alu (HL, aopcde, aop, s, x, dst0, dst1, src0, src1)
32 #define DSP32MAC(op1, MM, mmod, w1, P, h01, h11, h00, h10, dst, op0, src0, src1, w0) \ argument
34 dst, src0, src1, w0)
36 #define DSP32MULT(op1, MM, mmod, w1, P, h01, h11, h00, h10, dst, op0, src0, src1, w0) \ argument
38 dst, src0, src1, w0)
40 #define DSP32SHIFT(sopcde, dst0, src0, src1, sop, hls) \ argument
41 bfin_gen_dsp32shift (sopcde, dst0, src0, src1, sop, hls)
109 #define COMP3OP(dst, src0, src1, opc) \ argument
110 bfin_gen_comp3op (src0, src1, dst, opc)
|