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Searched refs:src2 (Results 1 – 18 of 18) sorted by relevance

/toolchain/binutils/binutils-2.27/binutils/testsuite/binutils-all/
Dcompress.exp86 set src2 ${copyfile}.o
87 set status [remote_exec build cmp "${src1} ${src2}"]
108 set src2 ${copyfile}.o
109 set status [remote_exec build cmp "${src1} ${src2}"]
204 set src2 ${copyfile}empty.o
205 set status [remote_exec build cmp "${src1} ${src2}"]
239 set src2 ${compressedfile}.o
240 set status [remote_exec build cmp "${src1} ${src2}"]
259 set src2 ${compressedfile2}.o
260 set status [remote_exec build cmp "${src1} ${src2}"]
[all …]
Dupdate-section.exp57 set src2 "tmpdir/${file2}"
58 set status [remote_exec build cmp "${src1} ${src2}"]
Dobjcopy.exp65 set src2 tmpdir/copy.o
67 remote_upload host ${copyfile}.o $src2
70 set src2 ${copyfile}.o
72 set status [remote_exec build cmp "${src1} ${src2}"]
/toolchain/binutils/binutils-2.27/include/opcode/
Dtic6x-opcode-table.h135 ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0),
140 ENC3(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(dst, reg, 1)))
145 ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0),
151 ENC4(ENC(s, fu, 0), ENC(src2, regpair_msb, 0), ENC(src1, regpair_lsb, 0),
157 ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0),
164 ENC(src2, reg, 1), ENC(dst, reg, 2)))
169 ENC(src2, reg, 1), ENC(dst, reg, 2)))
174 ENC(src2, reg, 1), ENC(dst, reg, 2)))
179 ENC(src2, reg, 1), ENC(dst, reg, 2)))
183 ENC4(ENC(s, fu, 0), ENC(src1, scst, 0), ENC(src2, reg, 1),
[all …]
Dtic6x-insn-formats.h71 CFLDS5(FLD(s, 1, 1), FLD(op, 7, 6), FLD(src1, 13, 5), FLD(src2, 18, 5),
75 FLD(src2, 18, 5), FLD(dst, 23, 5)))
264 SFLDS4(FLD(src2, 7, 3), FLD(op, 11, 1), FLD(x, 12, 1), FLD(srcdst, 13, 3)))
289 FLD(src2, 18, 5), FLD(dst, 23, 5)))
292 FLD(src2, 18, 5), FLD(dst, 23, 5)))
294 CFLDS5(FLD(s, 1, 1), FLD(x, 12, 1), FLD(op, 13, 5), FLD(src2, 18, 5),
301 SFLDS5(FLD(dst, 4, 3), FLD(src2, 7, 3), FLD(op, 11, 1), FLD(x, 12, 1),
305 SFLDS5(FLD(dst, 4, 3), FLD(src2, 7, 3), FLD(op, 11, 1), FLD(x, 12, 1),
310 SFLDS5(FLD(dst, 4, 3), FLD(src2, 7, 3), FLD(sn, 11, 1), FLD(x, 12, 1),
317 SFLDS5(FLD(dst, 4, 1), FLD(src2, 7, 3), FLD(x, 12, 1), FLD(src1, 13, 3),
[all …]
Dm88k.h113 src2: SOURCE2; member
DChangeLog-0415848 opcode field, usu ORXREGD1324 for the src2 operand and remove the
/toolchain/binutils/binutils-2.27/cpu/
Dm32r.cpu250 ((src1 INT -1) (src2 INT -1)) ; inputs
257 ((src1 INT -1) (src2 INT -1)) ; inputs
280 ((src1 INT) (src2 INT)) ; inputs
316 ((src1 INT -1) (src2 INT -1)) ; inputs
323 ((src1 INT -1) (src2 INT -1)) ; inputs
344 ((src1 INT) (src2 INT)) ; inputs
369 ((src1 INT -1) (src2 INT -1)) ; inputs
376 ((src1 INT -1) (src2 INT -1)) ; inputs
397 ((src1 INT) (src2 INT)) ; inputs
669 (dnop src2 "source register 2" () h-gr f-r2)
[all …]
Dxc16x.cpu107 ((src1 INT -1) (src2 INT -1)) ; inputs
547 (dnop src2 "source register 2" () h-gr f-r2)
1115 "mul $src1,$src2"
1116 (+ OP1_0 OP2_11 src1 src2)
1123 "mulu $src1,$src2"
1124 (+ OP1_1 OP2_11 src1 src2)
1608 (mov11 movri11 mov OP1_8 OP2_4 src2 memory HI)
1609 (mov11 movbri11 movb OP1_10 OP2_4 src2 memory HI)
1622 (mov12 movri12 mov OP1_9 OP2_4 src2 memory HI)
1623 (mov12 movbri12 movb OP1_11 OP2_4 src2 memory HI)
[all …]
Dm32c.cpu6092 ;<arith>.size:S src2,r0[l] -- for m32c
6095 (define-pmacro (binary-arith32-S-src2 op xmode wstr wbit opc1 opc2 sem)
6096 (dni (.sym op 32 wstr .S-src2-r0- xmode)
6097 (.str op 32 wstr ":S src2,r0[l]")
6106 ;<arith>.b:S src2,r0l/r0h -- for m16c
6109 (define-pmacro (binary-arith16-b-S-src2 op opc1 opc2 sem)
6111 (dni (.sym op 16 .b.S-src2)
6112 (.str op ".b:S src2,r0[lh]")
7155 (define-pmacro (insn-imm1-imm2-dst-defn src1 src2 dstgroup xmode wstr op encoding sem)
7156 (dni (.sym op 32 wstr - src1 - src2 - dstgroup)
[all …]
Dcris.cpu3387 ((DI src1) (DI src2) (DI tmpr))
3389 (set src2 (ext DI (trunc BWD Rd)))
3390 (set tmpr (mul src1 src2))
3393 (setf-arit DI muls src1 src2 tmpr cbit)))
3407 ((DI src1) (DI src2) (DI tmpr))
3409 (set src2 (zext DI (trunc BWD Rd)))
3410 (set tmpr (mul src1 src2))
3413 (setf-arit DI mulu src1 src2 tmpr cbit)))
Dfrv.cpu9319 (define-pmacro (media-pack src1 src2 targ offset)
9322 (set (halfword lo targ offset) (halfword lo src2 offset)))
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/tic6x/
Dinsns16-d-unit.s24 dx2op: ; op = 0 | ADD (.unit) src1, src2, dst (src1 = dst)
25 ; op = 1 | SUB (.unit) src1, src2, dst (src1 = dst, dst = src1 - src2
/toolchain/binutils/binutils-2.27/opcodes/
Di960-dis.c233 int src2; in cobr() local
287 src2 = (word1 >> 14) & 0x1f; in cobr()
299 (*info->fprintf_func) (stream, ",sf%d,", src2); in cobr()
302 (*info->fprintf_func) (stream, ",%s,", reg_names[src2]); in cobr()
469 int src, src2, dst; in reg() local
727 src2 = (word1 >> 14) & 0x1f; in reg()
745 regop (m2, s2, src2, fp); in reg()
755 regop (m2, s2, src2, fp); in reg()
DChangeLog-20131110 individual msb and lsb halves in src1 & src2 fields. Discard the
1111 src1 (lsb) value and only use src2 (msb), discarding bit 0, to
Darc-opc.c938 MAKE_SRC_POS_INSERT_EXTRACT_FUNCS (src2, 12)
Dh8500-opc.h151 char flags,src1,src2,dst; member
/toolchain/binutils/binutils-2.27/gas/config/
Dtc-i960.c1930 int opcode, src1, src2, m1, s2; in relax_cobr() local
1945 src2 = (instr >> 14) & 0x1f; in relax_cobr()
1950 | src1 | (m1 << 11) | (s2 << 6) | (src2 << 14); in relax_cobr()