Searched refs:Srl (Results 1 – 6 of 6) sorted by relevance
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 1004 SDValue Srl = CurDAG->getNode(ISD::SRL, dl, N.getValueType(), in MatchAddressRecursively() local 1007 Srl, Mask); in MatchAddressRecursively() 1023 if (Srl.getNode()->getNodeId() == -1 || in MatchAddressRecursively() 1024 Srl.getNode()->getNodeId() > Shift.getNode()->getNodeId()) { in MatchAddressRecursively() 1025 CurDAG->RepositionNode(Shift.getNode(), Srl.getNode()); in MatchAddressRecursively() 1026 Srl.getNode()->setNodeId(Shift.getNode()->getNodeId()); in MatchAddressRecursively()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 384 SDValue Srl = N1.getOperand(0); in PreprocessISelDAG() local 386 if (!isOpcWithIntImmediate(Srl.getNode(), ISD::SRL, Srl_imm) || in PreprocessISelDAG() 405 Srl = CurDAG->getNode(ISD::SRL, SDLoc(Srl), MVT::i32, in PreprocessISelDAG() 406 Srl.getOperand(0), in PreprocessISelDAG() 407 CurDAG->getConstant(Srl_imm + TZ, SDLoc(Srl), in PreprocessISelDAG() 410 Srl, in PreprocessISelDAG() 411 CurDAG->getConstant(And_imm, SDLoc(Srl), MVT::i32)); in PreprocessISelDAG() 413 N1, CurDAG->getConstant(TZ, SDLoc(Srl), MVT::i32)); in PreprocessISelDAG()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelDAGToDAG.cpp | 1260 const SDValue &Srl = N->getOperand(0); in SelectS_BFE() local 1261 ConstantSDNode *Shift = dyn_cast<ConstantSDNode>(Srl.getOperand(1)); in SelectS_BFE() 1272 Srl.getOperand(0), ShiftVal, WidthVal)); in SelectS_BFE()
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/external/swiftshader/third_party/subzero/src/ |
D | IceInstMIPS32.h | 269 Srl, enumerator 1274 using InstMIPS32Srl = InstMIPS32Imm16<InstMIPS32::Srl>;
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/external/llvm/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 936 SDValue Srl = DAG.getNode(ISD::SRL, DL, VT, X, Eight); in foldMaskAndShiftToExtract() local 937 SDValue And = DAG.getNode(ISD::AND, DL, VT, Srl, NewMask); in foldMaskAndShiftToExtract() 947 insertDAGNode(DAG, N, Srl); in foldMaskAndShiftToExtract()
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D | X86ISelLowering.cpp | 14907 SDValue Srl = DAG.getNode(ISD::SRL, dl, MVT::i16, FNStSW, in ConvertCmpIfNecessary() local 14909 SDValue TruncSrl = DAG.getNode(ISD::TRUNCATE, dl, MVT::i8, Srl); in ConvertCmpIfNecessary() 20990 SDValue Srl = in LowerVectorCTPOPBitmath() local 20992 SDValue And = GetMask(Srl, APInt::getSplat(Len, APInt(8, 0x55))); in LowerVectorCTPOPBitmath() 20997 Srl = DAG.getBitcast(VT, GetShift(ISD::SRL, DAG.getBitcast(SrlVT, V), 2)); in LowerVectorCTPOPBitmath() 20998 SDValue AndRHS = GetMask(Srl, APInt::getSplat(Len, APInt(8, 0x33))); in LowerVectorCTPOPBitmath() 21002 Srl = DAG.getBitcast(VT, GetShift(ISD::SRL, DAG.getBitcast(SrlVT, V), 4)); in LowerVectorCTPOPBitmath() 21003 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, V, Srl); in LowerVectorCTPOPBitmath()
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