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Searched refs:BIN (Results 1 – 10 of 10) sorted by relevance

/toolchain/binutils/binutils-2.27/binutils/
Dsanity.sh29 "") BIN=. ;;
30 *) BIN="$1" ;;
35 ${BIN}/size ${BIN}/$i > /dev/null
40 ${BIN}/objdump -ahifdrtxsl ${BIN}/$i > /dev/null
45 ${BIN}/nm ${BIN}/$i > /dev/null
52 cp ${BIN}/strip ${TMPDIR}/strip
55 cp ${BIN}/$i ${TMPDIR}/$i
56 ${BIN}/strip ${TMPDIR}/$i
57 cp ${BIN}/$i ${TMPDIR}/$i
/toolchain/binutils/binutils-2.27/opcodes/
Davr-dis.c39 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ argument
40 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
Dcrx-dis.c367 if ((doubleWord & mask) == BIN(instruction->match, instruction->match_bits)) in match_opcode()
Dcr16-dis.c336 if ((doubleWord & mask) == BIN (instruction->match, in cr16_match_opcode()
/toolchain/binutils/binutils-2.27/include/opcode/
Dcrx.h400 #define BIN(OPC,SHIFT) (OPC << SHIFT) macro
Dcr16.h414 #define BIN(OPC,SHIFT) (OPC << SHIFT) macro
/toolchain/binutils/binutils-2.27/gas/config/
Dtc-crx.c1485 output_opcode[0] = BIN (instruction->match, instruction->match_bits); in assemble_insn()
1635 output_opcode[0] = BIN (instruction->match, instruction->match_bits); in assemble_insn()
Dtc-avr.c48 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ argument
49 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
Dtc-cr16.c2236 output_opcode[0] = BIN (instruction->match, instruction->match_bits); in assemble_insn()
2380 output_opcode[0] = BIN (instruction->match, instruction->match_bits); in assemble_insn()
/toolchain/binutils/binutils-2.27/zlib/as400/
Dzlib.inc104 D zs_data_type 10i 0 ASC/BIN best guess