| /toolchain/binutils/binutils-2.27/opcodes/ |
| D | h8500-opc.h | 140 #define IMM4 34 macro
229 {12,'-','I','!','!',O_TRAPA|O_UNSZ,"trapa",1,{IMM4,0},2, {{0x08,0xff,0 },{0x10,0xf0,IMM4 }}},
1155 {139,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RNDEC},2, {{0xb8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1156 {139,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RNINC},2, {{0xc8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1160 {139,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RNIND},2, {{0xd8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1161 {139,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1163 …39,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,ABS8},3, {{0x0d,0xff,0 },{0x00,0x00,ABS8 },{0xf0…
1165 …'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RNIND_D8},3, {{0xe8,0xf8,RN },{0x00,0x00,DISP8 },{0…
1168 …','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,ABS16},4, {{0x1d,0xff,0 },{0x00,0x00,ABS16 },{0x00,0x00,0…
1169 …I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RNIND_D16},4, {{0xf8,0xf8,RN },{0x00,0x00,DISP16 },{0x00,0x0…
[all …]
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| D | xstormy16-opc.c | 502 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
526 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
550 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
574 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
610 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
622 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
634 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
646 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
658 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
664 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
[all …]
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| D | h8500-dis.c | 172 case IMM4: in print_insn_h8500()
311 case IMM4: in print_insn_h8500()
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| D | m10300-opc.c | 235 #define IMM4 (PC+1) macro
239 #define EPSW (IMM4+1)
1311 { "syscall", 0xf0e0, 0xfff0, 0, FMT_D0, AM33, {IMM4}},
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| /toolchain/binutils/binutils-2.27/include/opcode/ |
| D | h8300.h | 122 IMM4 = IMM | L_4, enumerator
134 IMM4_NS = IMM4 | NO_SYMBOLS,
1371 …{O (O_DIVS, SW), AV_H8SX, 0, "divs.w", {{IMM4, RD16, E}}, {{0x0, 0x1, 0xd, 0x6, 0x5, 0x1, IMM4, RD…
1373 …{O (O_DIVS, SL), AV_H8SX, 0, "divs.l", {{IMM4, RD32, E}}, {{0x0, 0x1, 0xd, 0x6, 0x5, 0x3, IMM4, …
1376 …{O (O_DIVU, SW), AV_H8SX, 0, "divu.w", {{IMM4, RD16, E}}, {{0x0, 0x1, 0xd, 0xe, 0x5, 0x1, IMM4, RD…
1378 …{O (O_DIVU, SL), AV_H8SX, 0, "divu.l", {{IMM4, RD32, E}}, {{0x0, 0x1, 0xd, 0xe, 0x5, 0x3, IMM4, …
1381 …{O (O_DIVXS, SB), AV_H8SX, 0, "divxs.b", {{IMM4, RD16, E}}, {{0x0, 0x1, 0xD, 0x4, 0x5, 0x1, IMM4,…
1383 …{O (O_DIVXS, SW), AV_H8SX, 0, "divxs.w", {{IMM4, RD32, E}}, {{0x0, 0x1, 0xD, 0x4, 0x5, 0x3, IMM4,…
1386 …{O (O_DIVXU, SB), AV_H8SX, 0, "divxu.b", {{IMM4, RD16, E}}, {{0x0, 0x1, 0xD, 0xC, 0x5, 0x1, IMM4,…
1388 …{O (O_DIVXU, SW), AV_H8SX, 0, "divxu.w", {{IMM4, RD32, E}}, {{0x0, 0x1, 0xD, 0xC, 0x5, 0x3, IMM4,…
[all …]
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| D | ChangeLog-9103 | 119 (h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries.
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| /toolchain/binutils/binutils-2.27/bfd/ |
| D | ChangeLog-2007 | 699 Added the below relaxations: IMM32 -> IMM20/IM16 -> IMM4.
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