/toolchain/binutils/binutils-2.27/gas/testsuite/gas/frv/ |
D | fr450-media-issue.s | 7 mmulhu fr4,fr6,acc8 ; M3 -- ok 21 mmulhu fr4,fr6,acc8 ; M3 -- error 30 mwtacc.p fr0,acc0 ; M3 32 mwtacc.p fr0,acc0 ; M3 34 mwtacc.p fr0,acc0 ; M3 35 mmulhu fr4,fr6,acc8 ; M3 -- ok 36 mwtacc.p fr0,acc0 ; M3 38 mwtacc.p fr0,acc0 ; M3 40 mwtacc.p fr0,acc0 ; M3 49 mmulhu fr4,fr6,acc8 ; M3 -- error [all …]
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/toolchain/binutils/binutils-2.27/gas/doc/ |
D | c-s390.texi | 371 @item RIS format: <insn> R1,I2,M3,D4(B4) 374 | OpCode | R1 | M3 | B4 | D4 | I2 | Opcode | 403 @item RRS format: <insn> R1,R2,M3,D4(B4) 406 | OpCode | R1 | R3 | B4 | D4 | M3 |////| OpCode | 599 @item crb R1,R2,M3,D4(B4) @tab crb<m> R1,R2,D4(B4) 600 @item cgrb R1,R2,M3,D4(B4) @tab cgrb<m> R1,R2,D4(B4) 601 @item crj R1,R2,M3,I4 @tab crj<m> R1,R2,I4 602 @item cgrj R1,R2,M3,I4 @tab cgrj<m> R1,R2,I4 603 @item cib R1,I2,M3,D4(B4) @tab cib<m> R1,I2,D4(B4) 604 @item cgib R1,I2,M3,D4(B4) @tab cgib<m> R1,I2,D4(B4) [all …]
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D | c-bfin.texi | 219 The set of 32-bit registers (M0, M1, M2, M3) that normally contain
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/bfin/ |
D | parallel.d | 154 248: 04 c8 48 58 R1.H = \(A1 = R1.L \* R0.H\) \|\| R2.L = W\[I1\+\+\] \|\| \[I3 \+\+ M3\] = R7; 156 …9 83 98 R2.H = \(A1 = R0.H \* R3.L\) \(M, ISS2\) \|\| R3.L = W\[I1\+\+\] \|\| \[I3 \+\+ M3\] = R6; 158 258: 05 c8 bf 59 R6.H = \(A1 \+= R7.L \* R7.H\) \|\| R4.L = W\[I1\+\+\] \|\| \[I3 \+\+ M3\] = R5; 160 …8 d3 19 R7.H = \(A1 \+= R2.L \* R3.L\) \(S2RND\) \|\| R5.L = W\[I1\+\+\] \|\| \[I3 \+\+ M3\] = R4; 162 268: 06 c8 a2 d9 R6.H = \(A1 -= R4.H \* R2.H\) \|\| R6.L = W\[I1\+\+\] \|\| \[I3 \+\+ M3\] = R3; 164 …8 5f 99 R5.H = \(A1 -= R3.H \* R7.L\) \(M, TFU\) \|\| R7.L = W\[I1\+\+\] \|\| \[I3 \+\+ M3\] = R2; 166 278: 0b c8 0a 20 R0 = \(A0 = R1.L \* R2.L\) \|\| R1.L = W\[I2--\] \|\| \[I3 \+\+ M3\] = R1; 168 280: 0b c9 8a 20 R2 = \(A0 = R1.L \* R2.L\) \(IS\) \|\| R1.L = W\[I2--\] \|\| \[I3 \+\+ M3\] = R0; 202 308: 0c cc 18 ca R5.L = R3 \(RND\) \|\| W\[P1\] = R2 \|\| R0 = \[I0 \+\+ M3\]; 236 390: 0b cc 3f a0 A0 \+= A1 \(W32\) \|\| R3.L = W\[I0\] \|\| R0 = \[I0 \+\+ M3\];
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D | move2.s | 81 R7 = M3; 99 FP = M3; 119 A1.W = M3; 144 M3 = FP; define 148 M3 = A1.W; define 179 M3 = L0; define
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D | parallel2.d | 36 70: 09 cc 18 00 A0.L = R3.L \|\| R0 = \[I0 \+\+ M3\] \|\| NOP; 38 78: 09 cc 20 80 A1.L = R4.L \|\| R0 = \[I1 \+\+ M3\] \|\| NOP; 52 b0: 07 c8 80 38 R2.H = A1, R2.L = A0 \|\| R0 = \[I2 \+\+ M3\] \|\| NOP; 60 d0: 07 c8 00 38 R0.H = A1, R0.L = A0 \|\| R5 = \[I3 \+\+ M3\] \|\| NOP;
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D | move2.d | 67 76: bf 30 R7 = M3; 83 96: bf 32 FP = M3; 99 b6: 9f 38 A1.W = M3; 119 de: 7f 34 M3 = FP; 123 e6: 3b 35 M3 = A1.W; 147 116: fc 34 M3 = L0;
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D | pseudo.s | 30 DBG M3;
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D | load.s | 7 M3.l = 0xffff;
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D | pseudo.d | 30 2e: 17 f8 DBG M3;
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D | load.d | 8 0: 17 e1 ff ff M3.L = 0xffff;.*
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D | parallel.s | 149 A0 += A1 (W32) || R3.L = W[I0] || R0 = [I0++ M3] ;
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D | vector2.d | 458 …708: 0c cc 13 0e R7.H = R7.L = SIGN \(R2.H\) \* R3.H \+ SIGN \(R2.L\) \* R3.L \|\| I0 \+= M3 \|\|…
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/toolchain/binutils/binutils-2.27/include/opcode/ |
D | i960.h | 53 #define M3 0x2000 macro 74 #define R_0(opc) ( REG_OPC(opc) | M1 | M2 | M3 ) /* No operands */ 75 #define R_1(opc) ( REG_OPC(opc) | M2 | M3 ) /* 1 operand: src1 */ 77 #define R_2(opc) ( REG_OPC(opc) | M3 ) /* 2 ops: src1/src2 */
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/toolchain/binutils/binutils-2.27/gas/config/ |
D | tc-i960.c | 1321 if ((n_ops == 1) && !(instr & M3)) in reg_fmt() 1344 if ((n_ops == 2) && !(instr & M3)) in reg_fmt()
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/toolchain/binutils/binutils-2.27/cpu/ |
D | frv.opc | 292 /* FM3 */ UNIT_NIL, /* no F3 or M3 units */ 327 /* FM3 */ UNIT_NIL, /* no F3 or M3 units */
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D | frv.cpu | 1192 ; Media unit M3 -- see table 13-8 in the fr400 LSI 1569 ; Media unit M3 -- see table 14-8 in the fr450 LSI
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/toolchain/binutils/binutils-2.27/opcodes/ |
D | ia64-ic.tbl | 34 ld-all-postinc; IC:ld[Format in {M2 M3}], IC:ldfp[Format in {M12}], IC:ldf[Format in {M7 M8}]
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/toolchain/binutils/binutils-2.27/gas/ |
D | ChangeLog-2006 | 2488 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
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D | ChangeLog-9295 | 5486 M1-M3, REG_OPC, R_*, SFR, LIT, FP, OP, R, RS, RL, RSL, F,
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/toolchain/benchmark/panorama_input/ |
D | test_011.ppm | 1468 )&" (^HE�tq�pn�qo[ECYFCO<8C317'&*"K:8A/.6%#..)5"M3:.F&//' 5699 #(6-7.?.A/F.F.J/K0M3O4R5 5743 M3 L1��w��z��{��{��{��x��u��u��u��v��vƯ�ҹ�ϵ���s��i��k��l��s��l��a��]��Z��Z��R��S��R��T��W��V��W��V… 7283 M3 O4 7306 M3 L1��R��M��D��C��M��P��������������s��s��k��n��a��^��R��O��K��Q��p����������o��g��O��]ʲkŭf��R��…
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D | test_003.ppm | 541 -%!*")!,# -%!#" -/?D'?D'=?&03"51"�������ptO>B=".M3>B)1) 719 *I081 ,M3<E*4P=C�{��������������������{��w}VDJ>-3bQWXJOD6;F;>I=A7).7).L?BWJLLBC3()…
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D | test_008.ppm | 1694 4A&-M3:3*
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