Searched refs:conditional (Results 1 – 25 of 165) sorted by relevance
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| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| D | armv8-2-fp16-scalar-bad.l | 6 .*:79: Warning: ARMv8.2 scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTAB…
7 .*:79: Warning: ARMv8.2 scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTAB…
8 .*:79: Warning: ARMv8.2 scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTAB…
9 .*:79: Warning: ARMv8.2 scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTAB…
10 .*:79: Warning: ARMv8.2 scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTAB…
11 .*:79: Warning: ARMv8.2 scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTAB…
12 .*:79: Warning: ARMv8.2 scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTAB…
13 .*:79: Warning: ARMv8.2 scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTAB…
14 .*:79: Warning: ARMv8.2 scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTAB…
15 .*:79: Warning: ARMv8.2 scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTAB…
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| D | neon-cond-bad.l | 2 [^:]*:10: Error: instruction cannot be conditional -- `vmoveq q0,q1'
4 [^:]*:12: Error: instruction cannot be conditional -- `vmoveq\.i32 q0,#0'
6 [^:]*:27: Error: instruction cannot be conditional -- `vmuleq\.f32 d0,d1,d2'
8 [^:]*:28: Error: instruction cannot be conditional -- `vmlaeq\.f32 d0,d1,d2'
10 [^:]*:29: Error: instruction cannot be conditional -- `vmlseq\.f32 d0,d1,d2'
12 [^:]*:30: Error: instruction cannot be conditional -- `vaddeq\.f32 d0,d1,d2'
14 [^:]*:31: Error: instruction cannot be conditional -- `vsubeq\.f32 d0,d1,d2'
16 [^:]*:39: Error: instruction cannot be conditional -- `vabseq\.f32 d0,d1'
18 [^:]*:40: Error: instruction cannot be conditional -- `vnegeq\.f32 d0,d1'
20 [^:]*:48: Error: instruction cannot be conditional -- `vcvteq\.s32\.f32 d0,d1'
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| D | iwmmxt-bad.l | 2 [^:]*:1: Error: instruction cannot be conditional -- `wldrwgt wcgr0,\[r1\]'
6 [^:]*:5: Error: instruction cannot be conditional -- `wstrwgt wcgr0,\[r1\]'
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| D | armv8-a-it-bad.l | 3 .*:15: IT blocks containing more than one conditional instruction are deprecated in ARMv8
4 .*:20: IT blocks containing more than one conditional instruction are deprecated in ARMv8
6 .*:36: IT blocks containing more than one conditional instruction are deprecated in ARMv8
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| D | neon-cond-bad-inc.s | 1 # Check for illegal conditional Neon instructions in ARM mode. The instructions
14 @ Following four *can* be conditional.
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| D | ldsgeh.l | 2 .*: conditional infixes are deprecated in unified syntax
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| D | ldsgeb.l | 2 .*: conditional infixes are deprecated in unified syntax
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| D | arm-it-bad-3.l | 2 [^:]*:4: Error: thumb conditional instruction should be in IT block -- `moveq r1,r8'
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| D | insn-error-t.l | 2 [^:]*:4: Error: thumb conditional instruction should be in IT block -- `movne r1,r9'
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| D | neon-cond.s | 1 @ test conditional compilation
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| D | thumb2_it_search.d | 1 #name: 32-bit Thumb conditional instructions backward search
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| D | thumb2_mul-bad.s | 14 # There is no conditional "muls".
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| /toolchain/binutils/binutils-2.27/cpu/ |
| D | frv.cpu | 1865 (comment "conditional insn")
1994 (df f-cond "conditional arithmetic" () 8 1 UINT #f #f)
3173 (dnop cond "conditional arithmetic" (HASH-PREFIX) h-uint f-cond)
3660 ; Format: conditional INT, Logic, Shift r-r
3662 (define-pmacro (conditional-int-logic name operation op ope comment)
3676 (conditional-int-logic cadd add OP_58 OPE4_0 "conditional add")
3677 (conditional-int-logic csub sub OP_58 OPE4_1 "conditional sub")
3678 (conditional-int-logic cand and OP_5A OPE4_0 "conditional and")
3679 (conditional-int-logic cor or OP_5A OPE4_1 "conditional or")
3680 (conditional-int-logic cxor xor OP_5A OPE4_2 "conditional xor")
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| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arc/ |
| D | mov.s | 22 # conditional execution
57 # conditional execution + flag setting
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| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/sh/ |
| D | err-1.s | 4 ! is referenced in a conditional or unconditional branch.
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| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| D | bundle.s | 102 # For each of the three flavors of jump (unconditional, conditional,
103 # and conditional with prediction), we test a case that can be relaxed
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| D | x86-64-bundle.s | 106 # For each of the three flavors of jump (unconditional, conditional,
107 # and conditional with prediction), we test a case that can be relaxed
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| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-nios2/ |
| D | relax_section.s | 1 # relaxing conditional and unconditional jumps -- pc-relative
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| D | relax_cjmp.s | 1 # relaxing conditional jumps -- absolute
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| /toolchain/binutils/binutils-2.27/zlib/ |
| D | configure.ac | 65 # Find CPP now so that any conditional tests below won't do it and
66 # thereby make the resulting definitions conditional.
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| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-arm/ |
| D | cortex-a8-fix-bcc.s | 35 @ Trigger Cortex-A8 erratum workaround with conditional branches.
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| /toolchain/binutils/binutils-2.27/gold/testsuite/ |
| D | split_s390_1_z2.s | 2 # zarch mode, conditional call, no add
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| D | split_s390x_1_z4.s | 2 # conditional call, alfi.
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| D | split_s390x_1_z3.s | 2 # conditional call, ahi.
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| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mn10300/ |
| D | relax.d | 2 #name: Relaxation of conditional branches
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