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Searched refs:shrd (Results 1 – 14 of 14) sorted by relevance

/toolchain/binutils/binutils-2.27/gas/testsuite/gas/i860/
Dshift.s1 # shl, shr, shra, shrd
42 shrd %r0,%r1,%r2
43 shrd %r3,%r4,%r5
44 shrd %r6,%r7,%r8
45 shrd %r9,%r10,%r11
46 shrd %r31,%r13,%r14
47 shrd %r15,%r16,%r17
48 shrd %r18,%r19,%r20
49 shrd %r21,%r22,%r23
50 shrd %r24,%r25,%r31
[all …]
Dshift.d43 84: 00 00 22 b0 shrd %r0,%r1,%sp
44 88: 00 18 85 b0 shrd %fp,%r4,%r5
45 8c: 00 30 e8 b0 shrd %r6,%r7,%r8
46 90: 00 48 4b b1 shrd %r9,%r10,%r11
47 94: 00 f8 ae b1 shrd %r31,%r13,%r14
48 98: 00 78 11 b2 shrd %r15,%r16,%r17
49 9c: 00 90 74 b2 shrd %r18,%r19,%r20
50 a0: 00 a8 d7 b2 shrd %r21,%r22,%r23
51 a4: 00 c0 3f b3 shrd %r24,%r25,%r31
52 a8: 00 d8 9d b3 shrd %r27,%r28,%r29
[all …]
Ddual01.d16 18: 00 02 00 b0 d.shrd %r0,%r0,%r0
18 20: 00 02 00 b0 d.shrd %r0,%r0,%r0
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/
Dinval-reg.s14 shrd $0x90, %bx,%ecx label
15 shrd %cl, %bx,%ecx label
16 shrd %bx,%ecx label
Dinval-reg.l67 [ ]*14[ ]+shrd \$0x90, %bx,%ecx
68 [ ]*15[ ]+shrd %cl, %bx,%ecx
69 [ ]*16[ ]+shrd %bx,%ecx
Dopcode.s342 shrd $0x90,%edx,0x90909090(%eax)
343 shrd %cl,%edx,0x90909090(%eax)
554 shrd $0x90,%dx,0x90909090(%eax)
555 shrd %cl,%dx,0x90909090(%eax)
581 shrd %cl,%edx,%eax
Dintel.s345 shrd 0x90909090[eax], edx, 0x90
346 shrd 0x90909090[eax], edx, cl
559 shrd 0x90909090[eax], dx, 0x90
560 shrd 0x90909090[eax], dx, cl
632 shrd eax, edx, cl
Dopcode.d349 545: 0f ac 90 90 90 90 90 90 [ ]*shrd \$0x90,%edx,-0x6f6f6f70\(%eax\)
350 54d: 0f ad 90 90 90 90 90 [ ]*shrd %cl,%edx,-0x6f6f6f70\(%eax\)
561 95e: 66 0f ac 90 90 90 90 90 90 [ ]*shrd \$0x90,%dx,-0x6f6f6f70\(%eax\)
562 967: 66 0f ad 90 90 90 90 90 [ ]*shrd %cl,%dx,-0x6f6f6f70\(%eax\)
585 9ef: 0f ad d0 [ ]*shrd %cl,%edx,%eax
Dintel.d352 [ ]*[a-f0-9]+: 0f ac 90 90 90 90 90 90 [ ]*shrd \$0x90,%edx,-0x6f6f6f70\(%eax\)
353 [ ]*[a-f0-9]+: 0f ad 90 90 90 90 90 [ ]*shrd %cl,%edx,-0x6f6f6f70\(%eax\)
566 [ ]*[a-f0-9]+: 66 0f ac 90 90 90 90 90 90 [ ]*shrd \$0x90,%dx,-0x6f6f6f70\(%eax\)
567 [ ]*[a-f0-9]+: 66 0f ad 90 90 90 90 90 [ ]*shrd %cl,%dx,-0x6f6f6f70\(%eax\)
635 [ ]*[a-f0-9]+: 0f ad d0 [ ]*shrd %cl,%edx,%eax
Dopcode-intel.d350 *[0-9a-f]+: 0f ac 90 90 90 90 90 90[ ]+shrd[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx,0x90
351 *[0-9a-f]+: 0f ad 90 90 90 90 90[ ]+shrd[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx,cl
562 *[0-9a-f]+: 66 0f ac 90 90 90 90 90 90[ ]+shrd[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx,0x90
563 *[0-9a-f]+: 66 0f ad 90 90 90 90 90[ ]+shrd[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx,cl
586 *[0-9a-f]+: 0f ad d0 [ ]*shrd[ ]+eax,edx,cl
/toolchain/binutils/binutils-2.27/gas/testsuite/
DChangeLog-20063 * gas/i386/intel.s: Add tests for "shrd %cl,%edx,%eax" and
/toolchain/binutils/binutils-2.27/opcodes/
DChangeLog-0203586 * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
Di386-opc.tbl307 shrd, 3, 0xfac, None, 2, Cpu386, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf, { Imm8, Reg16|Reg32|R…
308 shrd, 3, 0xfad, None, 2, Cpu386, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf, { ShiftCount, Reg16|R…
309 shrd, 2, 0xfad, None, 2, Cpu386, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64, …
/toolchain/binutils/binutils-2.27/include/opcode/
DChangeLog-91032922 * i386.h: accept shld and shrd both with and without the shift