1 /* Xtensa ELF support for BFD. 2 Copyright (C) 2003-2016 Free Software Foundation, Inc. 3 Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. 4 5 This file is part of BFD, the Binary File Descriptor library. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, 20 USA. */ 21 22 /* This file holds definitions specific to the Xtensa ELF ABI. */ 23 24 #ifndef _ELF_XTENSA_H 25 #define _ELF_XTENSA_H 26 27 #include "elf/reloc-macros.h" 28 29 #ifdef __cplusplus 30 extern "C" { 31 #endif 32 33 /* Relocations. */ 34 START_RELOC_NUMBERS (elf_xtensa_reloc_type) 35 RELOC_NUMBER (R_XTENSA_NONE, 0) 36 RELOC_NUMBER (R_XTENSA_32, 1) 37 RELOC_NUMBER (R_XTENSA_RTLD, 2) 38 RELOC_NUMBER (R_XTENSA_GLOB_DAT, 3) 39 RELOC_NUMBER (R_XTENSA_JMP_SLOT, 4) 40 RELOC_NUMBER (R_XTENSA_RELATIVE, 5) 41 RELOC_NUMBER (R_XTENSA_PLT, 6) 42 RELOC_NUMBER (R_XTENSA_OP0, 8) 43 RELOC_NUMBER (R_XTENSA_OP1, 9) 44 RELOC_NUMBER (R_XTENSA_OP2, 10) 45 RELOC_NUMBER (R_XTENSA_ASM_EXPAND, 11) 46 RELOC_NUMBER (R_XTENSA_ASM_SIMPLIFY, 12) 47 RELOC_NUMBER (R_XTENSA_32_PCREL, 14) 48 RELOC_NUMBER (R_XTENSA_GNU_VTINHERIT, 15) 49 RELOC_NUMBER (R_XTENSA_GNU_VTENTRY, 16) 50 RELOC_NUMBER (R_XTENSA_DIFF8, 17) 51 RELOC_NUMBER (R_XTENSA_DIFF16, 18) 52 RELOC_NUMBER (R_XTENSA_DIFF32, 19) 53 RELOC_NUMBER (R_XTENSA_SLOT0_OP, 20) 54 RELOC_NUMBER (R_XTENSA_SLOT1_OP, 21) 55 RELOC_NUMBER (R_XTENSA_SLOT2_OP, 22) 56 RELOC_NUMBER (R_XTENSA_SLOT3_OP, 23) 57 RELOC_NUMBER (R_XTENSA_SLOT4_OP, 24) 58 RELOC_NUMBER (R_XTENSA_SLOT5_OP, 25) 59 RELOC_NUMBER (R_XTENSA_SLOT6_OP, 26) 60 RELOC_NUMBER (R_XTENSA_SLOT7_OP, 27) 61 RELOC_NUMBER (R_XTENSA_SLOT8_OP, 28) 62 RELOC_NUMBER (R_XTENSA_SLOT9_OP, 29) 63 RELOC_NUMBER (R_XTENSA_SLOT10_OP, 30) 64 RELOC_NUMBER (R_XTENSA_SLOT11_OP, 31) 65 RELOC_NUMBER (R_XTENSA_SLOT12_OP, 32) 66 RELOC_NUMBER (R_XTENSA_SLOT13_OP, 33) 67 RELOC_NUMBER (R_XTENSA_SLOT14_OP, 34) 68 RELOC_NUMBER (R_XTENSA_SLOT0_ALT, 35) 69 RELOC_NUMBER (R_XTENSA_SLOT1_ALT, 36) 70 RELOC_NUMBER (R_XTENSA_SLOT2_ALT, 37) 71 RELOC_NUMBER (R_XTENSA_SLOT3_ALT, 38) 72 RELOC_NUMBER (R_XTENSA_SLOT4_ALT, 39) 73 RELOC_NUMBER (R_XTENSA_SLOT5_ALT, 40) 74 RELOC_NUMBER (R_XTENSA_SLOT6_ALT, 41) 75 RELOC_NUMBER (R_XTENSA_SLOT7_ALT, 42) 76 RELOC_NUMBER (R_XTENSA_SLOT8_ALT, 43) 77 RELOC_NUMBER (R_XTENSA_SLOT9_ALT, 44) 78 RELOC_NUMBER (R_XTENSA_SLOT10_ALT, 45) 79 RELOC_NUMBER (R_XTENSA_SLOT11_ALT, 46) 80 RELOC_NUMBER (R_XTENSA_SLOT12_ALT, 47) 81 RELOC_NUMBER (R_XTENSA_SLOT13_ALT, 48) 82 RELOC_NUMBER (R_XTENSA_SLOT14_ALT, 49) 83 RELOC_NUMBER (R_XTENSA_TLSDESC_FN, 50) 84 RELOC_NUMBER (R_XTENSA_TLSDESC_ARG, 51) 85 RELOC_NUMBER (R_XTENSA_TLS_DTPOFF, 52) 86 RELOC_NUMBER (R_XTENSA_TLS_TPOFF, 53) 87 RELOC_NUMBER (R_XTENSA_TLS_FUNC, 54) 88 RELOC_NUMBER (R_XTENSA_TLS_ARG, 55) 89 RELOC_NUMBER (R_XTENSA_TLS_CALL, 56) 90 END_RELOC_NUMBERS (R_XTENSA_max) 91 92 /* Processor-specific flags for the ELF header e_flags field. */ 93 94 /* Four-bit Xtensa machine type field. */ 95 #define EF_XTENSA_MACH 0x0000000f 96 97 /* Various CPU types. */ 98 #define E_XTENSA_MACH 0x00000000 99 100 /* Leave bits 0xf0 alone in case we ever have more than 16 cpu types. 101 Highly unlikely, but what the heck. */ 102 103 #define EF_XTENSA_XT_INSN 0x00000100 104 #define EF_XTENSA_XT_LIT 0x00000200 105 106 107 /* Processor-specific dynamic array tags. */ 108 109 /* Offset of the table that records the GOT location(s). */ 110 #define DT_XTENSA_GOT_LOC_OFF 0x70000000 111 112 /* Number of entries in the GOT location table. */ 113 #define DT_XTENSA_GOT_LOC_SZ 0x70000001 114 115 116 /* Definitions for instruction and literal property tables. The 117 tables for ".gnu.linkonce.*" sections are placed in the following 118 sections: 119 120 instruction tables: .gnu.linkonce.x.* 121 literal tables: .gnu.linkonce.p.* 122 */ 123 124 #define XTENSA_INSN_SEC_NAME ".xt.insn" 125 #define XTENSA_LIT_SEC_NAME ".xt.lit" 126 #define XTENSA_PROP_SEC_NAME ".xt.prop" 127 128 typedef struct property_table_entry_t 129 { 130 bfd_vma address; 131 bfd_vma size; 132 flagword flags; 133 } property_table_entry; 134 135 /* Flags in the property tables to specify whether blocks of memory are 136 literals, instructions, data, or unreachable. For instructions, 137 blocks that begin loop targets and branch targets are designated. 138 Blocks that do not allow density instructions, instruction reordering 139 or transformation are also specified. Finally, for branch targets, 140 branch target alignment priority is included. Alignment of the next 141 block is specified in the current block and the size of the current 142 block does not include any fill required to align to the next 143 block. */ 144 145 #define XTENSA_PROP_LITERAL 0x00000001 146 #define XTENSA_PROP_INSN 0x00000002 147 #define XTENSA_PROP_DATA 0x00000004 148 #define XTENSA_PROP_UNREACHABLE 0x00000008 149 /* Instruction-only properties at beginning of code. */ 150 #define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010 151 #define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020 152 /* Instruction-only properties about code. */ 153 #define XTENSA_PROP_INSN_NO_DENSITY 0x00000040 154 #define XTENSA_PROP_INSN_NO_REORDER 0x00000080 155 /* Historically, NO_TRANSFORM was a property of instructions, 156 but it should apply to literals under certain circumstances. */ 157 #define XTENSA_PROP_NO_TRANSFORM 0x00000100 158 159 /* Branch target alignment information. This transmits information 160 to the linker optimization about the priority of aligning a 161 particular block for branch target alignment: None, low priority, 162 high priority, or required. These only need to be checked in 163 instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET. 164 Common usage is: 165 166 switch (GET_XTENSA_PROP_BT_ALIGN(flags)) 167 case XTENSA_PROP_BT_ALIGN_NONE: 168 case XTENSA_PROP_BT_ALIGN_LOW: 169 case XTENSA_PROP_BT_ALIGN_HIGH: 170 case XTENSA_PROP_BT_ALIGN_REQUIRE: 171 */ 172 #define XTENSA_PROP_BT_ALIGN_MASK 0x00000600 173 174 /* No branch target alignment. */ 175 #define XTENSA_PROP_BT_ALIGN_NONE 0x0 176 /* Low priority branch target alignment. */ 177 #define XTENSA_PROP_BT_ALIGN_LOW 0x1 178 /* High priority branch target alignment. */ 179 #define XTENSA_PROP_BT_ALIGN_HIGH 0x2 180 /* Required branch target alignment. */ 181 #define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3 182 183 #define GET_XTENSA_PROP_BT_ALIGN(flag) \ 184 (((unsigned)((flag) & (XTENSA_PROP_BT_ALIGN_MASK))) >> 9) 185 #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \ 186 (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \ 187 (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK)) 188 189 /* Alignment is specified in the block BEFORE the one that needs 190 alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to 191 get the required alignment specified as a power of 2. Use 192 SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required 193 alignment. Be careful of side effects since the SET will evaluate 194 flags twice. Also, note that the SIZE of a block in the property 195 table does not include the alignment size, so the alignment fill 196 must be calculated to determine if two blocks are contiguous. 197 TEXT_ALIGN is not currently implemented but is a placeholder for a 198 possible future implementation. */ 199 200 #define XTENSA_PROP_ALIGN 0x00000800 201 202 #define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000 203 204 #define GET_XTENSA_PROP_ALIGNMENT(flag) \ 205 (((unsigned)((flag) & (XTENSA_PROP_ALIGNMENT_MASK))) >> 12) 206 #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \ 207 (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \ 208 (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK)) 209 210 #define XTENSA_PROP_INSN_ABSLIT 0x00020000 211 212 extern asection *xtensa_make_property_section (asection *, const char *); 213 214 #ifdef __cplusplus 215 } 216 #endif 217 218 #endif /* _ELF_XTENSA_H */ 219