Lines Matching refs:CnstVal
5776 uint64_t CnstVal = CnstBits.getZExtValue(); in LowerVectorAND() local
5778 if (AArch64_AM::isAdvSIMDModImmType1(CnstVal)) { in LowerVectorAND()
5779 CnstVal = AArch64_AM::encodeAdvSIMDModImmType1(CnstVal); in LowerVectorAND()
5782 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerVectorAND()
5787 if (AArch64_AM::isAdvSIMDModImmType2(CnstVal)) { in LowerVectorAND()
5788 CnstVal = AArch64_AM::encodeAdvSIMDModImmType2(CnstVal); in LowerVectorAND()
5791 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerVectorAND()
5796 if (AArch64_AM::isAdvSIMDModImmType3(CnstVal)) { in LowerVectorAND()
5797 CnstVal = AArch64_AM::encodeAdvSIMDModImmType3(CnstVal); in LowerVectorAND()
5800 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerVectorAND()
5805 if (AArch64_AM::isAdvSIMDModImmType4(CnstVal)) { in LowerVectorAND()
5806 CnstVal = AArch64_AM::encodeAdvSIMDModImmType4(CnstVal); in LowerVectorAND()
5809 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerVectorAND()
5814 if (AArch64_AM::isAdvSIMDModImmType5(CnstVal)) { in LowerVectorAND()
5815 CnstVal = AArch64_AM::encodeAdvSIMDModImmType5(CnstVal); in LowerVectorAND()
5818 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerVectorAND()
5823 if (AArch64_AM::isAdvSIMDModImmType6(CnstVal)) { in LowerVectorAND()
5824 CnstVal = AArch64_AM::encodeAdvSIMDModImmType6(CnstVal); in LowerVectorAND()
5827 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerVectorAND()
5976 uint64_t CnstVal = CnstBits.getZExtValue(); in LowerVectorOR() local
5978 if (AArch64_AM::isAdvSIMDModImmType1(CnstVal)) { in LowerVectorOR()
5979 CnstVal = AArch64_AM::encodeAdvSIMDModImmType1(CnstVal); in LowerVectorOR()
5982 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerVectorOR()
5987 if (AArch64_AM::isAdvSIMDModImmType2(CnstVal)) { in LowerVectorOR()
5988 CnstVal = AArch64_AM::encodeAdvSIMDModImmType2(CnstVal); in LowerVectorOR()
5991 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerVectorOR()
5996 if (AArch64_AM::isAdvSIMDModImmType3(CnstVal)) { in LowerVectorOR()
5997 CnstVal = AArch64_AM::encodeAdvSIMDModImmType3(CnstVal); in LowerVectorOR()
6000 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerVectorOR()
6005 if (AArch64_AM::isAdvSIMDModImmType4(CnstVal)) { in LowerVectorOR()
6006 CnstVal = AArch64_AM::encodeAdvSIMDModImmType4(CnstVal); in LowerVectorOR()
6009 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerVectorOR()
6014 if (AArch64_AM::isAdvSIMDModImmType5(CnstVal)) { in LowerVectorOR()
6015 CnstVal = AArch64_AM::encodeAdvSIMDModImmType5(CnstVal); in LowerVectorOR()
6018 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerVectorOR()
6023 if (AArch64_AM::isAdvSIMDModImmType6(CnstVal)) { in LowerVectorOR()
6024 CnstVal = AArch64_AM::encodeAdvSIMDModImmType6(CnstVal); in LowerVectorOR()
6027 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerVectorOR()
6086 uint64_t CnstVal = CnstBits.getZExtValue(); in LowerBUILD_VECTOR() local
6092 if (VT.isInteger() && (CnstVal == 0 || CnstVal == ~0ULL)) in LowerBUILD_VECTOR()
6096 if (AArch64_AM::isAdvSIMDModImmType10(CnstVal)) { in LowerBUILD_VECTOR()
6097 CnstVal = AArch64_AM::encodeAdvSIMDModImmType10(CnstVal); in LowerBUILD_VECTOR()
6100 DAG.getConstant(CnstVal, dl, MVT::i32)); in LowerBUILD_VECTOR()
6106 DAG.getConstant(CnstVal, dl, MVT::i32)); in LowerBUILD_VECTOR()
6110 if (AArch64_AM::isAdvSIMDModImmType1(CnstVal)) { in LowerBUILD_VECTOR()
6111 CnstVal = AArch64_AM::encodeAdvSIMDModImmType1(CnstVal); in LowerBUILD_VECTOR()
6114 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6119 if (AArch64_AM::isAdvSIMDModImmType2(CnstVal)) { in LowerBUILD_VECTOR()
6120 CnstVal = AArch64_AM::encodeAdvSIMDModImmType2(CnstVal); in LowerBUILD_VECTOR()
6123 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6128 if (AArch64_AM::isAdvSIMDModImmType3(CnstVal)) { in LowerBUILD_VECTOR()
6129 CnstVal = AArch64_AM::encodeAdvSIMDModImmType3(CnstVal); in LowerBUILD_VECTOR()
6132 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6137 if (AArch64_AM::isAdvSIMDModImmType4(CnstVal)) { in LowerBUILD_VECTOR()
6138 CnstVal = AArch64_AM::encodeAdvSIMDModImmType4(CnstVal); in LowerBUILD_VECTOR()
6141 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6146 if (AArch64_AM::isAdvSIMDModImmType5(CnstVal)) { in LowerBUILD_VECTOR()
6147 CnstVal = AArch64_AM::encodeAdvSIMDModImmType5(CnstVal); in LowerBUILD_VECTOR()
6150 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6155 if (AArch64_AM::isAdvSIMDModImmType6(CnstVal)) { in LowerBUILD_VECTOR()
6156 CnstVal = AArch64_AM::encodeAdvSIMDModImmType6(CnstVal); in LowerBUILD_VECTOR()
6159 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6164 if (AArch64_AM::isAdvSIMDModImmType7(CnstVal)) { in LowerBUILD_VECTOR()
6165 CnstVal = AArch64_AM::encodeAdvSIMDModImmType7(CnstVal); in LowerBUILD_VECTOR()
6168 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6173 if (AArch64_AM::isAdvSIMDModImmType8(CnstVal)) { in LowerBUILD_VECTOR()
6174 CnstVal = AArch64_AM::encodeAdvSIMDModImmType8(CnstVal); in LowerBUILD_VECTOR()
6177 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6182 if (AArch64_AM::isAdvSIMDModImmType9(CnstVal)) { in LowerBUILD_VECTOR()
6183 CnstVal = AArch64_AM::encodeAdvSIMDModImmType9(CnstVal); in LowerBUILD_VECTOR()
6186 DAG.getConstant(CnstVal, dl, MVT::i32)); in LowerBUILD_VECTOR()
6191 if (AArch64_AM::isAdvSIMDModImmType11(CnstVal)) { in LowerBUILD_VECTOR()
6192 CnstVal = AArch64_AM::encodeAdvSIMDModImmType11(CnstVal); in LowerBUILD_VECTOR()
6195 DAG.getConstant(CnstVal, dl, MVT::i32)); in LowerBUILD_VECTOR()
6199 if (AArch64_AM::isAdvSIMDModImmType12(CnstVal) && in LowerBUILD_VECTOR()
6201 CnstVal = AArch64_AM::encodeAdvSIMDModImmType12(CnstVal); in LowerBUILD_VECTOR()
6203 DAG.getConstant(CnstVal, dl, MVT::i32)); in LowerBUILD_VECTOR()
6208 CnstVal = ~CnstVal; in LowerBUILD_VECTOR()
6209 if (AArch64_AM::isAdvSIMDModImmType1(CnstVal)) { in LowerBUILD_VECTOR()
6210 CnstVal = AArch64_AM::encodeAdvSIMDModImmType1(CnstVal); in LowerBUILD_VECTOR()
6213 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6218 if (AArch64_AM::isAdvSIMDModImmType2(CnstVal)) { in LowerBUILD_VECTOR()
6219 CnstVal = AArch64_AM::encodeAdvSIMDModImmType2(CnstVal); in LowerBUILD_VECTOR()
6222 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6227 if (AArch64_AM::isAdvSIMDModImmType3(CnstVal)) { in LowerBUILD_VECTOR()
6228 CnstVal = AArch64_AM::encodeAdvSIMDModImmType3(CnstVal); in LowerBUILD_VECTOR()
6231 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6236 if (AArch64_AM::isAdvSIMDModImmType4(CnstVal)) { in LowerBUILD_VECTOR()
6237 CnstVal = AArch64_AM::encodeAdvSIMDModImmType4(CnstVal); in LowerBUILD_VECTOR()
6240 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6245 if (AArch64_AM::isAdvSIMDModImmType5(CnstVal)) { in LowerBUILD_VECTOR()
6246 CnstVal = AArch64_AM::encodeAdvSIMDModImmType5(CnstVal); in LowerBUILD_VECTOR()
6249 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6254 if (AArch64_AM::isAdvSIMDModImmType6(CnstVal)) { in LowerBUILD_VECTOR()
6255 CnstVal = AArch64_AM::encodeAdvSIMDModImmType6(CnstVal); in LowerBUILD_VECTOR()
6258 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6263 if (AArch64_AM::isAdvSIMDModImmType7(CnstVal)) { in LowerBUILD_VECTOR()
6264 CnstVal = AArch64_AM::encodeAdvSIMDModImmType7(CnstVal); in LowerBUILD_VECTOR()
6267 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()
6272 if (AArch64_AM::isAdvSIMDModImmType8(CnstVal)) { in LowerBUILD_VECTOR()
6273 CnstVal = AArch64_AM::encodeAdvSIMDModImmType8(CnstVal); in LowerBUILD_VECTOR()
6276 DAG.getConstant(CnstVal, dl, MVT::i32), in LowerBUILD_VECTOR()