408 	u32 hctl, ac12;  in omap_hsmmc_conf_bus_power()  local
412 	hctl = readl(&mmc_base->hctl) & ~SDVS_MASK;  in omap_hsmmc_conf_bus_power()
417 		hctl |= SDVS_3V0;  in omap_hsmmc_conf_bus_power()
420 		hctl |= SDVS_1V8;  in omap_hsmmc_conf_bus_power()
425 	writel(hctl, &mmc_base->hctl);  in omap_hsmmc_conf_bus_power()
755 	writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl);  in omap_hsmmc_init_setup()
780 	writel(readl(&mmc_base->hctl) | SDBP_PWRON, &mmc_base->hctl);  in omap_hsmmc_init_setup()
907 	val = readl(&mmc_base->hctl);  in omap_hsmmc_prepare_data()
909 	writel(val, &mmc_base->hctl);  in omap_hsmmc_prepare_data()
935 	val = readl(&mmc_base->hctl);  in omap_hsmmc_dma_cleanup()
937 	writel(val, &mmc_base->hctl);  in omap_hsmmc_dma_cleanup()
1310 		writel(readl(&mmc_base->hctl) | DTW_4_BITMODE,
1311 			&mmc_base->hctl);
1318 		writel(readl(&mmc_base->hctl) & ~DTW_4_BITMODE,
1319 			&mmc_base->hctl);