Lines Matching refs:usbcfg
325 uint32_t usbcfg = 0; in dwc_otg_core_init() local
329 usbcfg = readl(®s->gusbcfg); in dwc_otg_core_init()
333 usbcfg |= DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV; in dwc_otg_core_init()
335 usbcfg |= DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR | in dwc_otg_core_init()
339 usbcfg &= ~DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV; in dwc_otg_core_init()
344 usbcfg |= DWC2_GUSBCFG_TERM_SEL_DL_PULSE; in dwc_otg_core_init()
346 usbcfg &= ~DWC2_GUSBCFG_TERM_SEL_DL_PULSE; in dwc_otg_core_init()
348 writel(usbcfg, ®s->gusbcfg); in dwc_otg_core_init()
392 usbcfg &= ~(DWC2_GUSBCFG_ULPI_UTMI_SEL | DWC2_GUSBCFG_PHYIF); in dwc_otg_core_init()
393 usbcfg |= CONFIG_DWC2_PHY_TYPE << DWC2_GUSBCFG_ULPI_UTMI_SEL_OFFSET; in dwc_otg_core_init()
395 if (usbcfg & DWC2_GUSBCFG_ULPI_UTMI_SEL) { /* ULPI interface */ in dwc_otg_core_init()
397 usbcfg |= DWC2_GUSBCFG_DDRSEL; in dwc_otg_core_init()
399 usbcfg &= ~DWC2_GUSBCFG_DDRSEL; in dwc_otg_core_init()
403 usbcfg |= DWC2_GUSBCFG_PHYIF; in dwc_otg_core_init()
407 writel(usbcfg, ®s->gusbcfg); in dwc_otg_core_init()
413 usbcfg = readl(®s->gusbcfg); in dwc_otg_core_init()
414 usbcfg &= ~(DWC2_GUSBCFG_ULPI_FSLS | DWC2_GUSBCFG_ULPI_CLK_SUS_M); in dwc_otg_core_init()
422 usbcfg |= DWC2_GUSBCFG_ULPI_FSLS; in dwc_otg_core_init()
423 usbcfg |= DWC2_GUSBCFG_ULPI_CLK_SUS_M; in dwc_otg_core_init()
427 usbcfg |= DWC2_GUSBCFG_FORCEHOSTMODE; in dwc_otg_core_init()
429 writel(usbcfg, ®s->gusbcfg); in dwc_otg_core_init()
458 usbcfg = 0; in dwc_otg_core_init()
461 usbcfg |= DWC2_GUSBCFG_HNPCAP | DWC2_GUSBCFG_SRPCAP; in dwc_otg_core_init()
463 usbcfg |= DWC2_GUSBCFG_IC_USB_CAP; in dwc_otg_core_init()
466 setbits_le32(®s->gusbcfg, usbcfg); in dwc_otg_core_init()