| /external/clang/test/CXX/concepts-ts/dcl.dcl/dcl.spec/dcl.spec.concept/ |
| D | p1.cpp | 33 concept class CC1 {}; // expected-error {{'concept' can only appear on the definition of a function… class
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineMulDivRem.cpp | 465 Constant *CC1 = ConstantExpr::getFMul(C, C1); in visitFMul() local
487 Constant *CC1 = ConstantExpr::getFMul(C, C1); in visitFMul() local
493 Constant *CC1 = ConstantExpr::getFMul(C, C1); in visitFMul() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 1445 AArch64CC::CondCode CC1, CC2; in select() local
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| D | AArch64ISelLowering.cpp | 4373 AArch64CC::CondCode CC1, CC2; in LowerBR_CC() local
4542 AArch64CC::CondCode CC1, CC2; in LowerSETCC() local
4720 AArch64CC::CondCode CC1, CC2; in LowerSELECT_CC() local
7613 AArch64CC::CondCode CC1, CC2; in LowerVSETCC() local
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringARM32.cpp | 4265 #define X(val, CC0, CC1, CC0_V, CC1_V, INV_V, NEG_V) _fcmp_ll_##val, argument
4289 CondARM32::Cond CC1; member
4291 #define X(val, CC0, CC1, CC0_V, CC1_V, INV_V, NEG_V) \ argument
4383 #define X(val, CC0, CC1, CC0_V, CC1_V, INV_V, NEG_V) \ in lowerFcmp() argument
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 470 ARMCC::CondCodes CC1 = (ARMCC::CondCodes)Pred1[0].getImm(); in SubsumesPredicate() local
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 3729 AArch64CC::CondCode CC1, CC2; in LowerBR_CC() local
3898 AArch64CC::CondCode CC1, CC2; in LowerSETCC() local
4049 AArch64CC::CondCode CC1, CC2; in LowerSELECT_CC() local
6791 AArch64CC::CondCode CC1, CC2; in LowerVSETCC() local
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 2259 SDValue LL, LR, RL, RR, CC0, CC1; in visitAND() local
2731 SDValue LL, LR, RL, RR, CC0, CC1; in visitOR() local
|
| D | LegalizeDAG.cpp | 1992 ISD::CondCode CC1 = ISD::SETCC_INVALID, CC2 = ISD::SETCC_INVALID; in LegalizeSetCCCondCode() local
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 499 ARMCC::CondCodes CC1 = (ARMCC::CondCodes)Pred1[0].getImm(); in SubsumesPredicate() local
|
| D | ARMISelLowering.cpp | 3776 ISD::CondCode CC1 = cast<CondCodeSDNode>(Op.getOperand(4))->get(); in isSaturatingConditional() local
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 1586 ISD::CondCode CC1 = ISD::SETCC_INVALID, CC2 = ISD::SETCC_INVALID; in LegalizeSetCCCondCode() local
|
| D | DAGCombiner.cpp | 2866 SDValue LL, LR, RL, RR, CC0, CC1; in visitANDLike() local
3623 SDValue LL, LR, RL, RR, CC0, CC1; in visitORLike() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 525 ARMCC::CondCodes CC1 = (ARMCC::CondCodes)Pred1[0].getImm(); in SubsumesPredicate() local
|
| D | ARMISelLowering.cpp | 4306 ISD::CondCode CC1 = cast<CondCodeSDNode>(Op.getOperand(4))->get(); in isSaturatingConditional() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 1623 ISD::CondCode CC1 = ISD::SETCC_INVALID, CC2 = ISD::SETCC_INVALID; in LegalizeSetCCCondCode() local
|
| D | DAGCombiner.cpp | 3846 ISD::CondCode CC1 = cast<CondCodeSDNode>(N1CC)->get(); in foldLogicOfSetCCs() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 18404 unsigned CC0, CC1; in LowerVSETCC() local
33190 X86::CondCode &CC1, SDValue &Flags, in checkBoolTestAndOrSetCCCombine()
33429 X86::CondCode CC0, CC1; in combineCMov() local
|