| /external/linux-kselftest/tools/testing/selftests/powerpc/include/ |
| D | instructions.h | 9 #define __COPY(RA, RB, L) \ argument
11 #define COPY(RA, RB, L) \ argument
33 #define __PASTE(RA, RB, L, RC) \ argument
35 #define PASTE(RA, RB, L, RC) \ argument
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| /external/clang/lib/Rewrite/ |
| D | HTMLRewrite.cpp | 57 void html::HighlightRange(RewriteBuffer &RB, unsigned B, unsigned E, in HighlightRange()
115 RewriteBuffer &RB = R.getEditBuffer(FID); in EscapeText() local
208 static void AddLineNumber(RewriteBuffer &RB, unsigned LineNo, in AddLineNumber()
232 RewriteBuffer &RB = R.getEditBuffer(FID); in AddLineNumbers() local
358 RewriteBuffer &RB = R.getEditBuffer(FID); in SyntaxHighlight() local
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| D | Rewriter.cpp | 143 const RewriteBuffer &RB = I->second; in getRangeSize() local
195 const RewriteBuffer &RB = I->second; in getRewrittenText() local
381 RewriteBuffer &RB = getEditBuffer(FID); in IncreaseIndentation() local
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| /external/linux-kselftest/tools/testing/selftests/powerpc/context_switch/ |
| D | cp_abort.c | 36 #define PASTE(RA, RB, L, RC) \ argument
53 #define COPY(RA, RB, L) \ argument
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 142 getRegClassForTypeOnBank(LLT Ty, const RegisterBank &RB, in getRegClassForTypeOnBank()
394 const RegisterBank *RB = nullptr; in selectCopy() local
605 const RegisterBank &RB = *RBI.getRegBank(LHS, MRI, TRI); in selectCompareBranch() local
736 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); in select() local
810 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
1030 const RegisterBank &RB = *RBI.getRegBank(ValReg, MRI, TRI); in select() local
1084 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
1122 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
1261 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
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| D | AArch64RegisterBankInfo.cpp | 96 #define CHECK_PARTIALMAP(Idx, ValStartIdx, ValLength, RB) \ in AArch64RegisterBankInfo() argument
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| /external/clang/lib/Frontend/Rewrite/ |
| D | RewriteMacros.cpp | 95 RewriteBuffer &RB = Rewrite.getEditBuffer(SM.getMainFileID()); in RewriteMacrosInInput() local
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| /external/clang/test/Layout/ |
| D | ms-x86-alias-avoidance-padding.cpp | 302 struct RB { char c; }; struct
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| /external/pdfium/third_party/libtiff/ |
| D | tif_color.c | 178 #define Code2V(c, RB, RW, CR) ((((c)-(int32)(RB))*(float)(CR))/(float)(((RW)-(RB)!=0) ? ((RW)-(RB))… argument
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.cpp | 91 if (auto *RB = RegClassOrBank.dyn_cast<const RegisterBank *>()) in getRegBank() local
136 const RegisterBank *RB = RegClassOrBank.get<const RegisterBank *>(); in constrainGenericRegister() local
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/Disassembler/ |
| D | MBlazeDisassembler.cpp | 527 unsigned RB = getRB(insn); in getInstruction() local
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| /external/clang/tools/arcmt-test/ |
| D | arcmt-test.cpp | 144 for (const auto &RB : PPOpts.RemappedFileBuffers) in printResult() local
|
| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCRegisterInfo.h | 41 iterator RB, iterator RE, const unsigned char *Bits, in MCRegisterClass()
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| /external/clang/lib/Frontend/ |
| D | ASTUnit.cpp | 251 for (const auto &RB : PPOpts.RemappedFileBuffers) in ~ASTUnit() local
1216 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) { in ComputePreamble() local
1398 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) { in getMainBufferWithPrecompiledPreamble() local
2041 for (const auto &RB : PPOpts.RemappedFileBuffers) in Reparse() local
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| /external/skia/gm/ |
| D | image.cpp | 91 RB = W * 4 + 8, enumerator
|
| /external/skqp/gm/ |
| D | image.cpp | 91 RB = W * 4 + 8, enumerator
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 392 const RegisterBank &RB, in getLoadStoreOp()
502 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in selectLoadStoreOp() local
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| /external/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.cpp | 70 RegisterBank &RB = getRegBank(ID); in addRegBankCoverage() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineRegisterInfo.cpp | 121 auto const *RB = getRegBankOrNull(ConstrainingReg); in constrainRegAttrs() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 339 const RegisterBank *RB = MRI.getRegBankOrNull(I.getOperand(0).getReg()); in selectG_CONSTANT() local
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| D | SIRegisterInfo.cpp | 1580 const RegisterBank *RB = MRI.getRegBankOrNull(MO.getReg()); in getConstrainedRegClassForOperand() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonEarlyIfConv.cpp | 473 const MachineOperand &RB = MI.getOperand(3); in computePhiCost() local
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| D | HexagonVLIWPacketizer.cpp | 248 MachineBasicBlock::iterator RB = Begin; in runOnMachineFunction() local
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| /external/lua/src/ |
| D | lvm.c | 729 #define RB(i) check_exp(getBMode(GET_OPCODE(i)) == OpArgR, base+GETARG_B(i)) macro
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonVLIWPacketizer.cpp | 221 MachineBasicBlock::iterator RB = Begin; in runOnMachineFunction() local
|