| /art/compiler/utils/x86/ |
| D | assembler_x86_test.cc | 275 GetAssembler()->LoadLongConstant(x86::XMM0, 51); in TEST_F()
311 GetAssembler()->repne_scasb(); in TEST_F()
317 GetAssembler()->repne_scasw(); in TEST_F()
323 GetAssembler()->repe_cmpsb(); in TEST_F()
329 GetAssembler()->repe_cmpsw(); in TEST_F()
335 GetAssembler()->repe_cmpsl(); in TEST_F()
341 GetAssembler()->rep_movsb(); in TEST_F()
347 GetAssembler()->rep_movsw(); in TEST_F()
463 GetAssembler()->cmovl(x86::kEqual, x86::Register(x86::EAX), x86::Address( in TEST_F()
465 GetAssembler()->cmovl(x86::kNotEqual, x86::Register(x86::EDI), x86::Address( in TEST_F()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64_test.cc | 1005 GetAssembler()->cvtsi2ss(x86_64::XmmRegister(x86_64::XMM0), in TEST_F()
1008 GetAssembler()->cvtsi2ss(x86_64::XmmRegister(x86_64::XMM0), in TEST_F()
1017 GetAssembler()->cvtsi2sd(x86_64::XmmRegister(x86_64::XMM0), in TEST_F()
1020 GetAssembler()->cvtsi2sd(x86_64::XmmRegister(x86_64::XMM0), in TEST_F()
1085 GetAssembler()->repne_scasb(); in TEST_F()
1091 GetAssembler()->repne_scasw(); in TEST_F()
1097 GetAssembler()->rep_movsw(); in TEST_F()
1644 GetAssembler()->psllw(x86_64::XmmRegister(x86_64::XMM0), x86_64::Immediate(1)); in TEST_F()
1645 GetAssembler()->psllw(x86_64::XmmRegister(x86_64::XMM15), x86_64::Immediate(2)); in TEST_F()
1651 GetAssembler()->pslld(x86_64::XmmRegister(x86_64::XMM0), x86_64::Immediate(1)); in TEST_F()
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| /art/compiler/optimizing/ |
| D | intrinsics_arm_vixl.cc | 59 ArmVIXLAssembler* IntrinsicCodeGeneratorARMVIXL::GetAssembler() { in GetAssembler() function in art::arm::IntrinsicCodeGeneratorARMVIXL
60 return codegen_->GetAssembler(); in GetAssembler()
89 ArmVIXLAssembler* assembler = down_cast<ArmVIXLAssembler*>(codegen->GetAssembler()); in EmitNativeCode()
178 ArmVIXLAssembler* assembler = arm_codegen->GetAssembler(); in EmitNativeCode()
247 assembler_(codegen->GetAssembler()), in IntrinsicLocationsBuilderARMVIXL()
301 MoveFPToInt(invoke->GetLocations(), /* is64bit= */ true, GetAssembler()); in VisitDoubleDoubleToRawLongBits()
304 MoveIntToFP(invoke->GetLocations(), /* is64bit= */ true, GetAssembler()); in VisitDoubleLongBitsToDouble()
315 MoveFPToInt(invoke->GetLocations(), /* is64bit= */ false, GetAssembler()); in VisitFloatFloatToRawIntBits()
318 MoveIntToFP(invoke->GetLocations(), /* is64bit= */ false, GetAssembler()); in VisitFloatIntBitsToFloat()
345 ArmVIXLAssembler* assembler = codegen->GetAssembler(); in GenNumberOfLeadingZeros()
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| D | optimizing_cfi_test.cc | 62 code_gen_->GetAssembler()->cfi().SetEnabled(true); in SetUpFrame()
102 Assembler* opt_asm = code_gen_->GetAssembler(); in Check()
204 ->GetAssembler())->GetVIXLAssembler()-> in TEST_ISA()
234 #define __ down_cast<mips::MipsAssembler*>(GetCodeGenerator()->GetAssembler())-> in TEST_F()
264 #define __ down_cast<mips64::Mips64Assembler*>(GetCodeGenerator()->GetAssembler())-> in TEST_F()
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| D | code_generator_arm_vixl.cc | 335 arm_codegen->GetAssembler()->StoreRegisterList(core_spills, orig_offset); in SaveLiveRegisters()
369 arm_codegen->GetAssembler()->LoadRegisterList(core_spills, orig_offset); in RestoreLiveRegisters()
1926 #define __ reinterpret_cast<ArmVIXLAssembler*>(GetAssembler())->GetVIXLAssembler()-> // NOLINT
1937 CompileBakerReadBarrierThunk(*GetAssembler(), encoded_data, /* debug_name= */ nullptr); in Finalize()
1940 GetAssembler()->FinalizeCode(); in Finalize()
2058 assembler_(codegen->GetAssembler()), in InstructionCodeGeneratorARMVIXL()
2097 GetAssembler()->cfi().Nop(); in GenerateFrameEntry()
2129 GetAssembler()->cfi().AdjustCFAOffset(kArmWordSize * POPCOUNT(core_spill_mask_)); in GenerateFrameEntry()
2130 GetAssembler()->cfi().RelOffsetForMany(DWARFReg(kMethodRegister), in GenerateFrameEntry()
2141 GetAssembler()->cfi().AdjustCFAOffset(kArmWordSize * POPCOUNT(fpu_spill_mask_)); in GenerateFrameEntry()
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| D | intrinsics_x86.h | 72 X86Assembler* GetAssembler();
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| D | intrinsics_arm_vixl.h | 72 ArmVIXLAssembler* GetAssembler();
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| D | intrinsics_x86_64.h | 72 X86_64Assembler* GetAssembler();
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| D | intrinsics_mips.h | 77 MipsAssembler* GetAssembler();
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| D | intrinsics_mips64.h | 74 Mips64Assembler* GetAssembler();
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| D | intrinsics_utils.h | 51 Assembler* assembler = codegen->GetAssembler(); in EmitNativeCode()
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| D | code_generator_arm64.h | 276 Arm64Assembler* GetAssembler() const { return assembler_; } in GetAssembler() function
277 vixl::aarch64::MacroAssembler* GetVIXLAssembler() { return GetAssembler()->GetVIXLAssembler(); } in GetVIXLAssembler()
403 Arm64Assembler* GetAssembler() const;
405 return GetAssembler()->GetVIXLAssembler(); in GetVIXLAssembler()
452 Arm64Assembler* GetAssembler() override { return &assembler_; } in GetAssembler() function
453 const Arm64Assembler& GetAssembler() const override { return assembler_; } in GetAssembler() function
454 vixl::aarch64::MacroAssembler* GetVIXLAssembler() { return GetAssembler()->GetVIXLAssembler(); } in GetVIXLAssembler()
934 inline Arm64Assembler* ParallelMoveResolverARM64::GetAssembler() const { in GetAssembler() function
935 return codegen_->GetAssembler(); in GetAssembler()
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| D | code_generator_x86_64.h | 137 X86_64Assembler* GetAssembler() const;
205 X86_64Assembler* GetAssembler() const { return assembler_; } in GetAssembler() function
350 X86_64Assembler* GetAssembler() override { in GetAssembler() function
354 const X86_64Assembler& GetAssembler() const override { in GetAssembler() function
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| D | code_generator.cc | 340 start_offset_ = codegen_.GetAssembler().CodeSize(); in DisassemblyScope()
348 instruction_, start_offset_, codegen_.GetAssembler().CodeSize()); in ~DisassemblyScope()
366 code_start = GetAssembler()->CodeSize(); in GenerateSlowPaths()
372 disasm_info_->AddSlowPathInterval(slow_path, code_start, GetAssembler()->CodeSize()); in GenerateSlowPaths()
399 size_t frame_start = GetAssembler()->CodeSize(); in Compile()
401 DCHECK_EQ(GetAssembler()->cfi().GetCurrentCFAOffset(), static_cast<int>(frame_size_)); in Compile()
403 disasm_info_->SetFrameEntryInterval(frame_start, GetAssembler()->CodeSize()); in Compile()
446 size_t code_size = GetAssembler()->CodeSize(); in Finalize()
450 GetAssembler()->FinalizeInstructions(code); in Finalize()
1067 uint32_t native_pc = GetAssembler()->CodePosition(); in RecordPcInfo()
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| D | code_generator_mips.h | 150 MipsAssembler* GetAssembler() const;
225 MipsAssembler* GetAssembler() const { return assembler_; } in GetAssembler() function
400 MipsAssembler* GetAssembler() override { return &assembler_; } in GetAssembler() function
401 const MipsAssembler& GetAssembler() const override { return assembler_; } in GetAssembler() function
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| D | code_generator_mips64.h | 147 Mips64Assembler* GetAssembler() const;
222 Mips64Assembler* GetAssembler() const { return assembler_; } in GetAssembler() function
378 Mips64Assembler* GetAssembler() override { return &assembler_; } in GetAssembler() function
379 const Mips64Assembler& GetAssembler() const override { return assembler_; } in GetAssembler() function
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| D | code_generator_x86.h | 138 X86Assembler* GetAssembler() const;
203 X86Assembler* GetAssembler() const { return assembler_; } in GetAssembler() function
370 X86Assembler* GetAssembler() override { in GetAssembler() function
374 const X86Assembler& GetAssembler() const override { in GetAssembler() function
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| D | code_generator_arm_vixl.h | 252 ArmVIXLAssembler* GetAssembler() const;
320 ArmVIXLAssembler* GetAssembler() const { return assembler_; } in GetAssembler() function
321 ArmVIXLMacroAssembler* GetVIXLAssembler() { return GetAssembler()->GetVIXLAssembler(); } in GetVIXLAssembler()
457 ArmVIXLAssembler* GetAssembler() override { return &assembler_; } in GetAssembler() function
459 const ArmVIXLAssembler& GetAssembler() const override { return assembler_; } in GetAssembler() function
461 ArmVIXLMacroAssembler* GetVIXLAssembler() { return GetAssembler()->GetVIXLAssembler(); } in GetVIXLAssembler()
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| D | intrinsics_arm64.cc | 187 codegen->GetAssembler()->MaybeUnpoisonHeapReference(tmp_reg); in EmitNativeCode()
212 codegen->GetAssembler()->MaybePoisonHeapReference(tmp_reg); in EmitNativeCode()
894 codegen->GetAssembler()->PoisonHeapReference(temp.W()); in GenUnsafePut()
1013 Arm64Assembler* assembler = arm64_codegen->GetAssembler(); in EmitNativeCode()
1069 Arm64Assembler* assembler = codegen->GetAssembler(); in GenCas()
2568 codegen_->GetAssembler()->MaybeUnpoisonHeapReference(temp1); in VisitSystemArrayCopy()
2569 codegen_->GetAssembler()->MaybeUnpoisonHeapReference(temp2); in VisitSystemArrayCopy()
2578 codegen_->GetAssembler()->MaybeUnpoisonHeapReference(temp3); in VisitSystemArrayCopy()
2590 codegen_->GetAssembler()->MaybeUnpoisonHeapReference(temp3); in VisitSystemArrayCopy()
2603 codegen_->GetAssembler()->MaybeUnpoisonHeapReference(temp1); in VisitSystemArrayCopy()
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| D | emit_swap_mips_test.cc | 101 assembler_ = codegen_->GetAssembler(); in DriverWrapper()
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| D | graph_visualizer.cc | 194 codegen_.GetAssembler().CodeBufferBaseAddress(), in HGraphVisualizerPrinter()
195 codegen_.GetAssembler().CodeBufferBaseAddress() in HGraphVisualizerPrinter()
196 + codegen_.GetAssembler().CodeSize()) in HGraphVisualizerPrinter()
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| D | optimizing_compiler.cc | 763 ArrayRef<const uint8_t>(*codegen->GetAssembler()->cfi().data()), in Emit()
866 codegen->GetAssembler()->cfi().SetEnabled(compiler_options.GenerateAnyDebugInfo()); in TryCompile()
986 codegen->GetAssembler()->cfi().SetEnabled(compiler_options.GenerateAnyDebugInfo()); in TryCompileIntrinsic()
1440 info.cfi = ArrayRef<const uint8_t>(*codegen->GetAssembler()->cfi().data()); in JitCompile()
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| /art/compiler/utils/ |
| D | jni_macro_assembler_test.h | 38 Ass* GetAssembler() { in GetAssembler() function
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| /art/compiler/utils/mips/ |
| D | assembler_mips32r6_test.cc | 24 #define __ GetAssembler()->
52 GetAssembler()->FinalizeCode(); in DriverStr()
53 std::vector<uint8_t> data(GetAssembler()->CodeSize()); in DriverStr()
55 GetAssembler()->FinalizeInstructions(code); in DriverStr()
286 (Base::GetAssembler()->*f)(&label1, is_bare); in BranchHelper()
292 (Base::GetAssembler()->*f)(&label2, is_bare); in BranchHelper()
298 (Base::GetAssembler()->*f)(&label1, is_bare); in BranchHelper()
324 (Base::GetAssembler()->*f)(mips::A0, &label, is_bare); in BranchCondOneRegHelper()
334 (Base::GetAssembler()->*f)(mips::A1, &label, is_bare); in BranchCondOneRegHelper()
358 (Base::GetAssembler()->*f)(mips::A0, mips::A1, &label, is_bare); in BranchCondTwoRegsHelper()
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| D | assembler_mips32r5_test.cc | 24 #define __ GetAssembler()->
52 GetAssembler()->FinalizeCode(); in DriverStr()
53 std::vector<uint8_t> data(GetAssembler()->CodeSize()); in DriverStr()
55 GetAssembler()->FinalizeInstructions(code); in DriverStr()
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