Home
last modified time | relevance | path

Searched refs:root_reg (Results 1 – 7 of 7) sorted by relevance

/art/dex2oat/linker/arm/
Drelative_patcher_thumb2_test.cc288 static uint32_t EncodeBakerReadBarrierGcRootData(uint32_t root_reg, bool narrow) { in EncodeBakerReadBarrierGcRootData() argument
289 return arm::CodeGeneratorARMVIXL::EncodeBakerReadBarrierGcRootData(root_reg, narrow); in EncodeBakerReadBarrierGcRootData()
306 std::vector<uint8_t> CompileBakerGcRootThunk(uint32_t root_reg, bool narrow) { in CompileBakerGcRootThunk() argument
308 /* literal_offset */ 0u, EncodeBakerReadBarrierGcRootData(root_reg, narrow)); in CompileBakerGcRootThunk()
1158 for (uint32_t root_reg : kBakerValidRegs) { in TEST_F() local
1160 uint32_t ldr = kLdrWInsn | (/* offset */ 8) | (/* base_reg */ 0 << 16) | (root_reg << 12); in TEST_F()
1166 kLiteralOffset, EncodeBakerReadBarrierGcRootData(root_reg, /* narrow */ false)), in TEST_F()
1175 for (uint32_t root_reg : kBakerValidRegs) { in TEST_F() local
1178 uint32_t ldr = kLdrWInsn | (/* offset */ 8) | (/* base_reg */ 0 << 16) | (root_reg << 12); in TEST_F()
1183 std::vector<uint8_t> expected_thunk = CompileBakerGcRootThunk(root_reg, /* narrow */ false); in TEST_F()
[all …]
/art/compiler/optimizing/
Dcode_generator_arm_vixl.h811 static uint32_t EncodeBakerReadBarrierGcRootData(uint32_t root_reg, bool narrow) { in EncodeBakerReadBarrierGcRootData() argument
812 CheckValidReg(root_reg); in EncodeBakerReadBarrierGcRootData()
813 DCHECK(!narrow || root_reg < 8u) << root_reg; in EncodeBakerReadBarrierGcRootData()
817 BakerReadBarrierFirstRegField::Encode(root_reg) | in EncodeBakerReadBarrierGcRootData()
822 static uint32_t EncodeBakerReadBarrierUnsafeCasData(uint32_t root_reg) { in EncodeBakerReadBarrierUnsafeCasData() argument
823 CheckValidReg(root_reg); in EncodeBakerReadBarrierUnsafeCasData()
825 BakerReadBarrierFirstRegField::Encode(root_reg) | in EncodeBakerReadBarrierUnsafeCasData()
Dcode_generator_arm64.h829 static inline uint32_t EncodeBakerReadBarrierGcRootData(uint32_t root_reg) { in EncodeBakerReadBarrierGcRootData() argument
830 CheckValidReg(root_reg); in EncodeBakerReadBarrierGcRootData()
832 BakerReadBarrierFirstRegField::Encode(root_reg) | in EncodeBakerReadBarrierGcRootData()
Dcode_generator_arm_vixl.cc1999 const uint32_t root_reg = BakerReadBarrierFirstRegField::Decode(encoded_data); in Finalize() local
2000 CHECK_EQ(prev_insn & 0xfff0f000u, 0xf8d00000u | (root_reg << 12)); in Finalize()
2005 const uint32_t root_reg = BakerReadBarrierFirstRegField::Decode(encoded_data); in Finalize() local
2006 CHECK_EQ(prev_insn & 0xf807u, 0x6800u | root_reg); in Finalize()
2014 const uint32_t root_reg = BakerReadBarrierFirstRegField::Decode(encoded_data); in Finalize() local
2015 CHECK_EQ(prev_insn & 0xfff0fff0u, 0xeb000000u | (root_reg << 8)); in Finalize()
8331 vixl32::Register root_reg = RegisterFrom(root); in GenerateGcRootFieldLoad() local
8355 bool narrow = CanEmitNarrowLdr(root_reg, obj, offset); in GenerateGcRootFieldLoad()
8356 uint32_t custom_data = EncodeBakerReadBarrierGcRootData(root_reg.GetCode(), narrow); in GenerateGcRootFieldLoad()
8370 __ ldr(EncodingSize(narrow ? Narrow : Wide), root_reg, MemOperand(obj, offset)); in GenerateGcRootFieldLoad()
[all …]
Dcode_generator_mips64.cc5193 GpuRegister root_reg = root.AsRegister<GpuRegister>(); in GenerateGcRootFieldLoad() local
5219 const int thunk_disp = GetBakerMarkGcRootThunkDisplacement(root_reg); in GenerateGcRootFieldLoad()
5239 __ LoadFromOffset(kLoadUnsignedWord, root_reg, base, offset_low); // Single instruction in GenerateGcRootFieldLoad()
5260 __ LoadFromOffset(kLoadUnsignedWord, root_reg, obj, offset); in GenerateGcRootFieldLoad()
5293 __ Daddiu64(root_reg, obj, static_cast<int32_t>(offset)); in GenerateGcRootFieldLoad()
5303 __ LoadFromOffset(kLoadUnsignedWord, root_reg, obj, offset); in GenerateGcRootFieldLoad()
Dcode_generator_mips.cc7022 Register root_reg = root.AsRegister<Register>(); in GenerateGcRootFieldLoad() local
7049 const int thunk_disp = GetBakerMarkGcRootThunkDisplacement(root_reg); in GenerateGcRootFieldLoad()
7070 __ LoadFromOffset(kLoadWord, root_reg, base, offset_low); // Single instruction in GenerateGcRootFieldLoad()
7099 __ LoadFromOffset(kLoadWord, root_reg, obj, offset); in GenerateGcRootFieldLoad()
7136 __ Addiu32(root_reg, obj, offset); in GenerateGcRootFieldLoad()
7150 __ LoadFromOffset(kLoadWord, root_reg, obj, offset); in GenerateGcRootFieldLoad()
/art/dex2oat/linker/arm64/
Drelative_patcher_arm64_test.cc527 static uint32_t EncodeBakerReadBarrierGcRootData(uint32_t root_reg) { in EncodeBakerReadBarrierGcRootData() argument
528 return arm64::CodeGeneratorARM64::EncodeBakerReadBarrierGcRootData(root_reg); in EncodeBakerReadBarrierGcRootData()
543 std::vector<uint8_t> CompileBakerGcRootThunk(uint32_t root_reg) { in CompileBakerGcRootThunk() argument
545 /* literal_offset */ 0u, EncodeBakerReadBarrierGcRootData(root_reg)); in CompileBakerGcRootThunk()
1349 for (uint32_t root_reg : valid_regs) { in TEST_F() local
1351 uint32_t ldr = kLdrWInsn | (/* offset */ 8 << (10 - 2)) | (/* base_reg */ 0 << 5) | root_reg; in TEST_F()
1357 kLiteralOffset, EncodeBakerReadBarrierGcRootData(root_reg)), in TEST_F()
1366 for (uint32_t root_reg : valid_regs) { in TEST_F() local
1370 uint32_t ldr = kLdrWInsn | (/* offset */ 8 << (10 - 2)) | (/* base_reg */ 0 << 5) | root_reg; in TEST_F()
1375 std::vector<uint8_t> expected_thunk = CompileBakerGcRootThunk(root_reg); in TEST_F()
[all …]