/external/llvm/test/CodeGen/AMDGPU/ |
D | imm.ll | 130 ; CHECK: s_load_dword [[VAL:s[0-9]+]] 131 ; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 0, [[VAL]]{{$}} 140 ; CHECK: s_load_dword [[VAL:s[0-9]+]] 141 ; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 0.5, [[VAL]]{{$}} 150 ; CHECK: s_load_dword [[VAL:s[0-9]+]] 151 ; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -0.5, [[VAL]]{{$}} 160 ; CHECK: s_load_dword [[VAL:s[0-9]+]] 161 ; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 1.0, [[VAL]]{{$}} 170 ; CHECK: s_load_dword [[VAL:s[0-9]+]] 171 ; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -1.0, [[VAL]]{{$}} [all …]
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D | amdgpu.work-item-intrinsics.deprecated.ll | 8 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0xb 9 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x2c 10 ; GCN-NOHSA: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]] 13 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 14 ; EG: MOV {{\*? *}}[[VAL]], KC0[2].Z 23 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x0 24 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x0 25 ; GCN-NOHSA: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]] 28 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 29 ; EG: MOV {{\*? *}}[[VAL]], KC0[0].X [all …]
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D | llvm.r600.read.local.size.ll | 7 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 8 ; EG: MOV * [[VAL]], KC0[1].Z 10 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x6 11 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x18 15 ; GCN: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]] 25 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 26 ; EG: MOV * [[VAL]], KC0[1].W 28 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x7 29 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x1c 30 ; GCN: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]] [all …]
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D | image-resource-id.ll | 6 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 7 ; EG: MOV [[VAL]], literal.x 20 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 21 ; EG: MOV [[VAL]], literal.x 36 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 37 ; EG: MOV [[VAL]], literal.x 50 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 51 ; EG: MOV [[VAL]], literal.x 66 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 67 ; EG: MOV [[VAL]], literal.x [all …]
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D | image-attributes.ll | 8 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 9 ; EG: MOV * [[VAL]], KC0[2].Z 21 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 22 ; EG: MOV * [[VAL]], KC0[2].Z 38 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 39 ; EG: MOV * [[VAL]], KC0[2].W 51 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 52 ; EG: MOV * [[VAL]], KC0[2].W 68 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 69 ; EG: MOV * [[VAL]], KC0[3].X [all …]
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D | shift-i64-opts.ll | 7 ; GCN-DAG: buffer_load_dword [[VAL:v[0-9]+]] 8 ; GCN-DAG: v_lshrrev_b32_e32 v[[LO:[0-9]+]], 3, [[VAL]] 19 ; GCN-DAG: buffer_load_dword [[VAL:v[0-9]+]] 20 ; GCN-DAG: v_lshrrev_b32_e32 v[[LO:[0-9]+]], 31, [[VAL]] 31 ; GCN-DAG: buffer_load_dword [[VAL:v[0-9]+]] 32 ; GCN-DAG: v_lshrrev_b32_e32 v[[LO:[0-9]+]], 1, [[VAL]] 72 ; GCN: buffer_load_dword [[VAL:v[0-9]+]] 73 ; GCN: v_lshlrev_b32_e32 v[[HI:[0-9]+]], 3, [[VAL]] 95 ; GCN: buffer_load_dword [[VAL:v[0-9]+]] 96 ; GCN: v_lshlrev_b32_e32 v[[HI:[0-9]+]], 31, [[VAL]] [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | amdgpu.work-item-intrinsics.deprecated.ll | 8 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x0 9 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x0 10 ; GCN-NOHSA: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]] 13 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 14 ; EG: MOV {{\*? *}}[[VAL]], KC0[0].X 23 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x1 24 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x4 25 ; GCN-NOHSA: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]] 28 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 29 ; EG: MOV {{\*? *}}[[VAL]], KC0[0].Y [all …]
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D | immv216.ll | 119 ; GFX9: s_load_dword [[VAL:s[0-9]+]] 120 ; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 0{{$}} 124 ; VI-DAG: s_load_dword [[VAL:s[0-9]+]] 126 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VAL]], 16 130 ; VI-DAG: v_add_f16_e64 v{{[0-9]+}}, [[VAL]], 0 140 ; GFX9: s_load_dword [[VAL:s[0-9]+]] 141 ; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 0.5 op_sel_hi:[1,0]{{$}} 145 ; VI-DAG: s_load_dword [[VAL:s[0-9]+]] 147 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VAL]], 16 151 ; VI-DAG: v_add_f16_e64 v{{[0-9]+}}, [[VAL]], 0.5 [all …]
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D | imm.ll | 148 ; GCN: s_load_dword [[VAL:s[0-9]+]] 149 ; GCN: v_add_f32_e64 [[REG:v[0-9]+]], [[VAL]], 0{{$}} 158 ; GCN: s_load_dword [[VAL:s[0-9]+]] 159 ; GCN: v_add_f32_e64 [[REG:v[0-9]+]], [[VAL]], 0.5{{$}} 168 ; GCN: s_load_dword [[VAL:s[0-9]+]] 169 ; GCN: v_add_f32_e64 [[REG:v[0-9]+]], [[VAL]], -0.5{{$}} 178 ; GCN: s_load_dword [[VAL:s[0-9]+]] 179 ; GCN: v_add_f32_e64 [[REG:v[0-9]+]], [[VAL]], 1.0{{$}} 188 ; GCN: s_load_dword [[VAL:s[0-9]+]] 189 ; GCN: v_add_f32_e64 [[REG:v[0-9]+]], [[VAL]], -1.0{{$}} [all …]
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D | llvm.r600.read.local.size.ll | 7 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 8 ; EG: MOV * [[VAL]], KC0[1].Z 10 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x6 11 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x18 15 ; GCN: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]] 25 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 26 ; EG: MOV * [[VAL]], KC0[1].W 28 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x7 29 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x1c 30 ; GCN: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[VAL]] [all …]
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D | widen-smrd-loads.ll | 5 ; GCN: s_load_dword [[VAL:s[0-9]+]] 6 ; GCN: s_addk_i32 [[VAL]], 0x3e7 7 ; GCN: s_or_b32 [[OR:s[0-9]+]], [[VAL]], 4 17 ; GCN: s_load_dword [[VAL:s[0-9]+]] 18 ; GCN: s_and_b32 [[TRUNC:s[0-9]+]], [[VAL]], 0xffff{{$}} 31 ; GCN: s_load_dword [[VAL:s[0-9]+]] 32 ; GCN: s_sext_i32_i16 [[EXT:s[0-9]+]], [[VAL]] 45 ; GCN: s_load_dword [[VAL:s[0-9]+]] 46 ; GCN: s_add_i32 [[ADD:s[0-9]+]], [[VAL]], 34 58 ; GCN: s_load_dword [[VAL:s[0-9]+]] [all …]
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D | image-resource-id.ll | 6 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 7 ; EG: MOV [[VAL]], literal.x 20 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 21 ; EG: MOV [[VAL]], literal.x 36 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 37 ; EG: MOV [[VAL]], literal.x 50 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 51 ; EG: MOV [[VAL]], literal.x 66 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 67 ; EG: MOV [[VAL]], literal.x [all …]
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D | imm16.ll | 127 ; VI: s_load_dword [[VAL:s[0-9]+]] 128 ; VI: v_add_f16_e64 [[REG:v[0-9]+]], [[VAL]], 0{{$}} 137 ; VI: s_load_dword [[VAL:s[0-9]+]] 138 ; VI: v_add_f16_e64 [[REG:v[0-9]+]], [[VAL]], 0.5{{$}} 147 ; VI: s_load_dword [[VAL:s[0-9]+]] 148 ; VI: v_add_f16_e64 [[REG:v[0-9]+]], [[VAL]], -0.5{{$}} 157 ; VI: s_load_dword [[VAL:s[0-9]+]] 158 ; VI: v_add_f16_e64 [[REG:v[0-9]+]], [[VAL]], 1.0{{$}} 167 ; VI: s_load_dword [[VAL:s[0-9]+]] 168 ; VI: v_add_f16_e64 [[REG:v[0-9]+]], [[VAL]], -1.0{{$}} [all …]
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D | image-attributes.ll | 8 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 9 ; EG: MOV * [[VAL]], KC0[2].Z 21 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 22 ; EG: MOV * [[VAL]], KC0[2].Z 38 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 39 ; EG: MOV * [[VAL]], KC0[2].W 51 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 52 ; EG: MOV * [[VAL]], KC0[2].W 68 ; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] 69 ; EG: MOV * [[VAL]], KC0[3].X [all …]
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/external/deqp/data/gles2/shaders/ |
D | preprocessor.test | 155 #define VAL 2.0 156 #undef VAL sdflkjfds 157 #define VAL 1.0 161 ${POSITION_FRAG_COLOR} = vec4(VAL); 2905 #define VAL 4 2907 #if (VAL << 2) == 16 2922 #define VAL 5 2924 #if (VAL >> 1) == 2 2939 #define VAL 5 2941 #if (VAL < 6) && (-VAL < -4) [all …]
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/external/deqp/external/openglcts/data/gl33/ |
D | preprocessor.test | 221 #define VAL 2.0 222 #undef VAL sdflkjfds 223 #define VAL 1.0 228 ${POSITION_FRAG_COLOR} = vec4(VAL); 3062 #define VAL 4 3064 #if (VAL << 2) == 16 3081 #define VAL 5 3083 #if (VAL >> 1) == 2 3100 #define VAL 5 3102 #if (VAL < 6) && (-VAL < -4) [all …]
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/external/strace/tests-m32/ |
D | futex.c | 154 # define VAL ((unsigned long) 0xbadda7a0facefeedLLU) macro 155 # define VAL_PR ((unsigned) VAL) 199 CHECK_FUTEX(NULL, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3, in main() 206 CHECK_FUTEX(uaddr + 1, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3, in main() 213 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout + 1, uaddr2, VAL3, in main() 222 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3, in main() 231 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3, in main() 241 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2 + 1, VAL3, in main() 248 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_PRIVATE_FLAG | FUTEX_WAIT, VAL, tmout, in main() 260 VAL, tmout, uaddr2, VAL3, (rc == -1) && (errno == EAGAIN)); in main() [all …]
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/external/strace/tests-mx32/ |
D | futex.c | 154 # define VAL ((unsigned long) 0xbadda7a0facefeedLLU) macro 155 # define VAL_PR ((unsigned) VAL) 199 CHECK_FUTEX(NULL, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3, in main() 206 CHECK_FUTEX(uaddr + 1, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3, in main() 213 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout + 1, uaddr2, VAL3, in main() 222 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3, in main() 231 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3, in main() 241 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2 + 1, VAL3, in main() 248 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_PRIVATE_FLAG | FUTEX_WAIT, VAL, tmout, in main() 260 VAL, tmout, uaddr2, VAL3, (rc == -1) && (errno == EAGAIN)); in main() [all …]
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/external/strace/tests/ |
D | futex.c | 154 # define VAL ((unsigned long) 0xbadda7a0facefeedLLU) macro 155 # define VAL_PR ((unsigned) VAL) 199 CHECK_FUTEX(NULL, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3, in main() 206 CHECK_FUTEX(uaddr + 1, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3, in main() 213 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout + 1, uaddr2, VAL3, in main() 222 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3, in main() 231 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3, in main() 241 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2 + 1, VAL3, in main() 248 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_PRIVATE_FLAG | FUTEX_WAIT, VAL, tmout, in main() 260 VAL, tmout, uaddr2, VAL3, (rc == -1) && (errno == EAGAIN)); in main() [all …]
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/external/deqp/external/openglcts/data/gles3/ |
D | preprocessor.test | 166 #define VAL 2.0 167 #undef VAL sdflkjfds 168 #define VAL 1.0 173 ${POSITION_FRAG_COLOR} = vec4(VAL); 3301 #define VAL 4 3303 #if (VAL << 2) == 16 3320 #define VAL 5 3322 #if (VAL >> 1) == 2 3339 #define VAL 5 3341 #if (VAL < 6) && (-VAL < -4) [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ADT/ |
D | APInt.h | 93 uint64_t VAL; ///< Used to store the <= 64 bits integer value. member 154 U.VAL &= mask; in clearUnusedBits() 163 return isSingleWord() ? U.VAL : U.pVal[whichWord(bitPosition)]; in getWord() 281 U.VAL = val; in BitWidth() 323 U.VAL = that.U.VAL; in APInt() 345 explicit APInt() : BitWidth(1) { U.VAL = 0; } in APInt() 397 return U.VAL == WORD_MAX >> (APINT_BITS_PER_WORD - BitWidth); in isAllOnesValue() 412 return U.VAL == 1; in isOneValue() 428 return U.VAL == ((WordType(1) << (BitWidth - 1)) - 1); in isMaxSignedValue() 444 return U.VAL == (WordType(1) << (BitWidth - 1)); in isMinSignedValue() [all …]
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/external/deqp/data/gles3/shaders/ |
D | preprocessor.test | 183 #define VAL 2.0 184 #undef VAL sdflkjfds 185 #define VAL 1.0 190 ${POSITION_FRAG_COLOR} = vec4(VAL); 3622 #define VAL 4 3624 #if (VAL << 2) == 16 3641 #define VAL 5 3643 #if (VAL >> 1) == 2 3660 #define VAL 5 3662 #if (VAL < 6) && (-VAL < -4) [all …]
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/external/llvm/include/llvm/ADT/ |
D | APInt.h | 79 uint64_t VAL; ///< Used to store the <= 64 bits integer value. member 148 VAL &= mask; in clearUnusedBits() 157 return isSingleWord() ? VAL : pVal[whichWord(bitPosition)]; in getWord() 237 : BitWidth(numBits), VAL(0) { in BitWidth() 240 VAL = val; in BitWidth() 279 APInt(const APInt &that) : BitWidth(that.BitWidth), VAL(0) { in APInt() 281 VAL = that.VAL; in APInt() 287 APInt(APInt &&that) : BitWidth(that.BitWidth), VAL(that.VAL) { in APInt() 302 explicit APInt() : BitWidth(1), VAL(0) {} in APInt() 340 return VAL == ~integerPart(0) >> (APINT_BITS_PER_WORD - BitWidth); in isAllOnesValue() [all …]
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/external/swiftshader/third_party/llvm-subzero/include/llvm/ADT/ |
D | APInt.h | 83 uint64_t VAL; ///< Used to store the <= 64 bits integer value. member 152 VAL &= mask; in clearUnusedBits() 161 return isSingleWord() ? VAL : pVal[whichWord(bitPosition)]; in getWord() 241 : BitWidth(numBits), VAL(0) { in BitWidth() 244 VAL = val; in BitWidth() 283 APInt(const APInt &that) : BitWidth(that.BitWidth), VAL(0) { in APInt() 285 VAL = that.VAL; in APInt() 291 APInt(APInt &&that) : BitWidth(that.BitWidth), VAL(that.VAL) { in APInt() 306 explicit APInt() : BitWidth(1), VAL(0) {} in APInt() 344 return VAL == ~integerPart(0) >> (APINT_BITS_PER_WORD - BitWidth); in isAllOnesValue() [all …]
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/external/swiftshader/third_party/LLVM/include/llvm/ADT/ |
D | APInt.h | 79 uint64_t VAL; ///< Used to store the <= 64 bits integer value. member 142 VAL &= mask; in clearUnusedBits() 151 return isSingleWord() ? VAL : pVal[whichWord(bitPosition)]; in getWord() 228 : BitWidth(numBits), VAL(0) { in BitWidth() 231 VAL = val; in BitWidth() 267 : BitWidth(that.BitWidth), VAL(0) { in APInt() 270 VAL = that.VAL; in APInt() 330 return BitWidth == 1 ? VAL == 0 : in isMaxSignedValue() 345 return BitWidth == 1 ? VAL == 1 : isNegative() && isPowerOf2(); in isMinSignedValue() 355 return isUIntN(N, VAL); in isIntN() [all …]
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