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Searched refs:AArch64DAGToDAGISel (Results 1 – 2 of 2) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp37 class AArch64DAGToDAGISel : public SelectionDAGISel { class
46 explicit AArch64DAGToDAGISel(AArch64TargetMachine &tm, in AArch64DAGToDAGISel() function in __anon98b90a290111::AArch64DAGToDAGISel
235 bool AArch64DAGToDAGISel::SelectInlineAsmMemoryOperand( in SelectInlineAsmMemoryOperand()
262 bool AArch64DAGToDAGISel::SelectArithImmed(SDValue N, SDValue &Val, in SelectArithImmed()
292 bool AArch64DAGToDAGISel::SelectNegArithImmed(SDValue N, SDValue &Val, in SelectNegArithImmed()
365 bool AArch64DAGToDAGISel::isWorthFolding(SDValue V) const { in isWorthFolding()
393 bool AArch64DAGToDAGISel::SelectShiftedRegister(SDValue N, bool AllowROR, in SelectShiftedRegister()
507 bool AArch64DAGToDAGISel::tryMLAV64LaneV128(SDNode *N) { in tryMLAV64LaneV128()
552 bool AArch64DAGToDAGISel::tryMULLV64LaneV128(unsigned IntNo, SDNode *N) { in tryMULLV64LaneV128()
615 bool AArch64DAGToDAGISel::SelectArithExtendedRegister(SDValue N, SDValue &Reg, in SelectArithExtendedRegister()
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/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp36 class AArch64DAGToDAGISel : public SelectionDAGISel { class
45 explicit AArch64DAGToDAGISel(AArch64TargetMachine &tm, in AArch64DAGToDAGISel() function in __anonec6fe5f10111::AArch64DAGToDAGISel
233 bool AArch64DAGToDAGISel::SelectInlineAsmMemoryOperand( in SelectInlineAsmMemoryOperand()
253 bool AArch64DAGToDAGISel::SelectArithImmed(SDValue N, SDValue &Val, in SelectArithImmed()
283 bool AArch64DAGToDAGISel::SelectNegArithImmed(SDValue N, SDValue &Val, in SelectNegArithImmed()
332 bool AArch64DAGToDAGISel::isWorthFolding(SDValue V) const { in isWorthFolding()
343 bool AArch64DAGToDAGISel::SelectShiftedRegister(SDValue N, bool AllowROR, in SelectShiftedRegister()
457 bool AArch64DAGToDAGISel::tryMLAV64LaneV128(SDNode *N) { in tryMLAV64LaneV128()
502 bool AArch64DAGToDAGISel::tryMULLV64LaneV128(unsigned IntNo, SDNode *N) { in tryMULLV64LaneV128()
565 bool AArch64DAGToDAGISel::SelectArithExtendedRegister(SDValue N, SDValue &Reg, in SelectArithExtendedRegister()
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