/external/e2fsprogs/lib/ext2fs/ |
D | bitops.c | 37 unsigned char *ADDR = (unsigned char *) addr; in ext2fs_set_bit() local 39 ADDR += nr >> 3; in ext2fs_set_bit() 41 retval = mask & *ADDR; in ext2fs_set_bit() 42 *ADDR |= mask; in ext2fs_set_bit() 49 unsigned char *ADDR = (unsigned char *) addr; in ext2fs_clear_bit() local 51 ADDR += nr >> 3; in ext2fs_clear_bit() 53 retval = mask & *ADDR; in ext2fs_clear_bit() 54 *ADDR &= ~mask; in ext2fs_clear_bit() 61 const unsigned char *ADDR = (const unsigned char *) addr; in ext2fs_test_bit() local 63 ADDR += nr >> 3; in ext2fs_test_bit() [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | atomic-ops-lse.ll | 22 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8 24 ; CHECK: ldaddalb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]] 35 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16 37 ; CHECK: ldaddalh w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]] 48 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32 50 ; CHECK: ldaddal w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]] 61 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64 63 ; CHECK: ldaddal x[[OLD:[0-9]+]], x[[NEW:[0-9]+]], [x[[ADDR]]] 74 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32 76 ; CHECK: ldaddal w0, w[[NEW:[0-9]+]], [x[[ADDR]]] [all …]
|
D | atomic-ops.ll | 20 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8 23 ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]] 27 ; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 40 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16 43 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] 47 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 60 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32 63 ; ; CHECK: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]] 67 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 80 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64 [all …]
|
D | arm64-atomic.ll | 5 ; CHECK-NEXT: mov x[[ADDR:[0-9]+]], x0 7 ; CHECK-NEXT: ldaxr [[RESULT:w[0-9]+]], [x[[ADDR]]] 10 ; CHECK-NEXT: stxr [[SCRATCH_REG:w[0-9]+]], w2, [x[[ADDR]]] 44 ; CHECK-NEXT: mov x[[ADDR:[0-9]+]], x0 46 ; CHECK-NEXT: ldaxr [[RESULT:w[0-9]+]], [x[[ADDR]]] 49 ; CHECK-NEXT: stlxr [[SCRATCH_REG:w[0-9]+]], w2, [x[[ADDR]]] 62 ; CHECK-NEXT: mov x[[ADDR:[0-9]+]], x0 64 ; CHECK-NEXT: ldxr [[RESULT:x[0-9]+]], [x[[ADDR]]] 67 ; CHECK-NEXT: stxr [[SCRATCH_REG:w[0-9]+]], x2, [x[[ADDR]]] 94 ; CHECK: mov x[[ADDR:[0-9]+]], x0 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | atomic-ops-v8.ll | 16 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8 17 ; CHECK: movt r[[ADDR]], :upper16:var8 20 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]] 24 ; CHECK-NEXT: stlexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]] 39 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16 40 ; CHECK: movt r[[ADDR]], :upper16:var16 43 ; CHECK: ldaexh r[[OLD:[0-9]+]], [r[[ADDR]]] 47 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]] 62 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32 63 ; CHECK: movt r[[ADDR]], :upper16:var32 [all …]
|
D | ldstrex.ll | 120 ; CHECK-T2ADDRMODE: add.w r[[ADDR:[0-9]+]], {{r[0-9]+}}, #1024 121 ; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [r[[ADDR]]] 122 ; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]] 130 ; CHECK-T2ADDRMODE: adds r[[ADDR:[0-9]+]], #1 131 ; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [r[[ADDR]]] 132 ; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]] 138 ; CHECK-T2ADDRMODE: mov r[[ADDR:[0-9]+]], sp 139 ; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [r[[ADDR]]] 140 ; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]] 175 ; CHECK-T2ADDRMODE: add.w r[[ADDR:[0-9]+]], r[[TMP]], #1024 [all …]
|
/external/llvm/test/CodeGen/ARM/ |
D | atomic-ops-v8.ll | 16 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8 17 ; CHECK: movt r[[ADDR]], :upper16:var8 20 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]] 24 ; CHECK-NEXT: stlexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]] 39 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16 40 ; CHECK: movt r[[ADDR]], :upper16:var16 43 ; CHECK: ldaexh r[[OLD:[0-9]+]], [r[[ADDR]]] 47 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]] 62 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32 63 ; CHECK: movt r[[ADDR]], :upper16:var32 [all …]
|
/external/llvm/test/CodeGen/AArch64/ |
D | atomic-ops.ll | 20 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var8 23 ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]] 27 ; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 40 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16 43 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] 47 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 60 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32 63 ; ; CHECK: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]] 67 ; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 80 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var64 [all …]
|
D | arm64-atomic.ll | 5 ; CHECK-NEXT: mov x[[ADDR:[0-9]+]], x0 7 ; CHECK-NEXT: ldaxr [[RESULT:w[0-9]+]], [x[[ADDR]]] 10 ; CHECK-NEXT: stxr [[SCRATCH_REG:w[0-9]+]], w2, [x[[ADDR]]] 42 ; CHECK-NEXT: mov x[[ADDR:[0-9]+]], x0 44 ; CHECK-NEXT: ldaxr [[RESULT:w[0-9]+]], [x[[ADDR]] 47 ; CHECK-NEXT: stlxr [[SCRATCH_REG:w[0-9]+]], w2, [x[[ADDR]] 60 ; CHECK-NEXT: mov x[[ADDR:[0-9]+]], x0 62 ; CHECK-NEXT: ldxr [[RESULT:x[0-9]+]], [x[[ADDR]]] 65 ; CHECK-NEXT: stxr [[SCRATCH_REG:w[0-9]+]], x2, [x[[ADDR]]] 92 ; CHECK: mov x[[ADDR:[0-9]+]], x0 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/Instrumentation/MemorySanitizer/ |
D | csr.ll | 2 ; RUN: opt < %s -msan -msan-check-access-address=1 -S | FileCheck %s --check-prefix=ADDR 23 ; ADDR-LABEL: @getcsr( 24 ; ADDR: %[[A:.*]] = load i64, i64* getelementptr inbounds {{.*}} @__msan_param_tls, i32 0, i32 0), … 25 ; ADDR: %[[B:.*]] = icmp ne i64 %[[A]], 0 26 ; ADDR: br i1 %[[B]], label {{.*}}, label 27 ; ADDR: call void @__msan_warning_noreturn() 28 ; ADDR: call void @llvm.x86.sse.stmxcsr( 29 ; ADDR: ret void 47 ; ADDR-LABEL: @setcsr( 48 ; ADDR: %[[A:.*]] = load i64, i64* getelementptr inbounds {{.*}} @__msan_param_tls, i32 0, i32 0), … [all …]
|
D | masked-store-load.ll | 3 ; RUN: opt < %s -msan -msan-check-access-address=1 -S | FileCheck %s --check-prefix=ADDR 45 ; ADDR-LABEL: @Store( 46 ; ADDR: %[[MASKSHADOW:.*]] = load <4 x i1>, {{.*}}@__msan_param_tls to i64), i64 40) 47 ; ADDR: %[[ADDRSHADOW:.*]] = load i64, {{.*}}[100 x i64]* @__msan_param_tls, i32 0, i32 0) 49 ; ADDR: %[[ADDRBAD:.*]] = icmp ne i64 %[[ADDRSHADOW]], 0 50 ; ADDR: br i1 %[[ADDRBAD]], label {{.*}}, label {{.*}} 51 ; ADDR: call void @__msan_warning_noreturn() 53 ; ADDR: %[[MASKSHADOWFLAT:.*]] = bitcast <4 x i1> %[[MASKSHADOW]] to i4 54 ; ADDR: %[[MASKBAD:.*]] = icmp ne i4 %[[MASKSHADOWFLAT]], 0 55 ; ADDR: br i1 %[[MASKBAD]], label {{.*}}, label {{.*}} [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-symbolizer/pdb/ |
D | pdb.test | 1 RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ 4 RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ 11 RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ 16 ADDR: 0x401380 17 ADDR: 0x401390 18 ADDR: 0x4013A0 19 ADDR: 0x4013C0 20 ADDR: 0x4013D0 21 ADDR: 0x4013E0 22 ADDR: 0x4013F0 [all …]
|
/external/llvm/test/tools/llvm-symbolizer/pdb/ |
D | pdb.test | 1 RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ 4 RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ 11 RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ 16 ADDR: 0x401380 17 ADDR: 0x401390 18 ADDR: 0x4013A0 19 ADDR: 0x4013C0 20 ADDR: 0x4013D0 21 ADDR: 0x4013E0 22 ADDR: 0x4013F0 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/GlobalISel/ |
D | arm-isel-globals-static.ll | 9 ; ELF-MOVT: movw r[[ADDR:[0-9]+]], :lower16:internal_global 10 ; ELF-MOVT-NEXT: movt r[[ADDR]], :upper16:internal_global 11 ; ELF-NOMOVT: ldr r[[ADDR:[0-9]+]], [[LABEL:.L[[:alnum:]_]+]] 12 ; DARWIN-MOVT: movw r[[ADDR:[0-9]+]], :lower16:_internal_global 13 ; DARWIN-MOVT-NEXT: movt r[[ADDR]], :upper16:_internal_global 14 ; DARWIN-NOMOVT: ldr r[[ADDR:[0-9]+]], [[LABEL:L[[:alnum:]_]+]] 15 ; CHECK-NEXT: ldr r0, [r[[ADDR]]] 30 ; ELF-MOVT: movw r[[ADDR:[0-9]+]], :lower16:external_global 31 ; ELF-MOVT-NEXT: movt r[[ADDR]], :upper16:external_global 32 ; ELF-NOMOVT: ldr r[[ADDR:[0-9]+]], [[CONST_POOL:.L[[:alnum:]_]+]] [all …]
|
D | arm-isel-globals-ropi-rwpi.ll | 11 ; RW-DEFAULT-MOVT: movw r[[ADDR:[0-9]+]], :lower16:internal_global 12 ; RW-DEFAULT-MOVT-NEXT: movt r[[ADDR]], :upper16:internal_global 13 ; RW-DEFAULT-NOMOVT: ldr r[[ADDR:[0-9]+]], [[LABEL:.L[[:alnum:]_]+]] 14 ; RW-DEFAULT-NEXT: ldr r0, [r[[ADDR]]] 22 ; RWPI-NEXT: add r[[ADDR:[0-9]+]], r9, [[OFFSET]] 23 ; RWPI-NEXT: ldr r0, [r[[ADDR]]] 35 ; RW-DEFAULT-MOVT: movw r[[ADDR:[0-9]+]], :lower16:external_global 36 ; RW-DEFAULT-MOVT-NEXT: movt r[[ADDR]], :upper16:external_global 37 ; RW-DEFAULT-NOMOVT: ldr r[[ADDR:[0-9]+]], [[LABEL:.L[[:alnum:]_]+]] 38 ; RW-DEFAULT-NEXT: ldr r0, [r[[ADDR]]] [all …]
|
D | arm-isel-globals-pic.ll | 15 ; CHECK-NEXT: add r[[ADDR:[0-9]+]], pc, [[OFFSET]] 16 ; CHECK-NEXT: ldr r0, [r[[ADDR]]] 34 ; ELF-NEXT: ldr r[[ADDR:[0-9]+]], [pc, [[OFFSET]]] 39 ; DARWIN: ldr r[[ADDR:[0-9]+]], [pc, [[OFFSET]]] 40 ; CHECK-NEXT: ldr r0, [r[[ADDR]]] 62 ; CHECK-NEXT: add r[[ADDR:[0-9]+]], pc, [[OFFSET]] 63 ; CHECK-NEXT: ldr r0, [r[[ADDR]]] 81 ; ELF-NEXT: ldr r[[ADDR:[0-9]+]], [pc, [[OFFSET]]] 86 ; DARWIN: ldr r[[ADDR:[0-9]+]], [pc, [[OFFSET]]] 87 ; CHECK-NEXT: ldr r0, [r[[ADDR]]]
|
/external/u-boot/arch/microblaze/include/asm/ |
D | bitops.h | 86 unsigned long *ADDR = (unsigned long *) addr; in change_bit() local 88 ADDR += nr >> 5; in change_bit() 91 *ADDR ^= mask; in change_bit() 98 unsigned long *ADDR = (unsigned long *) addr; in __change_bit() local 100 ADDR += nr >> 5; in __change_bit() 102 *ADDR ^= mask; in __change_bit() 265 volatile unsigned char *ADDR = (unsigned char *) addr; in ext2_set_bit() local 267 ADDR += nr >> 3; in ext2_set_bit() 270 retval = (mask & *ADDR) != 0; in ext2_set_bit() 271 *ADDR |= mask; in ext2_set_bit() [all …]
|
/external/u-boot/arch/x86/include/asm/ |
D | bitops.h | 27 #define ADDR (*(volatile long *) addr) macro 43 :"=m" (ADDR) in set_bit() 60 :"=m" (ADDR) in __set_bit() 80 :"=m" (ADDR) in clear_bit() 99 :"=m" (ADDR) in __change_bit() 116 :"=m" (ADDR) in change_bit() 134 :"=r" (oldbit),"=m" (ADDR) in test_and_set_bit() 154 :"=r" (oldbit),"=m" (ADDR) in __test_and_set_bit() 173 :"=r" (oldbit),"=m" (ADDR) in test_and_clear_bit() 193 :"=r" (oldbit),"=m" (ADDR) in __test_and_clear_bit() [all …]
|
/external/llvm/test/CodeGen/SystemZ/ |
D | alloca-02.ll | 13 ; CHECK-A: lgr %r15, [[ADDR:%r[1-5]]] 14 ; CHECK-A: la %r2, 160([[ADDR]]) 18 ; CHECK-B: lgr %r15, [[ADDR:%r[1-5]]] 19 ; CHECK-B: la %r2, 160([[ADDR]]) 23 ; CHECK-C: lgr %r15, [[ADDR:%r[1-5]]] 24 ; CHECK-C-DAG: la %r2, 160([[ADDR]]) 29 ; CHECK-D: lgr %r15, [[ADDR:%r[1-5]]] 30 ; CHECK-D-DAG: la %r2, 160([[ADDR]]) 35 ; CHECK-E: lgr %r15, [[ADDR:%r[1-5]]] 36 ; CHECK-E-DAG: la %r2, 160([[ADDR]])
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
D | alloca-02.ll | 13 ; CHECK-A-DAG: lgr %r15, [[ADDR:%r[1-5]]] 14 ; CHECK-A-DAG: la %r2, 160([[ADDR]]) 18 ; CHECK-B-DAG: lgr %r15, [[ADDR:%r[1-5]]] 19 ; CHECK-B-DAG: la %r2, 160([[ADDR]]) 23 ; CHECK-C-DAG: lgr %r15, [[ADDR:%r[1-5]]] 24 ; CHECK-C-DAG: la %r2, 160([[ADDR]]) 29 ; CHECK-D-DAG: lgr %r15, [[ADDR:%r[1-5]]] 30 ; CHECK-D-DAG: la %r2, 160([[ADDR]]) 35 ; CHECK-E-DAG: lgr %r15, [[ADDR:%r[1-5]]] 36 ; CHECK-E-DAG: la %r2, 160([[ADDR]])
|
/external/u-boot/arch/powerpc/include/asm/ |
D | bitops.h | 288 unsigned char *ADDR = (unsigned char *) addr; in ext2_set_bit() local 291 ADDR += nr >> 3; in ext2_set_bit() 293 oldbit = (*ADDR & mask) ? 1 : 0; in ext2_set_bit() 294 *ADDR |= mask; in ext2_set_bit() 301 unsigned char *ADDR = (unsigned char *) addr; in ext2_clear_bit() local 304 ADDR += nr >> 3; in ext2_clear_bit() 306 oldbit = (*ADDR & mask) ? 1 : 0; in ext2_clear_bit() 307 *ADDR = *ADDR & ~mask; in ext2_clear_bit() 314 __const__ unsigned char *ADDR = (__const__ unsigned char *) addr; in ext2_test_bit() local 316 return (ADDR[nr >> 3] >> (nr & 7)) & 1; in ext2_test_bit()
|
/external/llvm/test/tools/llvm-symbolizer/ |
D | coff-exports.test | 1 RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ 8 ADDR: 0x500A 9 ADDR: 0x5038 10 ADDR: 0x504B
|
D | coff-dwarf.test | 1 RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ 8 ADDR: 0x5009 9 ADDR: 0x5038
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-symbolizer/ |
D | coff-exports.test | 1 RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ 10 ADDR: 0x500A 11 ADDR: 0x5038 12 ADDR: 0x504B
|
D | coff-dwarf.test | 1 RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ 8 ADDR: 0x5009 9 ADDR: 0x5038
|