Home
last modified time | relevance | path

Searched refs:AddDReg (Results 1 – 7 of 7) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMBaseInstrInfo.cpp690 MachineInstrBuilder &AddDReg(MachineInstrBuilder &MIB, in AddDReg() function
770 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
771 MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI); in storeRegToStackSlot()
772 MIB = AddDReg(MIB, SrcReg, ARM::dsub_2, 0, TRI); in storeRegToStackSlot()
773 AddDReg(MIB, SrcReg, ARM::dsub_3, 0, TRI); in storeRegToStackSlot()
784 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
785 MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI); in storeRegToStackSlot()
786 MIB = AddDReg(MIB, SrcReg, ARM::dsub_2, 0, TRI); in storeRegToStackSlot()
787 MIB = AddDReg(MIB, SrcReg, ARM::dsub_3, 0, TRI); in storeRegToStackSlot()
788 MIB = AddDReg(MIB, SrcReg, ARM::dsub_4, 0, TRI); in storeRegToStackSlot()
[all …]
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.cpp852 ARMBaseInstrInfo::AddDReg(MachineInstrBuilder &MIB, unsigned Reg, in AddDReg() function in ARMBaseInstrInfo
899 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
900 AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI); in storeRegToStackSlot()
910 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
911 AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI); in storeRegToStackSlot()
946 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
947 MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI); in storeRegToStackSlot()
948 AddDReg(MIB, SrcReg, ARM::dsub_2, 0, TRI); in storeRegToStackSlot()
967 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
968 MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI); in storeRegToStackSlot()
[all …]
DThumb2InstrInfo.cpp157 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
158 AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI); in storeRegToStackSlot()
199 AddDReg(MIB, DestReg, ARM::gsub_0, RegState::DefineNoRead, TRI); in loadRegFromStackSlot()
200 AddDReg(MIB, DestReg, ARM::gsub_1, RegState::DefineNoRead, TRI); in loadRegFromStackSlot()
DARMBaseInstrInfo.h201 const MachineInstrBuilder &AddDReg(MachineInstrBuilder &MIB, unsigned Reg,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.cpp958 ARMBaseInstrInfo::AddDReg(MachineInstrBuilder &MIB, unsigned Reg, in AddDReg() function in ARMBaseInstrInfo
1025 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
1026 AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI); in storeRegToStackSlot()
1036 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
1037 AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI); in storeRegToStackSlot()
1077 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
1078 MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI); in storeRegToStackSlot()
1079 AddDReg(MIB, SrcReg, ARM::dsub_2, 0, TRI); in storeRegToStackSlot()
1100 MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
1101 MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI); in storeRegToStackSlot()
[all …]
DThumb2InstrInfo.cpp171 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
172 AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI); in storeRegToStackSlot()
215 AddDReg(MIB, DestReg, ARM::gsub_0, RegState::DefineNoRead, TRI); in loadRegFromStackSlot()
216 AddDReg(MIB, DestReg, ARM::gsub_1, RegState::DefineNoRead, TRI); in loadRegFromStackSlot()
DARMBaseInstrInfo.h232 const MachineInstrBuilder &AddDReg(MachineInstrBuilder &MIB, unsigned Reg,