| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 229 return (Opc == Mips::BEQ || Opc == Mips::BNE || Opc == Mips::BGTZ || in GetAnalyzableBrOpc()
245 case Mips::BGTZ : return Mips::BLEZ; in GetOppositeBranchOpc()
248 case Mips::BLEZ : return Mips::BGTZ; in GetOppositeBranchOpc()
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| D | MipsInstrInfo.td | 731 def BGTZ : CBranchZero<0x07, 0, "bgtz", setgt, CPURegs>;
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| /external/v8/src/mips/ |
| D | constants-mips.h | 435 BGTZ = ((0U << 3) + 7) << kOpcodeShift, enumerator
490 POP07 = BGTZ, // bltuc/bgtuc, bgtzalc, bltzalc
1261 OpcodeToBitNumber(BGTZ) | OpcodeToBitNumber(ADDI) |
1867 case BGTZ: // POP07 bltuc/bgtuc, bgtzalc, bltzalc in IsForbiddenAfterBranchInstr()
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| D | assembler-mips.cc | 532 opcode == BEQ || opcode == BNE || opcode == BLEZ || opcode == BGTZ || in IsBranch()
1647 GenInstrImmediate(BGTZ, rs, zero_reg, offset); in bgtz()
1687 GenInstrImmediate(BGTZ, rs, rt, offset, CompactBranchType::COMPACT_BRANCH); in bltuc()
1774 GenInstrImmediate(BGTZ, rt, rt, offset, CompactBranchType::COMPACT_BRANCH); in bltzalc()
1782 GenInstrImmediate(BGTZ, zero_reg, rt, offset, in bgtzalc()
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| D | disasm-mips.cc | 1788 case BGTZ: in DecodeTypeImmediate()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 405 BGTZ = ((0U << 3) + 7) << kOpcodeShift, enumerator
472 POP07 = BGTZ, // bltuc/bgtuc, bgtzalc, bltzalc
1294 OpcodeToBitNumber(BGTZ) | OpcodeToBitNumber(ADDI) |
1950 case BGTZ: // POP07 bltuc/bgtuc, bgtzalc, bltzalc in IsForbiddenAfterBranchInstr()
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| D | assembler-mips64.cc | 511 opcode == BEQ || opcode == BNE || opcode == BLEZ || opcode == BGTZ || in IsBranch()
1627 GenInstrImmediate(BGTZ, rs, zero_reg, offset); in bgtz()
1667 GenInstrImmediate(BGTZ, rs, rt, offset, CompactBranchType::COMPACT_BRANCH); in bltuc()
1754 GenInstrImmediate(BGTZ, rt, rt, offset, CompactBranchType::COMPACT_BRANCH); in bltzalc()
1762 GenInstrImmediate(BGTZ, zero_reg, rt, offset, in bgtzalc()
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| D | disasm-mips64.cc | 2045 case BGTZ: in DecodeTypeImmediate()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/longbranch/ |
| D | branch-limits-int.mir | 361 BGTZ killed renamable $at, %bb.2, implicit-def $at
411 ; MIPS: BGTZ $at, %bb.2, implicit-def $at {
430 ; PIC: BGTZ $at, %bb.3, implicit-def $at {
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 412 case Mips::BGTZ: return Mips::BLEZ; in getOppositeBranchOpc()
415 case Mips::BLEZ: return Mips::BGTZ; in getOppositeBranchOpc()
509 return (Opc == Mips::BEQ || Opc == Mips::BNE || Opc == Mips::BGTZ || in getAnalyzableBrOpc()
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| D | MipsInstrInfo.cpp | 325 case Mips::BGTZ: in getEquivalentCompactForm()
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| D | MipsFastISel.cpp | 929 BuildMI(*BrBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::BGTZ)) in selectBranch()
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| D | MipsInstrInfo.td | 1870 def BGTZ : MMRel, CBranchZero<"bgtz", brtarget, setgt, GPR32Opnd>,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 293 case Mips::BGTZ: case Mips::BGTZ64: in isBranchOffsetInRange()
503 case Mips::BGTZ: in getEquivalentCompactForm()
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| D | MipsSEInstrInfo.cpp | 494 case Mips::BGTZ: return Mips::BLEZ; in getOppositeBranchOpc()
497 case Mips::BLEZ: return Mips::BGTZ; in getOppositeBranchOpc()
646 Opc == Mips::BNE_MM || Opc == Mips::BGTZ || Opc == Mips::BGEZ || in getAnalyzableBrOpc()
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| D | MipsScheduleP5600.td | 65 BGEZALL, BGEZL, BGTZ, BGTZL, BLEZ, BLEZL, BLTZ,
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| D | MipsFastISel.cpp | 962 BuildMI(*BrBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::BGTZ)) in selectBranch()
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| D | MipsInstrInfo.td | 2228 def BGTZ : MMRel, CBranchZero<"bgtz", brtarget, setgt, GPR32Opnd>,
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeMIPS_common.c | 121 #define BGTZ (HI(7)) macro
1766 inst = BGTZ; in sljit_emit_cmp()
1796 inst = BGTZ; in sljit_emit_cmp()
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 1546 case Mips::BGTZ: in processInstruction()
2846 ZeroSrcOpcode = Mips::BGTZ; in expandCondBranches()
2880 ZeroTrgOpcode = Mips::BGTZ; in expandCondBranches()
2910 TOut.emitRX(Mips::BGTZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 1847 case Mips::BGTZ: in processInstruction()
3756 ZeroSrcOpcode = Mips::BGTZ; in expandCondBranches()
3793 ZeroTrgOpcode = Mips::BGTZ; in expandCondBranches()
3823 TOut.emitRX(Mips::BGTZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches()
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 837 MI.setOpcode(Mips::BGTZ); in DecodeBgtzGroupBranch()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 992 MI.setOpcode(Mips::BGTZ); in DecodeBgtzGroupBranch()
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 228 25274U, // BGTZ
1942 0U, // BGTZ
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenMCCodeEmitter.inc | 731 UINT64_C(469762048), // BGTZ
5138 case Mips::BGTZ:
8457 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BGTZ = 718
|