1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|* Machine Code Emitter *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9uint64_t MipsMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI, 10 SmallVectorImpl<MCFixup> &Fixups, 11 const MCSubtargetInfo &STI) const { 12 static const uint64_t InstBits[] = { 13 UINT64_C(0), 14 UINT64_C(0), 15 UINT64_C(0), 16 UINT64_C(0), 17 UINT64_C(0), 18 UINT64_C(0), 19 UINT64_C(0), 20 UINT64_C(0), 21 UINT64_C(0), 22 UINT64_C(0), 23 UINT64_C(0), 24 UINT64_C(0), 25 UINT64_C(0), 26 UINT64_C(0), 27 UINT64_C(0), 28 UINT64_C(0), 29 UINT64_C(0), 30 UINT64_C(0), 31 UINT64_C(0), 32 UINT64_C(0), 33 UINT64_C(0), 34 UINT64_C(0), 35 UINT64_C(0), 36 UINT64_C(0), 37 UINT64_C(0), 38 UINT64_C(0), 39 UINT64_C(0), 40 UINT64_C(0), 41 UINT64_C(0), 42 UINT64_C(0), 43 UINT64_C(0), 44 UINT64_C(0), 45 UINT64_C(0), 46 UINT64_C(0), 47 UINT64_C(0), 48 UINT64_C(0), 49 UINT64_C(0), 50 UINT64_C(0), 51 UINT64_C(0), 52 UINT64_C(0), 53 UINT64_C(0), 54 UINT64_C(0), 55 UINT64_C(0), 56 UINT64_C(0), 57 UINT64_C(0), 58 UINT64_C(0), 59 UINT64_C(0), 60 UINT64_C(0), 61 UINT64_C(0), 62 UINT64_C(0), 63 UINT64_C(0), 64 UINT64_C(0), 65 UINT64_C(0), 66 UINT64_C(0), 67 UINT64_C(0), 68 UINT64_C(0), 69 UINT64_C(0), 70 UINT64_C(0), 71 UINT64_C(0), 72 UINT64_C(0), 73 UINT64_C(0), 74 UINT64_C(0), 75 UINT64_C(0), 76 UINT64_C(0), 77 UINT64_C(0), 78 UINT64_C(0), 79 UINT64_C(0), 80 UINT64_C(0), 81 UINT64_C(0), 82 UINT64_C(0), 83 UINT64_C(0), 84 UINT64_C(0), 85 UINT64_C(0), 86 UINT64_C(0), 87 UINT64_C(0), 88 UINT64_C(0), 89 UINT64_C(0), 90 UINT64_C(0), 91 UINT64_C(0), 92 UINT64_C(0), 93 UINT64_C(0), 94 UINT64_C(0), 95 UINT64_C(0), 96 UINT64_C(0), 97 UINT64_C(0), 98 UINT64_C(0), 99 UINT64_C(0), 100 UINT64_C(0), 101 UINT64_C(0), 102 UINT64_C(0), 103 UINT64_C(0), 104 UINT64_C(0), 105 UINT64_C(0), 106 UINT64_C(0), 107 UINT64_C(0), 108 UINT64_C(0), 109 UINT64_C(0), 110 UINT64_C(0), 111 UINT64_C(0), 112 UINT64_C(0), 113 UINT64_C(0), 114 UINT64_C(0), 115 UINT64_C(0), 116 UINT64_C(0), 117 UINT64_C(0), 118 UINT64_C(0), 119 UINT64_C(0), 120 UINT64_C(0), 121 UINT64_C(0), 122 UINT64_C(0), 123 UINT64_C(0), 124 UINT64_C(0), 125 UINT64_C(0), 126 UINT64_C(0), 127 UINT64_C(0), 128 UINT64_C(0), 129 UINT64_C(0), 130 UINT64_C(0), 131 UINT64_C(0), 132 UINT64_C(0), 133 UINT64_C(0), 134 UINT64_C(0), 135 UINT64_C(0), 136 UINT64_C(0), 137 UINT64_C(0), 138 UINT64_C(0), 139 UINT64_C(0), 140 UINT64_C(0), 141 UINT64_C(0), 142 UINT64_C(0), 143 UINT64_C(0), 144 UINT64_C(0), 145 UINT64_C(0), 146 UINT64_C(0), 147 UINT64_C(0), 148 UINT64_C(0), 149 UINT64_C(0), 150 UINT64_C(0), 151 UINT64_C(0), 152 UINT64_C(0), 153 UINT64_C(0), 154 UINT64_C(0), 155 UINT64_C(0), 156 UINT64_C(0), 157 UINT64_C(0), 158 UINT64_C(0), 159 UINT64_C(0), 160 UINT64_C(0), 161 UINT64_C(0), 162 UINT64_C(0), 163 UINT64_C(0), 164 UINT64_C(0), 165 UINT64_C(0), 166 UINT64_C(0), 167 UINT64_C(0), 168 UINT64_C(0), 169 UINT64_C(0), 170 UINT64_C(0), 171 UINT64_C(0), 172 UINT64_C(0), 173 UINT64_C(0), 174 UINT64_C(0), 175 UINT64_C(0), 176 UINT64_C(0), 177 UINT64_C(0), 178 UINT64_C(0), 179 UINT64_C(0), 180 UINT64_C(0), 181 UINT64_C(0), 182 UINT64_C(0), 183 UINT64_C(0), 184 UINT64_C(0), 185 UINT64_C(0), 186 UINT64_C(0), 187 UINT64_C(0), 188 UINT64_C(0), 189 UINT64_C(0), 190 UINT64_C(0), 191 UINT64_C(0), 192 UINT64_C(0), 193 UINT64_C(0), 194 UINT64_C(0), 195 UINT64_C(0), 196 UINT64_C(0), 197 UINT64_C(0), 198 UINT64_C(0), 199 UINT64_C(0), 200 UINT64_C(0), 201 UINT64_C(0), 202 UINT64_C(0), 203 UINT64_C(0), 204 UINT64_C(0), 205 UINT64_C(0), 206 UINT64_C(0), 207 UINT64_C(0), 208 UINT64_C(0), 209 UINT64_C(0), 210 UINT64_C(0), 211 UINT64_C(0), 212 UINT64_C(0), 213 UINT64_C(0), 214 UINT64_C(0), 215 UINT64_C(0), 216 UINT64_C(0), 217 UINT64_C(0), 218 UINT64_C(0), 219 UINT64_C(0), 220 UINT64_C(0), 221 UINT64_C(0), 222 UINT64_C(0), 223 UINT64_C(0), 224 UINT64_C(0), 225 UINT64_C(0), 226 UINT64_C(0), 227 UINT64_C(0), 228 UINT64_C(0), 229 UINT64_C(0), 230 UINT64_C(0), 231 UINT64_C(0), 232 UINT64_C(0), 233 UINT64_C(0), 234 UINT64_C(0), 235 UINT64_C(0), 236 UINT64_C(0), 237 UINT64_C(0), 238 UINT64_C(0), 239 UINT64_C(0), 240 UINT64_C(0), 241 UINT64_C(0), 242 UINT64_C(0), 243 UINT64_C(0), 244 UINT64_C(0), 245 UINT64_C(0), 246 UINT64_C(0), 247 UINT64_C(0), 248 UINT64_C(0), 249 UINT64_C(0), 250 UINT64_C(0), 251 UINT64_C(0), 252 UINT64_C(0), 253 UINT64_C(0), 254 UINT64_C(0), 255 UINT64_C(0), 256 UINT64_C(0), 257 UINT64_C(0), 258 UINT64_C(0), 259 UINT64_C(0), 260 UINT64_C(0), 261 UINT64_C(0), 262 UINT64_C(0), 263 UINT64_C(0), 264 UINT64_C(0), 265 UINT64_C(0), 266 UINT64_C(0), 267 UINT64_C(0), 268 UINT64_C(0), 269 UINT64_C(0), 270 UINT64_C(0), 271 UINT64_C(0), 272 UINT64_C(0), 273 UINT64_C(0), 274 UINT64_C(0), 275 UINT64_C(0), 276 UINT64_C(0), 277 UINT64_C(0), 278 UINT64_C(0), 279 UINT64_C(0), 280 UINT64_C(0), 281 UINT64_C(0), 282 UINT64_C(0), 283 UINT64_C(0), 284 UINT64_C(0), 285 UINT64_C(0), 286 UINT64_C(0), 287 UINT64_C(0), 288 UINT64_C(0), 289 UINT64_C(0), 290 UINT64_C(0), 291 UINT64_C(0), 292 UINT64_C(0), 293 UINT64_C(0), 294 UINT64_C(0), 295 UINT64_C(0), 296 UINT64_C(0), 297 UINT64_C(0), 298 UINT64_C(0), 299 UINT64_C(0), 300 UINT64_C(0), 301 UINT64_C(0), 302 UINT64_C(0), 303 UINT64_C(0), 304 UINT64_C(0), 305 UINT64_C(0), 306 UINT64_C(0), 307 UINT64_C(0), 308 UINT64_C(0), 309 UINT64_C(0), 310 UINT64_C(0), 311 UINT64_C(0), 312 UINT64_C(0), 313 UINT64_C(0), 314 UINT64_C(0), 315 UINT64_C(0), 316 UINT64_C(0), 317 UINT64_C(0), 318 UINT64_C(0), 319 UINT64_C(0), 320 UINT64_C(0), 321 UINT64_C(0), 322 UINT64_C(0), 323 UINT64_C(0), 324 UINT64_C(0), 325 UINT64_C(0), 326 UINT64_C(0), 327 UINT64_C(0), 328 UINT64_C(0), 329 UINT64_C(0), 330 UINT64_C(0), 331 UINT64_C(0), 332 UINT64_C(0), 333 UINT64_C(0), 334 UINT64_C(0), 335 UINT64_C(0), 336 UINT64_C(0), 337 UINT64_C(0), 338 UINT64_C(0), 339 UINT64_C(0), 340 UINT64_C(0), 341 UINT64_C(0), 342 UINT64_C(0), 343 UINT64_C(0), 344 UINT64_C(0), 345 UINT64_C(0), 346 UINT64_C(0), 347 UINT64_C(0), 348 UINT64_C(0), 349 UINT64_C(0), 350 UINT64_C(0), 351 UINT64_C(0), 352 UINT64_C(0), 353 UINT64_C(0), 354 UINT64_C(0), 355 UINT64_C(0), 356 UINT64_C(0), 357 UINT64_C(0), 358 UINT64_C(0), 359 UINT64_C(0), 360 UINT64_C(0), 361 UINT64_C(0), 362 UINT64_C(0), 363 UINT64_C(0), 364 UINT64_C(0), 365 UINT64_C(0), 366 UINT64_C(0), 367 UINT64_C(0), 368 UINT64_C(0), 369 UINT64_C(0), 370 UINT64_C(0), 371 UINT64_C(0), 372 UINT64_C(0), 373 UINT64_C(0), 374 UINT64_C(0), 375 UINT64_C(0), 376 UINT64_C(0), 377 UINT64_C(0), 378 UINT64_C(0), 379 UINT64_C(0), 380 UINT64_C(0), 381 UINT64_C(0), 382 UINT64_C(0), 383 UINT64_C(0), 384 UINT64_C(0), 385 UINT64_C(0), 386 UINT64_C(0), 387 UINT64_C(0), 388 UINT64_C(0), 389 UINT64_C(0), 390 UINT64_C(0), 391 UINT64_C(0), 392 UINT64_C(0), 393 UINT64_C(0), 394 UINT64_C(0), 395 UINT64_C(0), 396 UINT64_C(0), 397 UINT64_C(0), 398 UINT64_C(0), 399 UINT64_C(0), 400 UINT64_C(0), 401 UINT64_C(0), 402 UINT64_C(0), 403 UINT64_C(0), 404 UINT64_C(0), 405 UINT64_C(0), 406 UINT64_C(0), 407 UINT64_C(0), 408 UINT64_C(0), 409 UINT64_C(0), 410 UINT64_C(0), 411 UINT64_C(0), 412 UINT64_C(0), 413 UINT64_C(0), 414 UINT64_C(0), 415 UINT64_C(0), 416 UINT64_C(0), 417 UINT64_C(0), 418 UINT64_C(0), 419 UINT64_C(0), 420 UINT64_C(0), 421 UINT64_C(0), 422 UINT64_C(0), 423 UINT64_C(0), 424 UINT64_C(0), 425 UINT64_C(0), 426 UINT64_C(0), 427 UINT64_C(0), 428 UINT64_C(0), 429 UINT64_C(0), 430 UINT64_C(0), 431 UINT64_C(0), 432 UINT64_C(0), 433 UINT64_C(0), 434 UINT64_C(0), 435 UINT64_C(0), 436 UINT64_C(0), 437 UINT64_C(0), 438 UINT64_C(0), 439 UINT64_C(0), 440 UINT64_C(0), 441 UINT64_C(0), 442 UINT64_C(0), 443 UINT64_C(0), 444 UINT64_C(0), 445 UINT64_C(0), 446 UINT64_C(0), 447 UINT64_C(0), 448 UINT64_C(0), 449 UINT64_C(0), 450 UINT64_C(0), 451 UINT64_C(0), 452 UINT64_C(0), 453 UINT64_C(0), 454 UINT64_C(0), 455 UINT64_C(0), 456 UINT64_C(0), 457 UINT64_C(0), 458 UINT64_C(0), 459 UINT64_C(0), 460 UINT64_C(0), 461 UINT64_C(0), 462 UINT64_C(0), 463 UINT64_C(0), 464 UINT64_C(0), 465 UINT64_C(0), 466 UINT64_C(0), 467 UINT64_C(0), 468 UINT64_C(0), 469 UINT64_C(0), 470 UINT64_C(0), 471 UINT64_C(0), 472 UINT64_C(0), 473 UINT64_C(0), 474 UINT64_C(0), 475 UINT64_C(0), 476 UINT64_C(0), 477 UINT64_C(0), 478 UINT64_C(0), 479 UINT64_C(0), 480 UINT64_C(0), 481 UINT64_C(0), 482 UINT64_C(0), 483 UINT64_C(0), 484 UINT64_C(0), 485 UINT64_C(0), 486 UINT64_C(0), 487 UINT64_C(0), 488 UINT64_C(0), 489 UINT64_C(0), 490 UINT64_C(0), 491 UINT64_C(0), 492 UINT64_C(0), 493 UINT64_C(0), 494 UINT64_C(0), 495 UINT64_C(0), 496 UINT64_C(0), 497 UINT64_C(0), 498 UINT64_C(0), 499 UINT64_C(0), 500 UINT64_C(0), 501 UINT64_C(0), 502 UINT64_C(0), 503 UINT64_C(0), 504 UINT64_C(0), 505 UINT64_C(0), 506 UINT64_C(0), 507 UINT64_C(0), 508 UINT64_C(0), 509 UINT64_C(0), 510 UINT64_C(0), 511 UINT64_C(0), 512 UINT64_C(0), 513 UINT64_C(0), 514 UINT64_C(0), 515 UINT64_C(0), 516 UINT64_C(0), 517 UINT64_C(0), 518 UINT64_C(0), 519 UINT64_C(0), 520 UINT64_C(0), 521 UINT64_C(0), 522 UINT64_C(0), 523 UINT64_C(0), 524 UINT64_C(2080375378), // ABSQ_S_PH 525 UINT64_C(4412), // ABSQ_S_PH_MM 526 UINT64_C(2080374866), // ABSQ_S_QB 527 UINT64_C(316), // ABSQ_S_QB_MMR2 528 UINT64_C(2080375890), // ABSQ_S_W 529 UINT64_C(8508), // ABSQ_S_W_MM 530 UINT64_C(32), // ADD 531 UINT64_C(3959422976), // ADDIUPC 532 UINT64_C(2013265920), // ADDIUPC_MM 533 UINT64_C(2013265920), // ADDIUPC_MMR6 534 UINT64_C(27649), // ADDIUR1SP_MM 535 UINT64_C(27648), // ADDIUR2_MM 536 UINT64_C(19456), // ADDIUS5_MM 537 UINT64_C(19457), // ADDIUSP_MM 538 UINT64_C(805306368), // ADDIU_MMR6 539 UINT64_C(2080375320), // ADDQH_PH 540 UINT64_C(77), // ADDQH_PH_MMR2 541 UINT64_C(2080375448), // ADDQH_R_PH 542 UINT64_C(1101), // ADDQH_R_PH_MMR2 543 UINT64_C(2080375960), // ADDQH_R_W 544 UINT64_C(1165), // ADDQH_R_W_MMR2 545 UINT64_C(2080375832), // ADDQH_W 546 UINT64_C(141), // ADDQH_W_MMR2 547 UINT64_C(2080375440), // ADDQ_PH 548 UINT64_C(13), // ADDQ_PH_MM 549 UINT64_C(2080375696), // ADDQ_S_PH 550 UINT64_C(1037), // ADDQ_S_PH_MM 551 UINT64_C(2080376208), // ADDQ_S_W 552 UINT64_C(773), // ADDQ_S_W_MM 553 UINT64_C(2080375824), // ADDSC 554 UINT64_C(901), // ADDSC_MM 555 UINT64_C(2021654544), // ADDS_A_B 556 UINT64_C(2027946000), // ADDS_A_D 557 UINT64_C(2023751696), // ADDS_A_H 558 UINT64_C(2025848848), // ADDS_A_W 559 UINT64_C(2030043152), // ADDS_S_B 560 UINT64_C(2036334608), // ADDS_S_D 561 UINT64_C(2032140304), // ADDS_S_H 562 UINT64_C(2034237456), // ADDS_S_W 563 UINT64_C(2038431760), // ADDS_U_B 564 UINT64_C(2044723216), // ADDS_U_D 565 UINT64_C(2040528912), // ADDS_U_H 566 UINT64_C(2042626064), // ADDS_U_W 567 UINT64_C(1024), // ADDU16_MM 568 UINT64_C(1024), // ADDU16_MMR6 569 UINT64_C(2080374808), // ADDUH_QB 570 UINT64_C(333), // ADDUH_QB_MMR2 571 UINT64_C(2080374936), // ADDUH_R_QB 572 UINT64_C(1357), // ADDUH_R_QB_MMR2 573 UINT64_C(336), // ADDU_MMR6 574 UINT64_C(2080375312), // ADDU_PH 575 UINT64_C(269), // ADDU_PH_MMR2 576 UINT64_C(2080374800), // ADDU_QB 577 UINT64_C(205), // ADDU_QB_MM 578 UINT64_C(2080375568), // ADDU_S_PH 579 UINT64_C(1293), // ADDU_S_PH_MMR2 580 UINT64_C(2080375056), // ADDU_S_QB 581 UINT64_C(1229), // ADDU_S_QB_MM 582 UINT64_C(2013265926), // ADDVI_B 583 UINT64_C(2019557382), // ADDVI_D 584 UINT64_C(2015363078), // ADDVI_H 585 UINT64_C(2017460230), // ADDVI_W 586 UINT64_C(2013265934), // ADDV_B 587 UINT64_C(2019557390), // ADDV_D 588 UINT64_C(2015363086), // ADDV_H 589 UINT64_C(2017460238), // ADDV_W 590 UINT64_C(2080375888), // ADDWC 591 UINT64_C(965), // ADDWC_MM 592 UINT64_C(2013265936), // ADD_A_B 593 UINT64_C(2019557392), // ADD_A_D 594 UINT64_C(2015363088), // ADD_A_H 595 UINT64_C(2017460240), // ADD_A_W 596 UINT64_C(272), // ADD_MM 597 UINT64_C(272), // ADD_MMR6 598 UINT64_C(536870912), // ADDi 599 UINT64_C(268435456), // ADDi_MM 600 UINT64_C(603979776), // ADDiu 601 UINT64_C(805306368), // ADDiu_MM 602 UINT64_C(33), // ADDu 603 UINT64_C(336), // ADDu_MM 604 UINT64_C(2080375328), // ALIGN 605 UINT64_C(31), // ALIGN_MMR6 606 UINT64_C(3961454592), // ALUIPC 607 UINT64_C(2015297536), // ALUIPC_MMR6 608 UINT64_C(36), // AND 609 UINT64_C(17536), // AND16_MM 610 UINT64_C(17409), // AND16_MMR6 611 UINT64_C(36), // AND64 612 UINT64_C(11264), // ANDI16_MM 613 UINT64_C(11264), // ANDI16_MMR6 614 UINT64_C(2013265920), // ANDI_B 615 UINT64_C(3489660928), // ANDI_MMR6 616 UINT64_C(592), // AND_MM 617 UINT64_C(592), // AND_MMR6 618 UINT64_C(2013265950), // AND_V 619 UINT64_C(805306368), // ANDi 620 UINT64_C(805306368), // ANDi64 621 UINT64_C(3489660928), // ANDi_MM 622 UINT64_C(2080374833), // APPEND 623 UINT64_C(533), // APPEND_MMR2 624 UINT64_C(2046820369), // ASUB_S_B 625 UINT64_C(2053111825), // ASUB_S_D 626 UINT64_C(2048917521), // ASUB_S_H 627 UINT64_C(2051014673), // ASUB_S_W 628 UINT64_C(2055208977), // ASUB_U_B 629 UINT64_C(2061500433), // ASUB_U_D 630 UINT64_C(2057306129), // ASUB_U_H 631 UINT64_C(2059403281), // ASUB_U_W 632 UINT64_C(1006632960), // AUI 633 UINT64_C(3961389056), // AUIPC 634 UINT64_C(2015232000), // AUIPC_MMR6 635 UINT64_C(268435456), // AUI_MMR6 636 UINT64_C(2063597584), // AVER_S_B 637 UINT64_C(2069889040), // AVER_S_D 638 UINT64_C(2065694736), // AVER_S_H 639 UINT64_C(2067791888), // AVER_S_W 640 UINT64_C(2071986192), // AVER_U_B 641 UINT64_C(2078277648), // AVER_U_D 642 UINT64_C(2074083344), // AVER_U_H 643 UINT64_C(2076180496), // AVER_U_W 644 UINT64_C(2046820368), // AVE_S_B 645 UINT64_C(2053111824), // AVE_S_D 646 UINT64_C(2048917520), // AVE_S_H 647 UINT64_C(2051014672), // AVE_S_W 648 UINT64_C(2055208976), // AVE_U_B 649 UINT64_C(2061500432), // AVE_U_D 650 UINT64_C(2057306128), // AVE_U_H 651 UINT64_C(2059403280), // AVE_U_W 652 UINT64_C(4026550272), // AddiuRxImmX16 653 UINT64_C(4026533888), // AddiuRxPcImmX16 654 UINT64_C(18432), // AddiuRxRxImm16 655 UINT64_C(4026550272), // AddiuRxRxImmX16 656 UINT64_C(4026548224), // AddiuRxRyOffMemX16 657 UINT64_C(25344), // AddiuSpImm16 658 UINT64_C(4026544896), // AddiuSpImmX16 659 UINT64_C(57345), // AdduRxRyRz16 660 UINT64_C(59404), // AndRxRxRy16 661 UINT64_C(52224), // B16_MM 662 UINT64_C(1879048232), // BADDu 663 UINT64_C(68222976), // BAL 664 UINT64_C(3892314112), // BALC 665 UINT64_C(3019898880), // BALC_MMR6 666 UINT64_C(2080375857), // BALIGN 667 UINT64_C(2236), // BALIGN_MMR2 668 UINT64_C(3355443200), // BBIT0 669 UINT64_C(3623878656), // BBIT032 670 UINT64_C(3892314112), // BBIT1 671 UINT64_C(4160749568), // BBIT132 672 UINT64_C(3355443200), // BC 673 UINT64_C(52224), // BC16_MMR6 674 UINT64_C(1159725056), // BC1EQZ 675 UINT64_C(1090519040), // BC1EQZC_MMR6 676 UINT64_C(1157627904), // BC1F 677 UINT64_C(1157758976), // BC1FL 678 UINT64_C(1132462080), // BC1F_MM 679 UINT64_C(1168113664), // BC1NEZ 680 UINT64_C(1092616192), // BC1NEZC_MMR6 681 UINT64_C(1157693440), // BC1T 682 UINT64_C(1157824512), // BC1TL 683 UINT64_C(1134559232), // BC1T_MM 684 UINT64_C(1226833920), // BC2EQZ 685 UINT64_C(1094713344), // BC2EQZC_MMR6 686 UINT64_C(1235222528), // BC2NEZ 687 UINT64_C(1096810496), // BC2NEZC_MMR6 688 UINT64_C(2045771785), // BCLRI_B 689 UINT64_C(2038431753), // BCLRI_D 690 UINT64_C(2044723209), // BCLRI_H 691 UINT64_C(2042626057), // BCLRI_W 692 UINT64_C(2038431757), // BCLR_B 693 UINT64_C(2044723213), // BCLR_D 694 UINT64_C(2040528909), // BCLR_H 695 UINT64_C(2042626061), // BCLR_W 696 UINT64_C(2483027968), // BC_MMR6 697 UINT64_C(268435456), // BEQ 698 UINT64_C(268435456), // BEQ64 699 UINT64_C(536870912), // BEQC 700 UINT64_C(536870912), // BEQC64 701 UINT64_C(1946157056), // BEQC_MMR6 702 UINT64_C(1342177280), // BEQL 703 UINT64_C(35840), // BEQZ16_MM 704 UINT64_C(536870912), // BEQZALC 705 UINT64_C(1946157056), // BEQZALC_MMR6 706 UINT64_C(3623878656), // BEQZC 707 UINT64_C(35840), // BEQZC16_MMR6 708 UINT64_C(3623878656), // BEQZC64 709 UINT64_C(1088421888), // BEQZC_MM 710 UINT64_C(2147483648), // BEQZC_MMR6 711 UINT64_C(2483027968), // BEQ_MM 712 UINT64_C(1476395008), // BGEC 713 UINT64_C(1476395008), // BGEC64 714 UINT64_C(4093640704), // BGEC_MMR6 715 UINT64_C(402653184), // BGEUC 716 UINT64_C(402653184), // BGEUC64 717 UINT64_C(3221225472), // BGEUC_MMR6 718 UINT64_C(67174400), // BGEZ 719 UINT64_C(67174400), // BGEZ64 720 UINT64_C(68222976), // BGEZAL 721 UINT64_C(402653184), // BGEZALC 722 UINT64_C(3221225472), // BGEZALC_MMR6 723 UINT64_C(68354048), // BGEZALL 724 UINT64_C(1113587712), // BGEZALS_MM 725 UINT64_C(1080033280), // BGEZAL_MM 726 UINT64_C(1476395008), // BGEZC 727 UINT64_C(1476395008), // BGEZC64 728 UINT64_C(4093640704), // BGEZC_MMR6 729 UINT64_C(67305472), // BGEZL 730 UINT64_C(1077936128), // BGEZ_MM 731 UINT64_C(469762048), // BGTZ 732 UINT64_C(469762048), // BGTZ64 733 UINT64_C(469762048), // BGTZALC 734 UINT64_C(3758096384), // BGTZALC_MMR6 735 UINT64_C(1543503872), // BGTZC 736 UINT64_C(1543503872), // BGTZC64 737 UINT64_C(3556769792), // BGTZC_MMR6 738 UINT64_C(1543503872), // BGTZL 739 UINT64_C(1086324736), // BGTZ_MM 740 UINT64_C(2070937609), // BINSLI_B 741 UINT64_C(2063597577), // BINSLI_D 742 UINT64_C(2069889033), // BINSLI_H 743 UINT64_C(2067791881), // BINSLI_W 744 UINT64_C(2063597581), // BINSL_B 745 UINT64_C(2069889037), // BINSL_D 746 UINT64_C(2065694733), // BINSL_H 747 UINT64_C(2067791885), // BINSL_W 748 UINT64_C(2079326217), // BINSRI_B 749 UINT64_C(2071986185), // BINSRI_D 750 UINT64_C(2078277641), // BINSRI_H 751 UINT64_C(2076180489), // BINSRI_W 752 UINT64_C(2071986189), // BINSR_B 753 UINT64_C(2078277645), // BINSR_D 754 UINT64_C(2074083341), // BINSR_H 755 UINT64_C(2076180493), // BINSR_W 756 UINT64_C(2080376530), // BITREV 757 UINT64_C(12604), // BITREV_MM 758 UINT64_C(2080374816), // BITSWAP 759 UINT64_C(2876), // BITSWAP_MMR6 760 UINT64_C(402653184), // BLEZ 761 UINT64_C(402653184), // BLEZ64 762 UINT64_C(402653184), // BLEZALC 763 UINT64_C(3221225472), // BLEZALC_MMR6 764 UINT64_C(1476395008), // BLEZC 765 UINT64_C(1476395008), // BLEZC64 766 UINT64_C(4093640704), // BLEZC_MMR6 767 UINT64_C(1476395008), // BLEZL 768 UINT64_C(1082130432), // BLEZ_MM 769 UINT64_C(1543503872), // BLTC 770 UINT64_C(1543503872), // BLTC64 771 UINT64_C(3556769792), // BLTC_MMR6 772 UINT64_C(469762048), // BLTUC 773 UINT64_C(469762048), // BLTUC64 774 UINT64_C(3758096384), // BLTUC_MMR6 775 UINT64_C(67108864), // BLTZ 776 UINT64_C(67108864), // BLTZ64 777 UINT64_C(68157440), // BLTZAL 778 UINT64_C(469762048), // BLTZALC 779 UINT64_C(3758096384), // BLTZALC_MMR6 780 UINT64_C(68288512), // BLTZALL 781 UINT64_C(1109393408), // BLTZALS_MM 782 UINT64_C(1075838976), // BLTZAL_MM 783 UINT64_C(1543503872), // BLTZC 784 UINT64_C(1543503872), // BLTZC64 785 UINT64_C(3556769792), // BLTZC_MMR6 786 UINT64_C(67239936), // BLTZL 787 UINT64_C(1073741824), // BLTZ_MM 788 UINT64_C(2013265921), // BMNZI_B 789 UINT64_C(2021654558), // BMNZ_V 790 UINT64_C(2030043137), // BMZI_B 791 UINT64_C(2023751710), // BMZ_V 792 UINT64_C(335544320), // BNE 793 UINT64_C(335544320), // BNE64 794 UINT64_C(1610612736), // BNEC 795 UINT64_C(1610612736), // BNEC64 796 UINT64_C(2080374784), // BNEC_MMR6 797 UINT64_C(2062549001), // BNEGI_B 798 UINT64_C(2055208969), // BNEGI_D 799 UINT64_C(2061500425), // BNEGI_H 800 UINT64_C(2059403273), // BNEGI_W 801 UINT64_C(2055208973), // BNEG_B 802 UINT64_C(2061500429), // BNEG_D 803 UINT64_C(2057306125), // BNEG_H 804 UINT64_C(2059403277), // BNEG_W 805 UINT64_C(1409286144), // BNEL 806 UINT64_C(44032), // BNEZ16_MM 807 UINT64_C(1610612736), // BNEZALC 808 UINT64_C(2080374784), // BNEZALC_MMR6 809 UINT64_C(4160749568), // BNEZC 810 UINT64_C(44032), // BNEZC16_MMR6 811 UINT64_C(4160749568), // BNEZC64 812 UINT64_C(1084227584), // BNEZC_MM 813 UINT64_C(2684354560), // BNEZC_MMR6 814 UINT64_C(3019898880), // BNE_MM 815 UINT64_C(1610612736), // BNVC 816 UINT64_C(2080374784), // BNVC_MMR6 817 UINT64_C(1199570944), // BNZ_B 818 UINT64_C(1205862400), // BNZ_D 819 UINT64_C(1201668096), // BNZ_H 820 UINT64_C(1172307968), // BNZ_V 821 UINT64_C(1203765248), // BNZ_W 822 UINT64_C(536870912), // BOVC 823 UINT64_C(1946157056), // BOVC_MMR6 824 UINT64_C(68943872), // BPOSGE32 825 UINT64_C(1126170624), // BPOSGE32C_MMR3 826 UINT64_C(1130364928), // BPOSGE32_MM 827 UINT64_C(13), // BREAK 828 UINT64_C(18048), // BREAK16_MM 829 UINT64_C(17435), // BREAK16_MMR6 830 UINT64_C(7), // BREAK_MM 831 UINT64_C(7), // BREAK_MMR6 832 UINT64_C(2046820353), // BSELI_B 833 UINT64_C(2025848862), // BSEL_V 834 UINT64_C(2054160393), // BSETI_B 835 UINT64_C(2046820361), // BSETI_D 836 UINT64_C(2053111817), // BSETI_H 837 UINT64_C(2051014665), // BSETI_W 838 UINT64_C(2046820365), // BSET_B 839 UINT64_C(2053111821), // BSET_D 840 UINT64_C(2048917517), // BSET_H 841 UINT64_C(2051014669), // BSET_W 842 UINT64_C(1191182336), // BZ_B 843 UINT64_C(1197473792), // BZ_D 844 UINT64_C(1193279488), // BZ_H 845 UINT64_C(1163919360), // BZ_V 846 UINT64_C(1195376640), // BZ_W 847 UINT64_C(8192), // BeqzRxImm16 848 UINT64_C(4026540032), // BeqzRxImmX16 849 UINT64_C(4096), // Bimm16 850 UINT64_C(4026535936), // BimmX16 851 UINT64_C(10240), // BnezRxImm16 852 UINT64_C(4026542080), // BnezRxImmX16 853 UINT64_C(59397), // Break16 854 UINT64_C(24576), // Bteqz16 855 UINT64_C(4026544128), // BteqzX16 856 UINT64_C(24832), // Btnez16 857 UINT64_C(4026544384), // BtnezX16 858 UINT64_C(3154116608), // CACHE 859 UINT64_C(2080374811), // CACHEE 860 UINT64_C(1610655232), // CACHEE_MM 861 UINT64_C(536895488), // CACHE_MM 862 UINT64_C(536895488), // CACHE_MMR6 863 UINT64_C(2080374821), // CACHE_R6 864 UINT64_C(1176502282), // CEIL_L_D64 865 UINT64_C(1409307451), // CEIL_L_D_MMR6 866 UINT64_C(1174405130), // CEIL_L_S 867 UINT64_C(1409291067), // CEIL_L_S_MMR6 868 UINT64_C(1176502286), // CEIL_W_D32 869 UINT64_C(1176502286), // CEIL_W_D64 870 UINT64_C(1409309499), // CEIL_W_D_MMR6 871 UINT64_C(1409309499), // CEIL_W_MM 872 UINT64_C(1174405134), // CEIL_W_S 873 UINT64_C(1409293115), // CEIL_W_S_MM 874 UINT64_C(1409293115), // CEIL_W_S_MMR6 875 UINT64_C(2013265927), // CEQI_B 876 UINT64_C(2019557383), // CEQI_D 877 UINT64_C(2015363079), // CEQI_H 878 UINT64_C(2017460231), // CEQI_W 879 UINT64_C(2013265935), // CEQ_B 880 UINT64_C(2019557391), // CEQ_D 881 UINT64_C(2015363087), // CEQ_H 882 UINT64_C(2017460239), // CEQ_W 883 UINT64_C(1145044992), // CFC1 884 UINT64_C(1409290299), // CFC1_MM 885 UINT64_C(52540), // CFC2_MM 886 UINT64_C(2021523481), // CFCMSA 887 UINT64_C(1879048242), // CINS 888 UINT64_C(1879048243), // CINS32 889 UINT64_C(1879048242), // CINS64_32 890 UINT64_C(1879048242), // CINS_i32 891 UINT64_C(1176502299), // CLASS_D 892 UINT64_C(1409286752), // CLASS_D_MMR6 893 UINT64_C(1174405147), // CLASS_S 894 UINT64_C(1409286240), // CLASS_S_MMR6 895 UINT64_C(2046820359), // CLEI_S_B 896 UINT64_C(2053111815), // CLEI_S_D 897 UINT64_C(2048917511), // CLEI_S_H 898 UINT64_C(2051014663), // CLEI_S_W 899 UINT64_C(2055208967), // CLEI_U_B 900 UINT64_C(2061500423), // CLEI_U_D 901 UINT64_C(2057306119), // CLEI_U_H 902 UINT64_C(2059403271), // CLEI_U_W 903 UINT64_C(2046820367), // CLE_S_B 904 UINT64_C(2053111823), // CLE_S_D 905 UINT64_C(2048917519), // CLE_S_H 906 UINT64_C(2051014671), // CLE_S_W 907 UINT64_C(2055208975), // CLE_U_B 908 UINT64_C(2061500431), // CLE_U_D 909 UINT64_C(2057306127), // CLE_U_H 910 UINT64_C(2059403279), // CLE_U_W 911 UINT64_C(1879048225), // CLO 912 UINT64_C(19260), // CLO_MM 913 UINT64_C(19260), // CLO_MMR6 914 UINT64_C(81), // CLO_R6 915 UINT64_C(2030043143), // CLTI_S_B 916 UINT64_C(2036334599), // CLTI_S_D 917 UINT64_C(2032140295), // CLTI_S_H 918 UINT64_C(2034237447), // CLTI_S_W 919 UINT64_C(2038431751), // CLTI_U_B 920 UINT64_C(2044723207), // CLTI_U_D 921 UINT64_C(2040528903), // CLTI_U_H 922 UINT64_C(2042626055), // CLTI_U_W 923 UINT64_C(2030043151), // CLT_S_B 924 UINT64_C(2036334607), // CLT_S_D 925 UINT64_C(2032140303), // CLT_S_H 926 UINT64_C(2034237455), // CLT_S_W 927 UINT64_C(2038431759), // CLT_U_B 928 UINT64_C(2044723215), // CLT_U_D 929 UINT64_C(2040528911), // CLT_U_H 930 UINT64_C(2042626063), // CLT_U_W 931 UINT64_C(1879048224), // CLZ 932 UINT64_C(23356), // CLZ_MM 933 UINT64_C(80), // CLZ_MMR6 934 UINT64_C(80), // CLZ_R6 935 UINT64_C(2080376337), // CMPGDU_EQ_QB 936 UINT64_C(389), // CMPGDU_EQ_QB_MMR2 937 UINT64_C(2080376465), // CMPGDU_LE_QB 938 UINT64_C(517), // CMPGDU_LE_QB_MMR2 939 UINT64_C(2080376401), // CMPGDU_LT_QB 940 UINT64_C(453), // CMPGDU_LT_QB_MMR2 941 UINT64_C(2080375057), // CMPGU_EQ_QB 942 UINT64_C(1476395205), // CMPGU_EQ_QB_MM 943 UINT64_C(2080375185), // CMPGU_LE_QB 944 UINT64_C(1476395333), // CMPGU_LE_QB_MM 945 UINT64_C(2080375121), // CMPGU_LT_QB 946 UINT64_C(1476395269), // CMPGU_LT_QB_MM 947 UINT64_C(2080374801), // CMPU_EQ_QB 948 UINT64_C(581), // CMPU_EQ_QB_MM 949 UINT64_C(2080374929), // CMPU_LE_QB 950 UINT64_C(709), // CMPU_LE_QB_MM 951 UINT64_C(2080374865), // CMPU_LT_QB 952 UINT64_C(645), // CMPU_LT_QB_MM 953 UINT64_C(1409286165), // CMP_AF_D_MMR6 954 UINT64_C(1409286149), // CMP_AF_S_MMR6 955 UINT64_C(1184890882), // CMP_EQ_D 956 UINT64_C(1409286293), // CMP_EQ_D_MMR6 957 UINT64_C(2080375313), // CMP_EQ_PH 958 UINT64_C(5), // CMP_EQ_PH_MM 959 UINT64_C(1182793730), // CMP_EQ_S 960 UINT64_C(1409286277), // CMP_EQ_S_MMR6 961 UINT64_C(1184890880), // CMP_F_D 962 UINT64_C(1182793728), // CMP_F_S 963 UINT64_C(1184890886), // CMP_LE_D 964 UINT64_C(1409286549), // CMP_LE_D_MMR6 965 UINT64_C(2080375441), // CMP_LE_PH 966 UINT64_C(133), // CMP_LE_PH_MM 967 UINT64_C(1182793734), // CMP_LE_S 968 UINT64_C(1409286533), // CMP_LE_S_MMR6 969 UINT64_C(1184890884), // CMP_LT_D 970 UINT64_C(1409286421), // CMP_LT_D_MMR6 971 UINT64_C(2080375377), // CMP_LT_PH 972 UINT64_C(69), // CMP_LT_PH_MM 973 UINT64_C(1182793732), // CMP_LT_S 974 UINT64_C(1409286405), // CMP_LT_S_MMR6 975 UINT64_C(1184890888), // CMP_SAF_D 976 UINT64_C(1409286677), // CMP_SAF_D_MMR6 977 UINT64_C(1182793736), // CMP_SAF_S 978 UINT64_C(1409286661), // CMP_SAF_S_MMR6 979 UINT64_C(1184890890), // CMP_SEQ_D 980 UINT64_C(1409286805), // CMP_SEQ_D_MMR6 981 UINT64_C(1182793738), // CMP_SEQ_S 982 UINT64_C(1409286789), // CMP_SEQ_S_MMR6 983 UINT64_C(1184890894), // CMP_SLE_D 984 UINT64_C(1409287061), // CMP_SLE_D_MMR6 985 UINT64_C(1182793742), // CMP_SLE_S 986 UINT64_C(1409287045), // CMP_SLE_S_MMR6 987 UINT64_C(1184890892), // CMP_SLT_D 988 UINT64_C(1409286933), // CMP_SLT_D_MMR6 989 UINT64_C(1182793740), // CMP_SLT_S 990 UINT64_C(1409286917), // CMP_SLT_S_MMR6 991 UINT64_C(1184890891), // CMP_SUEQ_D 992 UINT64_C(1409286869), // CMP_SUEQ_D_MMR6 993 UINT64_C(1182793739), // CMP_SUEQ_S 994 UINT64_C(1409286853), // CMP_SUEQ_S_MMR6 995 UINT64_C(1184890895), // CMP_SULE_D 996 UINT64_C(1409287125), // CMP_SULE_D_MMR6 997 UINT64_C(1182793743), // CMP_SULE_S 998 UINT64_C(1409287109), // CMP_SULE_S_MMR6 999 UINT64_C(1184890893), // CMP_SULT_D 1000 UINT64_C(1409286997), // CMP_SULT_D_MMR6 1001 UINT64_C(1182793741), // CMP_SULT_S 1002 UINT64_C(1409286981), // CMP_SULT_S_MMR6 1003 UINT64_C(1184890889), // CMP_SUN_D 1004 UINT64_C(1409286741), // CMP_SUN_D_MMR6 1005 UINT64_C(1182793737), // CMP_SUN_S 1006 UINT64_C(1409286725), // CMP_SUN_S_MMR6 1007 UINT64_C(1184890883), // CMP_UEQ_D 1008 UINT64_C(1409286357), // CMP_UEQ_D_MMR6 1009 UINT64_C(1182793731), // CMP_UEQ_S 1010 UINT64_C(1409286341), // CMP_UEQ_S_MMR6 1011 UINT64_C(1184890887), // CMP_ULE_D 1012 UINT64_C(1409286613), // CMP_ULE_D_MMR6 1013 UINT64_C(1182793735), // CMP_ULE_S 1014 UINT64_C(1409286597), // CMP_ULE_S_MMR6 1015 UINT64_C(1184890885), // CMP_ULT_D 1016 UINT64_C(1409286485), // CMP_ULT_D_MMR6 1017 UINT64_C(1182793733), // CMP_ULT_S 1018 UINT64_C(1409286469), // CMP_ULT_S_MMR6 1019 UINT64_C(1184890881), // CMP_UN_D 1020 UINT64_C(1409286229), // CMP_UN_D_MMR6 1021 UINT64_C(1182793729), // CMP_UN_S 1022 UINT64_C(1409286213), // CMP_UN_S_MMR6 1023 UINT64_C(2021654553), // COPY_S_B 1024 UINT64_C(2025324569), // COPY_S_D 1025 UINT64_C(2023751705), // COPY_S_H 1026 UINT64_C(2024800281), // COPY_S_W 1027 UINT64_C(2025848857), // COPY_U_B 1028 UINT64_C(2027946009), // COPY_U_H 1029 UINT64_C(2028994585), // COPY_U_W 1030 UINT64_C(2080374799), // CRC32B 1031 UINT64_C(2080375055), // CRC32CB 1032 UINT64_C(2080375247), // CRC32CD 1033 UINT64_C(2080375119), // CRC32CH 1034 UINT64_C(2080375183), // CRC32CW 1035 UINT64_C(2080374991), // CRC32D 1036 UINT64_C(2080374863), // CRC32H 1037 UINT64_C(2080374927), // CRC32W 1038 UINT64_C(1153433600), // CTC1 1039 UINT64_C(1409292347), // CTC1_MM 1040 UINT64_C(56636), // CTC2_MM 1041 UINT64_C(2017329177), // CTCMSA 1042 UINT64_C(1174405153), // CVT_D32_S 1043 UINT64_C(1409291131), // CVT_D32_S_MM 1044 UINT64_C(1182793761), // CVT_D32_W 1045 UINT64_C(1409299323), // CVT_D32_W_MM 1046 UINT64_C(1184890913), // CVT_D64_L 1047 UINT64_C(1174405153), // CVT_D64_S 1048 UINT64_C(1409291131), // CVT_D64_S_MM 1049 UINT64_C(1182793761), // CVT_D64_W 1050 UINT64_C(1409299323), // CVT_D64_W_MM 1051 UINT64_C(1409307515), // CVT_D_L_MMR6 1052 UINT64_C(1176502309), // CVT_L_D64 1053 UINT64_C(1409302843), // CVT_L_D64_MM 1054 UINT64_C(1409302843), // CVT_L_D_MMR6 1055 UINT64_C(1174405157), // CVT_L_S 1056 UINT64_C(1409286459), // CVT_L_S_MM 1057 UINT64_C(1409286459), // CVT_L_S_MMR6 1058 UINT64_C(1176502304), // CVT_S_D32 1059 UINT64_C(1409293179), // CVT_S_D32_MM 1060 UINT64_C(1176502304), // CVT_S_D64 1061 UINT64_C(1409293179), // CVT_S_D64_MM 1062 UINT64_C(1184890912), // CVT_S_L 1063 UINT64_C(1409309563), // CVT_S_L_MMR6 1064 UINT64_C(1182793760), // CVT_S_W 1065 UINT64_C(1409301371), // CVT_S_W_MM 1066 UINT64_C(1409301371), // CVT_S_W_MMR6 1067 UINT64_C(1176502308), // CVT_W_D32 1068 UINT64_C(1409304891), // CVT_W_D32_MM 1069 UINT64_C(1176502308), // CVT_W_D64 1070 UINT64_C(1409304891), // CVT_W_D64_MM 1071 UINT64_C(1174405156), // CVT_W_S 1072 UINT64_C(1409288507), // CVT_W_S_MM 1073 UINT64_C(1409288507), // CVT_W_S_MMR6 1074 UINT64_C(1176502322), // C_EQ_D32 1075 UINT64_C(1409287356), // C_EQ_D32_MM 1076 UINT64_C(1176502322), // C_EQ_D64 1077 UINT64_C(1409287356), // C_EQ_D64_MM 1078 UINT64_C(1174405170), // C_EQ_S 1079 UINT64_C(1409286332), // C_EQ_S_MM 1080 UINT64_C(1176502320), // C_F_D32 1081 UINT64_C(1409287228), // C_F_D32_MM 1082 UINT64_C(1176502320), // C_F_D64 1083 UINT64_C(1409287228), // C_F_D64_MM 1084 UINT64_C(1174405168), // C_F_S 1085 UINT64_C(1409286204), // C_F_S_MM 1086 UINT64_C(1176502334), // C_LE_D32 1087 UINT64_C(1409288124), // C_LE_D32_MM 1088 UINT64_C(1176502334), // C_LE_D64 1089 UINT64_C(1409288124), // C_LE_D64_MM 1090 UINT64_C(1174405182), // C_LE_S 1091 UINT64_C(1409287100), // C_LE_S_MM 1092 UINT64_C(1176502332), // C_LT_D32 1093 UINT64_C(1409287996), // C_LT_D32_MM 1094 UINT64_C(1176502332), // C_LT_D64 1095 UINT64_C(1409287996), // C_LT_D64_MM 1096 UINT64_C(1174405180), // C_LT_S 1097 UINT64_C(1409286972), // C_LT_S_MM 1098 UINT64_C(1176502333), // C_NGE_D32 1099 UINT64_C(1409288060), // C_NGE_D32_MM 1100 UINT64_C(1176502333), // C_NGE_D64 1101 UINT64_C(1409288060), // C_NGE_D64_MM 1102 UINT64_C(1174405181), // C_NGE_S 1103 UINT64_C(1409287036), // C_NGE_S_MM 1104 UINT64_C(1176502329), // C_NGLE_D32 1105 UINT64_C(1409287804), // C_NGLE_D32_MM 1106 UINT64_C(1176502329), // C_NGLE_D64 1107 UINT64_C(1409287804), // C_NGLE_D64_MM 1108 UINT64_C(1174405177), // C_NGLE_S 1109 UINT64_C(1409286780), // C_NGLE_S_MM 1110 UINT64_C(1176502331), // C_NGL_D32 1111 UINT64_C(1409287932), // C_NGL_D32_MM 1112 UINT64_C(1176502331), // C_NGL_D64 1113 UINT64_C(1409287932), // C_NGL_D64_MM 1114 UINT64_C(1174405179), // C_NGL_S 1115 UINT64_C(1409286908), // C_NGL_S_MM 1116 UINT64_C(1176502335), // C_NGT_D32 1117 UINT64_C(1409288188), // C_NGT_D32_MM 1118 UINT64_C(1176502335), // C_NGT_D64 1119 UINT64_C(1409288188), // C_NGT_D64_MM 1120 UINT64_C(1174405183), // C_NGT_S 1121 UINT64_C(1409287164), // C_NGT_S_MM 1122 UINT64_C(1176502326), // C_OLE_D32 1123 UINT64_C(1409287612), // C_OLE_D32_MM 1124 UINT64_C(1176502326), // C_OLE_D64 1125 UINT64_C(1409287612), // C_OLE_D64_MM 1126 UINT64_C(1174405174), // C_OLE_S 1127 UINT64_C(1409286588), // C_OLE_S_MM 1128 UINT64_C(1176502324), // C_OLT_D32 1129 UINT64_C(1409287484), // C_OLT_D32_MM 1130 UINT64_C(1176502324), // C_OLT_D64 1131 UINT64_C(1409287484), // C_OLT_D64_MM 1132 UINT64_C(1174405172), // C_OLT_S 1133 UINT64_C(1409286460), // C_OLT_S_MM 1134 UINT64_C(1176502330), // C_SEQ_D32 1135 UINT64_C(1409287868), // C_SEQ_D32_MM 1136 UINT64_C(1176502330), // C_SEQ_D64 1137 UINT64_C(1409287868), // C_SEQ_D64_MM 1138 UINT64_C(1174405178), // C_SEQ_S 1139 UINT64_C(1409286844), // C_SEQ_S_MM 1140 UINT64_C(1176502328), // C_SF_D32 1141 UINT64_C(1409287740), // C_SF_D32_MM 1142 UINT64_C(1176502328), // C_SF_D64 1143 UINT64_C(1409287740), // C_SF_D64_MM 1144 UINT64_C(1174405176), // C_SF_S 1145 UINT64_C(1409286716), // C_SF_S_MM 1146 UINT64_C(1176502323), // C_UEQ_D32 1147 UINT64_C(1409287420), // C_UEQ_D32_MM 1148 UINT64_C(1176502323), // C_UEQ_D64 1149 UINT64_C(1409287420), // C_UEQ_D64_MM 1150 UINT64_C(1174405171), // C_UEQ_S 1151 UINT64_C(1409286396), // C_UEQ_S_MM 1152 UINT64_C(1176502327), // C_ULE_D32 1153 UINT64_C(1409287676), // C_ULE_D32_MM 1154 UINT64_C(1176502327), // C_ULE_D64 1155 UINT64_C(1409287676), // C_ULE_D64_MM 1156 UINT64_C(1174405175), // C_ULE_S 1157 UINT64_C(1409286652), // C_ULE_S_MM 1158 UINT64_C(1176502325), // C_ULT_D32 1159 UINT64_C(1409287548), // C_ULT_D32_MM 1160 UINT64_C(1176502325), // C_ULT_D64 1161 UINT64_C(1409287548), // C_ULT_D64_MM 1162 UINT64_C(1174405173), // C_ULT_S 1163 UINT64_C(1409286524), // C_ULT_S_MM 1164 UINT64_C(1176502321), // C_UN_D32 1165 UINT64_C(1409287292), // C_UN_D32_MM 1166 UINT64_C(1176502321), // C_UN_D64 1167 UINT64_C(1409287292), // C_UN_D64_MM 1168 UINT64_C(1174405169), // C_UN_S 1169 UINT64_C(1409286268), // C_UN_S_MM 1170 UINT64_C(59402), // CmpRxRy16 1171 UINT64_C(28672), // CmpiRxImm16 1172 UINT64_C(4026560512), // CmpiRxImmX16 1173 UINT64_C(44), // DADD 1174 UINT64_C(1610612736), // DADDi 1175 UINT64_C(1677721600), // DADDiu 1176 UINT64_C(45), // DADDu 1177 UINT64_C(67502080), // DAHI 1178 UINT64_C(2080375332), // DALIGN 1179 UINT64_C(69074944), // DATI 1180 UINT64_C(1946157056), // DAUI 1181 UINT64_C(2080374820), // DBITSWAP 1182 UINT64_C(1879048229), // DCLO 1183 UINT64_C(83), // DCLO_R6 1184 UINT64_C(1879048228), // DCLZ 1185 UINT64_C(82), // DCLZ_R6 1186 UINT64_C(158), // DDIV 1187 UINT64_C(159), // DDIVU 1188 UINT64_C(1107296287), // DERET 1189 UINT64_C(58236), // DERET_MM 1190 UINT64_C(58236), // DERET_MMR6 1191 UINT64_C(2080374787), // DEXT 1192 UINT64_C(2080374787), // DEXT64_32 1193 UINT64_C(2080374785), // DEXTM 1194 UINT64_C(2080374786), // DEXTU 1195 UINT64_C(1096835072), // DI 1196 UINT64_C(2080374791), // DINS 1197 UINT64_C(2080374789), // DINSM 1198 UINT64_C(2080374790), // DINSU 1199 UINT64_C(154), // DIV 1200 UINT64_C(155), // DIVU 1201 UINT64_C(408), // DIVU_MMR6 1202 UINT64_C(280), // DIV_MMR6 1203 UINT64_C(2046820370), // DIV_S_B 1204 UINT64_C(2053111826), // DIV_S_D 1205 UINT64_C(2048917522), // DIV_S_H 1206 UINT64_C(2051014674), // DIV_S_W 1207 UINT64_C(2055208978), // DIV_U_B 1208 UINT64_C(2061500434), // DIV_U_D 1209 UINT64_C(2057306130), // DIV_U_H 1210 UINT64_C(2059403282), // DIV_U_W 1211 UINT64_C(18300), // DI_MM 1212 UINT64_C(18300), // DI_MMR6 1213 UINT64_C(21), // DLSA 1214 UINT64_C(21), // DLSA_R6 1215 UINT64_C(1075838976), // DMFC0 1216 UINT64_C(1142947840), // DMFC1 1217 UINT64_C(1210056704), // DMFC2 1218 UINT64_C(1210056704), // DMFC2_OCTEON 1219 UINT64_C(1080033536), // DMFGC0 1220 UINT64_C(222), // DMOD 1221 UINT64_C(223), // DMODU 1222 UINT64_C(1096813505), // DMT 1223 UINT64_C(1084227584), // DMTC0 1224 UINT64_C(1151336448), // DMTC1 1225 UINT64_C(1218445312), // DMTC2 1226 UINT64_C(1218445312), // DMTC2_OCTEON 1227 UINT64_C(1080034048), // DMTGC0 1228 UINT64_C(220), // DMUH 1229 UINT64_C(221), // DMUHU 1230 UINT64_C(1879048195), // DMUL 1231 UINT64_C(28), // DMULT 1232 UINT64_C(29), // DMULTu 1233 UINT64_C(157), // DMULU 1234 UINT64_C(156), // DMUL_R6 1235 UINT64_C(2019557395), // DOTP_S_D 1236 UINT64_C(2015363091), // DOTP_S_H 1237 UINT64_C(2017460243), // DOTP_S_W 1238 UINT64_C(2027946003), // DOTP_U_D 1239 UINT64_C(2023751699), // DOTP_U_H 1240 UINT64_C(2025848851), // DOTP_U_W 1241 UINT64_C(2036334611), // DPADD_S_D 1242 UINT64_C(2032140307), // DPADD_S_H 1243 UINT64_C(2034237459), // DPADD_S_W 1244 UINT64_C(2044723219), // DPADD_U_D 1245 UINT64_C(2040528915), // DPADD_U_H 1246 UINT64_C(2042626067), // DPADD_U_W 1247 UINT64_C(2080376496), // DPAQX_SA_W_PH 1248 UINT64_C(12988), // DPAQX_SA_W_PH_MMR2 1249 UINT64_C(2080376368), // DPAQX_S_W_PH 1250 UINT64_C(8892), // DPAQX_S_W_PH_MMR2 1251 UINT64_C(2080375600), // DPAQ_SA_L_W 1252 UINT64_C(4796), // DPAQ_SA_L_W_MM 1253 UINT64_C(2080375088), // DPAQ_S_W_PH 1254 UINT64_C(700), // DPAQ_S_W_PH_MM 1255 UINT64_C(2080375024), // DPAU_H_QBL 1256 UINT64_C(8380), // DPAU_H_QBL_MM 1257 UINT64_C(2080375280), // DPAU_H_QBR 1258 UINT64_C(12476), // DPAU_H_QBR_MM 1259 UINT64_C(2080375344), // DPAX_W_PH 1260 UINT64_C(4284), // DPAX_W_PH_MMR2 1261 UINT64_C(2080374832), // DPA_W_PH 1262 UINT64_C(188), // DPA_W_PH_MMR2 1263 UINT64_C(1879048237), // DPOP 1264 UINT64_C(2080376560), // DPSQX_SA_W_PH 1265 UINT64_C(14012), // DPSQX_SA_W_PH_MMR2 1266 UINT64_C(2080376432), // DPSQX_S_W_PH 1267 UINT64_C(9916), // DPSQX_S_W_PH_MMR2 1268 UINT64_C(2080375664), // DPSQ_SA_L_W 1269 UINT64_C(5820), // DPSQ_SA_L_W_MM 1270 UINT64_C(2080375152), // DPSQ_S_W_PH 1271 UINT64_C(1724), // DPSQ_S_W_PH_MM 1272 UINT64_C(2053111827), // DPSUB_S_D 1273 UINT64_C(2048917523), // DPSUB_S_H 1274 UINT64_C(2051014675), // DPSUB_S_W 1275 UINT64_C(2061500435), // DPSUB_U_D 1276 UINT64_C(2057306131), // DPSUB_U_H 1277 UINT64_C(2059403283), // DPSUB_U_W 1278 UINT64_C(2080375536), // DPSU_H_QBL 1279 UINT64_C(9404), // DPSU_H_QBL_MM 1280 UINT64_C(2080375792), // DPSU_H_QBR 1281 UINT64_C(13500), // DPSU_H_QBR_MM 1282 UINT64_C(2080375408), // DPSX_W_PH 1283 UINT64_C(5308), // DPSX_W_PH_MMR2 1284 UINT64_C(2080374896), // DPS_W_PH 1285 UINT64_C(1212), // DPS_W_PH_MMR2 1286 UINT64_C(2097210), // DROTR 1287 UINT64_C(2097214), // DROTR32 1288 UINT64_C(86), // DROTRV 1289 UINT64_C(2080374948), // DSBH 1290 UINT64_C(30), // DSDIV 1291 UINT64_C(2080375140), // DSHD 1292 UINT64_C(56), // DSLL 1293 UINT64_C(60), // DSLL32 1294 UINT64_C(60), // DSLL64_32 1295 UINT64_C(20), // DSLLV 1296 UINT64_C(59), // DSRA 1297 UINT64_C(63), // DSRA32 1298 UINT64_C(23), // DSRAV 1299 UINT64_C(58), // DSRL 1300 UINT64_C(62), // DSRL32 1301 UINT64_C(22), // DSRLV 1302 UINT64_C(46), // DSUB 1303 UINT64_C(47), // DSUBu 1304 UINT64_C(31), // DUDIV 1305 UINT64_C(1096810532), // DVP 1306 UINT64_C(1096810497), // DVPE 1307 UINT64_C(6524), // DVP_MMR6 1308 UINT64_C(59418), // DivRxRy16 1309 UINT64_C(59419), // DivuRxRy16 1310 UINT64_C(192), // EHB 1311 UINT64_C(6144), // EHB_MM 1312 UINT64_C(6144), // EHB_MMR6 1313 UINT64_C(1096835104), // EI 1314 UINT64_C(22396), // EI_MM 1315 UINT64_C(22396), // EI_MMR6 1316 UINT64_C(1096813537), // EMT 1317 UINT64_C(1107296280), // ERET 1318 UINT64_C(1107296344), // ERETNC 1319 UINT64_C(127868), // ERETNC_MMR6 1320 UINT64_C(62332), // ERET_MM 1321 UINT64_C(62332), // ERET_MMR6 1322 UINT64_C(1096810500), // EVP 1323 UINT64_C(1096810529), // EVPE 1324 UINT64_C(14716), // EVP_MMR6 1325 UINT64_C(2080374784), // EXT 1326 UINT64_C(2080374968), // EXTP 1327 UINT64_C(2080375480), // EXTPDP 1328 UINT64_C(2080375544), // EXTPDPV 1329 UINT64_C(14524), // EXTPDPV_MM 1330 UINT64_C(13948), // EXTPDP_MM 1331 UINT64_C(2080375032), // EXTPV 1332 UINT64_C(10428), // EXTPV_MM 1333 UINT64_C(9852), // EXTP_MM 1334 UINT64_C(2080375288), // EXTRV_RS_W 1335 UINT64_C(11964), // EXTRV_RS_W_MM 1336 UINT64_C(2080375160), // EXTRV_R_W 1337 UINT64_C(7868), // EXTRV_R_W_MM 1338 UINT64_C(2080375800), // EXTRV_S_H 1339 UINT64_C(16060), // EXTRV_S_H_MM 1340 UINT64_C(2080374904), // EXTRV_W 1341 UINT64_C(3772), // EXTRV_W_MM 1342 UINT64_C(2080375224), // EXTR_RS_W 1343 UINT64_C(11900), // EXTR_RS_W_MM 1344 UINT64_C(2080375096), // EXTR_R_W 1345 UINT64_C(7804), // EXTR_R_W_MM 1346 UINT64_C(2080375736), // EXTR_S_H 1347 UINT64_C(15996), // EXTR_S_H_MM 1348 UINT64_C(2080374840), // EXTR_W 1349 UINT64_C(3708), // EXTR_W_MM 1350 UINT64_C(1879048250), // EXTS 1351 UINT64_C(1879048251), // EXTS32 1352 UINT64_C(44), // EXT_MM 1353 UINT64_C(44), // EXT_MMR6 1354 UINT64_C(1176502277), // FABS_D32 1355 UINT64_C(1409295227), // FABS_D32_MM 1356 UINT64_C(1176502277), // FABS_D64 1357 UINT64_C(1409295227), // FABS_D64_MM 1358 UINT64_C(1174405125), // FABS_S 1359 UINT64_C(1409287035), // FABS_S_MM 1360 UINT64_C(2015363099), // FADD_D 1361 UINT64_C(1176502272), // FADD_D32 1362 UINT64_C(1409286448), // FADD_D32_MM 1363 UINT64_C(1176502272), // FADD_D64 1364 UINT64_C(1409286448), // FADD_D64_MM 1365 UINT64_C(1174405120), // FADD_S 1366 UINT64_C(1409286192), // FADD_S_MM 1367 UINT64_C(1409286192), // FADD_S_MMR6 1368 UINT64_C(2013265947), // FADD_W 1369 UINT64_C(2015363098), // FCAF_D 1370 UINT64_C(2013265946), // FCAF_W 1371 UINT64_C(2023751706), // FCEQ_D 1372 UINT64_C(2021654554), // FCEQ_W 1373 UINT64_C(2065760286), // FCLASS_D 1374 UINT64_C(2065694750), // FCLASS_W 1375 UINT64_C(2040528922), // FCLE_D 1376 UINT64_C(2038431770), // FCLE_W 1377 UINT64_C(2032140314), // FCLT_D 1378 UINT64_C(2030043162), // FCLT_W 1379 UINT64_C(1176502320), // FCMP_D32 1380 UINT64_C(1409287228), // FCMP_D32_MM 1381 UINT64_C(1176502320), // FCMP_D64 1382 UINT64_C(1174405168), // FCMP_S32 1383 UINT64_C(1409286204), // FCMP_S32_MM 1384 UINT64_C(2027946012), // FCNE_D 1385 UINT64_C(2025848860), // FCNE_W 1386 UINT64_C(2019557404), // FCOR_D 1387 UINT64_C(2017460252), // FCOR_W 1388 UINT64_C(2027946010), // FCUEQ_D 1389 UINT64_C(2025848858), // FCUEQ_W 1390 UINT64_C(2044723226), // FCULE_D 1391 UINT64_C(2042626074), // FCULE_W 1392 UINT64_C(2036334618), // FCULT_D 1393 UINT64_C(2034237466), // FCULT_W 1394 UINT64_C(2023751708), // FCUNE_D 1395 UINT64_C(2021654556), // FCUNE_W 1396 UINT64_C(2019557402), // FCUN_D 1397 UINT64_C(2017460250), // FCUN_W 1398 UINT64_C(2027946011), // FDIV_D 1399 UINT64_C(1176502275), // FDIV_D32 1400 UINT64_C(1409286640), // FDIV_D32_MM 1401 UINT64_C(1176502275), // FDIV_D64 1402 UINT64_C(1409286640), // FDIV_D64_MM 1403 UINT64_C(1174405123), // FDIV_S 1404 UINT64_C(1409286384), // FDIV_S_MM 1405 UINT64_C(1409286384), // FDIV_S_MMR6 1406 UINT64_C(2025848859), // FDIV_W 1407 UINT64_C(2046820379), // FEXDO_H 1408 UINT64_C(2048917531), // FEXDO_W 1409 UINT64_C(2044723227), // FEXP2_D 1410 UINT64_C(2042626075), // FEXP2_W 1411 UINT64_C(2066808862), // FEXUPL_D 1412 UINT64_C(2066743326), // FEXUPL_W 1413 UINT64_C(2066939934), // FEXUPR_D 1414 UINT64_C(2066874398), // FEXUPR_W 1415 UINT64_C(2067595294), // FFINT_S_D 1416 UINT64_C(2067529758), // FFINT_S_W 1417 UINT64_C(2067726366), // FFINT_U_D 1418 UINT64_C(2067660830), // FFINT_U_W 1419 UINT64_C(2067071006), // FFQL_D 1420 UINT64_C(2067005470), // FFQL_W 1421 UINT64_C(2067202078), // FFQR_D 1422 UINT64_C(2067136542), // FFQR_W 1423 UINT64_C(2063597598), // FILL_B 1424 UINT64_C(2063794206), // FILL_D 1425 UINT64_C(2063663134), // FILL_H 1426 UINT64_C(2063728670), // FILL_W 1427 UINT64_C(2066677790), // FLOG2_D 1428 UINT64_C(2066612254), // FLOG2_W 1429 UINT64_C(1176502283), // FLOOR_L_D64 1430 UINT64_C(1409303355), // FLOOR_L_D_MMR6 1431 UINT64_C(1174405131), // FLOOR_L_S 1432 UINT64_C(1409286971), // FLOOR_L_S_MMR6 1433 UINT64_C(1176502287), // FLOOR_W_D32 1434 UINT64_C(1176502287), // FLOOR_W_D64 1435 UINT64_C(1409305403), // FLOOR_W_D_MMR6 1436 UINT64_C(1409305403), // FLOOR_W_MM 1437 UINT64_C(1174405135), // FLOOR_W_S 1438 UINT64_C(1409289019), // FLOOR_W_S_MM 1439 UINT64_C(1409289019), // FLOOR_W_S_MMR6 1440 UINT64_C(2032140315), // FMADD_D 1441 UINT64_C(2030043163), // FMADD_W 1442 UINT64_C(2078277659), // FMAX_A_D 1443 UINT64_C(2076180507), // FMAX_A_W 1444 UINT64_C(2074083355), // FMAX_D 1445 UINT64_C(2071986203), // FMAX_W 1446 UINT64_C(2069889051), // FMIN_A_D 1447 UINT64_C(2067791899), // FMIN_A_W 1448 UINT64_C(2065694747), // FMIN_D 1449 UINT64_C(2063597595), // FMIN_W 1450 UINT64_C(1176502278), // FMOV_D32 1451 UINT64_C(1409294459), // FMOV_D32_MM 1452 UINT64_C(1176502278), // FMOV_D64 1453 UINT64_C(1409294459), // FMOV_D64_MM 1454 UINT64_C(1174405126), // FMOV_S 1455 UINT64_C(1409286267), // FMOV_S_MM 1456 UINT64_C(1409286267), // FMOV_S_MMR6 1457 UINT64_C(2036334619), // FMSUB_D 1458 UINT64_C(2034237467), // FMSUB_W 1459 UINT64_C(2023751707), // FMUL_D 1460 UINT64_C(1176502274), // FMUL_D32 1461 UINT64_C(1409286576), // FMUL_D32_MM 1462 UINT64_C(1176502274), // FMUL_D64 1463 UINT64_C(1409286576), // FMUL_D64_MM 1464 UINT64_C(1174405122), // FMUL_S 1465 UINT64_C(1409286320), // FMUL_S_MM 1466 UINT64_C(1409286320), // FMUL_S_MMR6 1467 UINT64_C(2021654555), // FMUL_W 1468 UINT64_C(1176502279), // FNEG_D32 1469 UINT64_C(1409297275), // FNEG_D32_MM 1470 UINT64_C(1176502279), // FNEG_D64 1471 UINT64_C(1409297275), // FNEG_D64_MM 1472 UINT64_C(1174405127), // FNEG_S 1473 UINT64_C(1409289083), // FNEG_S_MM 1474 UINT64_C(1409289083), // FNEG_S_MMR6 1475 UINT64_C(2080374792), // FORK 1476 UINT64_C(2066415646), // FRCP_D 1477 UINT64_C(2066350110), // FRCP_W 1478 UINT64_C(2066546718), // FRINT_D 1479 UINT64_C(2066481182), // FRINT_W 1480 UINT64_C(2066284574), // FRSQRT_D 1481 UINT64_C(2066219038), // FRSQRT_W 1482 UINT64_C(2048917530), // FSAF_D 1483 UINT64_C(2046820378), // FSAF_W 1484 UINT64_C(2057306138), // FSEQ_D 1485 UINT64_C(2055208986), // FSEQ_W 1486 UINT64_C(2074083354), // FSLE_D 1487 UINT64_C(2071986202), // FSLE_W 1488 UINT64_C(2065694746), // FSLT_D 1489 UINT64_C(2063597594), // FSLT_W 1490 UINT64_C(2061500444), // FSNE_D 1491 UINT64_C(2059403292), // FSNE_W 1492 UINT64_C(2053111836), // FSOR_D 1493 UINT64_C(2051014684), // FSOR_W 1494 UINT64_C(2066153502), // FSQRT_D 1495 UINT64_C(1176502276), // FSQRT_D32 1496 UINT64_C(1409305147), // FSQRT_D32_MM 1497 UINT64_C(1176502276), // FSQRT_D64 1498 UINT64_C(1409305147), // FSQRT_D64_MM 1499 UINT64_C(1174405124), // FSQRT_S 1500 UINT64_C(1409288763), // FSQRT_S_MM 1501 UINT64_C(2066087966), // FSQRT_W 1502 UINT64_C(2019557403), // FSUB_D 1503 UINT64_C(1176502273), // FSUB_D32 1504 UINT64_C(1409286512), // FSUB_D32_MM 1505 UINT64_C(1176502273), // FSUB_D64 1506 UINT64_C(1409286512), // FSUB_D64_MM 1507 UINT64_C(1174405121), // FSUB_S 1508 UINT64_C(1409286256), // FSUB_S_MM 1509 UINT64_C(1409286256), // FSUB_S_MMR6 1510 UINT64_C(2017460251), // FSUB_W 1511 UINT64_C(2061500442), // FSUEQ_D 1512 UINT64_C(2059403290), // FSUEQ_W 1513 UINT64_C(2078277658), // FSULE_D 1514 UINT64_C(2076180506), // FSULE_W 1515 UINT64_C(2069889050), // FSULT_D 1516 UINT64_C(2067791898), // FSULT_W 1517 UINT64_C(2057306140), // FSUNE_D 1518 UINT64_C(2055208988), // FSUNE_W 1519 UINT64_C(2053111834), // FSUN_D 1520 UINT64_C(2051014682), // FSUN_W 1521 UINT64_C(2067333150), // FTINT_S_D 1522 UINT64_C(2067267614), // FTINT_S_W 1523 UINT64_C(2067464222), // FTINT_U_D 1524 UINT64_C(2067398686), // FTINT_U_W 1525 UINT64_C(2055208987), // FTQ_H 1526 UINT64_C(2057306139), // FTQ_W 1527 UINT64_C(2065891358), // FTRUNC_S_D 1528 UINT64_C(2065825822), // FTRUNC_S_W 1529 UINT64_C(2066022430), // FTRUNC_U_D 1530 UINT64_C(2065956894), // FTRUNC_U_W 1531 UINT64_C(2080374845), // GINVI 1532 UINT64_C(24956), // GINVI_MMR6 1533 UINT64_C(2080374973), // GINVT 1534 UINT64_C(29052), // GINVT_MMR6 1535 UINT64_C(2053111829), // HADD_S_D 1536 UINT64_C(2048917525), // HADD_S_H 1537 UINT64_C(2051014677), // HADD_S_W 1538 UINT64_C(2061500437), // HADD_U_D 1539 UINT64_C(2057306133), // HADD_U_H 1540 UINT64_C(2059403285), // HADD_U_W 1541 UINT64_C(2069889045), // HSUB_S_D 1542 UINT64_C(2065694741), // HSUB_S_H 1543 UINT64_C(2067791893), // HSUB_S_W 1544 UINT64_C(2078277653), // HSUB_U_D 1545 UINT64_C(2074083349), // HSUB_U_H 1546 UINT64_C(2076180501), // HSUB_U_W 1547 UINT64_C(1107296296), // HYPCALL 1548 UINT64_C(50044), // HYPCALL_MM 1549 UINT64_C(2063597588), // ILVEV_B 1550 UINT64_C(2069889044), // ILVEV_D 1551 UINT64_C(2065694740), // ILVEV_H 1552 UINT64_C(2067791892), // ILVEV_W 1553 UINT64_C(2046820372), // ILVL_B 1554 UINT64_C(2053111828), // ILVL_D 1555 UINT64_C(2048917524), // ILVL_H 1556 UINT64_C(2051014676), // ILVL_W 1557 UINT64_C(2071986196), // ILVOD_B 1558 UINT64_C(2078277652), // ILVOD_D 1559 UINT64_C(2074083348), // ILVOD_H 1560 UINT64_C(2076180500), // ILVOD_W 1561 UINT64_C(2055208980), // ILVR_B 1562 UINT64_C(2061500436), // ILVR_D 1563 UINT64_C(2057306132), // ILVR_H 1564 UINT64_C(2059403284), // ILVR_W 1565 UINT64_C(2080374788), // INS 1566 UINT64_C(2030043161), // INSERT_B 1567 UINT64_C(2033713177), // INSERT_D 1568 UINT64_C(2032140313), // INSERT_H 1569 UINT64_C(2033188889), // INSERT_W 1570 UINT64_C(2080374796), // INSV 1571 UINT64_C(2034237465), // INSVE_B 1572 UINT64_C(2037907481), // INSVE_D 1573 UINT64_C(2036334617), // INSVE_H 1574 UINT64_C(2037383193), // INSVE_W 1575 UINT64_C(16700), // INSV_MM 1576 UINT64_C(12), // INS_MM 1577 UINT64_C(12), // INS_MMR6 1578 UINT64_C(134217728), // J 1579 UINT64_C(201326592), // JAL 1580 UINT64_C(9), // JALR 1581 UINT64_C(17856), // JALR16_MM 1582 UINT64_C(9), // JALR64 1583 UINT64_C(17419), // JALRC16_MMR6 1584 UINT64_C(7996), // JALRC_HB_MMR6 1585 UINT64_C(3900), // JALRC_MMR6 1586 UINT64_C(17888), // JALRS16_MM 1587 UINT64_C(20284), // JALRS_MM 1588 UINT64_C(1033), // JALR_HB 1589 UINT64_C(1033), // JALR_HB64 1590 UINT64_C(3900), // JALR_MM 1591 UINT64_C(1946157056), // JALS_MM 1592 UINT64_C(1946157056), // JALX 1593 UINT64_C(4026531840), // JALX_MM 1594 UINT64_C(4093640704), // JAL_MM 1595 UINT64_C(4160749568), // JIALC 1596 UINT64_C(4160749568), // JIALC64 1597 UINT64_C(2147483648), // JIALC_MMR6 1598 UINT64_C(3623878656), // JIC 1599 UINT64_C(3623878656), // JIC64 1600 UINT64_C(2684354560), // JIC_MMR6 1601 UINT64_C(8), // JR 1602 UINT64_C(17792), // JR16_MM 1603 UINT64_C(8), // JR64 1604 UINT64_C(18176), // JRADDIUSP 1605 UINT64_C(17824), // JRC16_MM 1606 UINT64_C(17411), // JRC16_MMR6 1607 UINT64_C(17427), // JRCADDIUSP_MMR6 1608 UINT64_C(1032), // JR_HB 1609 UINT64_C(1032), // JR_HB64 1610 UINT64_C(1033), // JR_HB64_R6 1611 UINT64_C(1033), // JR_HB_R6 1612 UINT64_C(3900), // JR_MM 1613 UINT64_C(3556769792), // J_MM 1614 UINT64_C(402653184), // Jal16 1615 UINT64_C(402653184), // JalB16 1616 UINT64_C(59424), // JrRa16 1617 UINT64_C(59616), // JrcRa16 1618 UINT64_C(59584), // JrcRx16 1619 UINT64_C(59392), // JumpLinkReg16 1620 UINT64_C(2147483648), // LB 1621 UINT64_C(2147483648), // LB64 1622 UINT64_C(2080374828), // LBE 1623 UINT64_C(1610639360), // LBE_MM 1624 UINT64_C(2048), // LBU16_MM 1625 UINT64_C(2080375178), // LBUX 1626 UINT64_C(549), // LBUX_MM 1627 UINT64_C(335544320), // LBU_MMR6 1628 UINT64_C(469762048), // LB_MM 1629 UINT64_C(469762048), // LB_MMR6 1630 UINT64_C(2415919104), // LBu 1631 UINT64_C(2415919104), // LBu64 1632 UINT64_C(2080374824), // LBuE 1633 UINT64_C(1610637312), // LBuE_MM 1634 UINT64_C(335544320), // LBu_MM 1635 UINT64_C(3690987520), // LD 1636 UINT64_C(3556769792), // LDC1 1637 UINT64_C(3556769792), // LDC164 1638 UINT64_C(3154116608), // LDC1_D64_MMR6 1639 UINT64_C(3154116608), // LDC1_MM 1640 UINT64_C(3623878656), // LDC2 1641 UINT64_C(536879104), // LDC2_MMR6 1642 UINT64_C(1237319680), // LDC2_R6 1643 UINT64_C(3690987520), // LDC3 1644 UINT64_C(2063597575), // LDI_B 1645 UINT64_C(2069889031), // LDI_D 1646 UINT64_C(2065694727), // LDI_H 1647 UINT64_C(2067791879), // LDI_W 1648 UINT64_C(1744830464), // LDL 1649 UINT64_C(3960995840), // LDPC 1650 UINT64_C(1811939328), // LDR 1651 UINT64_C(1275068417), // LDXC1 1652 UINT64_C(1275068417), // LDXC164 1653 UINT64_C(2013265952), // LD_B 1654 UINT64_C(2013265955), // LD_D 1655 UINT64_C(2013265953), // LD_H 1656 UINT64_C(2013265954), // LD_W 1657 UINT64_C(603979776), // LEA_ADDiu 1658 UINT64_C(1677721600), // LEA_ADDiu64 1659 UINT64_C(805306368), // LEA_ADDiu_MM 1660 UINT64_C(2214592512), // LH 1661 UINT64_C(2214592512), // LH64 1662 UINT64_C(2080374829), // LHE 1663 UINT64_C(1610639872), // LHE_MM 1664 UINT64_C(10240), // LHU16_MM 1665 UINT64_C(2080375050), // LHX 1666 UINT64_C(357), // LHX_MM 1667 UINT64_C(1006632960), // LH_MM 1668 UINT64_C(2483027968), // LHu 1669 UINT64_C(2483027968), // LHu64 1670 UINT64_C(2080374825), // LHuE 1671 UINT64_C(1610637824), // LHuE_MM 1672 UINT64_C(872415232), // LHu_MM 1673 UINT64_C(60416), // LI16_MM 1674 UINT64_C(60416), // LI16_MMR6 1675 UINT64_C(3221225472), // LL 1676 UINT64_C(3221225472), // LL64 1677 UINT64_C(2080374838), // LL64_R6 1678 UINT64_C(3489660928), // LLD 1679 UINT64_C(2080374839), // LLD_R6 1680 UINT64_C(2080374830), // LLE 1681 UINT64_C(1610640384), // LLE_MM 1682 UINT64_C(1610625024), // LL_MM 1683 UINT64_C(1610625024), // LL_MMR6 1684 UINT64_C(2080374838), // LL_R6 1685 UINT64_C(5), // LSA 1686 UINT64_C(15), // LSA_MMR6 1687 UINT64_C(5), // LSA_R6 1688 UINT64_C(268435456), // LUI_MMR6 1689 UINT64_C(1275068421), // LUXC1 1690 UINT64_C(1275068421), // LUXC164 1691 UINT64_C(1409286472), // LUXC1_MM 1692 UINT64_C(1006632960), // LUi 1693 UINT64_C(1006632960), // LUi64 1694 UINT64_C(1101004800), // LUi_MM 1695 UINT64_C(2348810240), // LW 1696 UINT64_C(26624), // LW16_MM 1697 UINT64_C(2348810240), // LW64 1698 UINT64_C(3288334336), // LWC1 1699 UINT64_C(2617245696), // LWC1_MM 1700 UINT64_C(3355443200), // LWC2 1701 UINT64_C(536870912), // LWC2_MMR6 1702 UINT64_C(1228931072), // LWC2_R6 1703 UINT64_C(3422552064), // LWC3 1704 UINT64_C(2348810240), // LWDSP 1705 UINT64_C(4227858432), // LWDSP_MM 1706 UINT64_C(2080374831), // LWE 1707 UINT64_C(1610640896), // LWE_MM 1708 UINT64_C(25600), // LWGP_MM 1709 UINT64_C(2281701376), // LWL 1710 UINT64_C(2281701376), // LWL64 1711 UINT64_C(2080374809), // LWLE 1712 UINT64_C(1610638336), // LWLE_MM 1713 UINT64_C(1610612736), // LWL_MM 1714 UINT64_C(17664), // LWM16_MM 1715 UINT64_C(17410), // LWM16_MMR6 1716 UINT64_C(536891392), // LWM32_MM 1717 UINT64_C(3959947264), // LWPC 1718 UINT64_C(2013790208), // LWPC_MMR6 1719 UINT64_C(536875008), // LWP_MM 1720 UINT64_C(2550136832), // LWR 1721 UINT64_C(2550136832), // LWR64 1722 UINT64_C(2080374810), // LWRE 1723 UINT64_C(1610638848), // LWRE_MM 1724 UINT64_C(1610616832), // LWR_MM 1725 UINT64_C(18432), // LWSP_MM 1726 UINT64_C(3960471552), // LWUPC 1727 UINT64_C(1610670080), // LWU_MM 1728 UINT64_C(2080374794), // LWX 1729 UINT64_C(1275068416), // LWXC1 1730 UINT64_C(1409286216), // LWXC1_MM 1731 UINT64_C(280), // LWXS_MM 1732 UINT64_C(421), // LWX_MM 1733 UINT64_C(4227858432), // LW_MM 1734 UINT64_C(4227858432), // LW_MMR6 1735 UINT64_C(2617245696), // LWu 1736 UINT64_C(4026570752), // LbRxRyOffMemX16 1737 UINT64_C(4026572800), // LbuRxRyOffMemX16 1738 UINT64_C(4026572800), // LhRxRyOffMemX16 1739 UINT64_C(4026572800), // LhuRxRyOffMemX16 1740 UINT64_C(26624), // LiRxImm16 1741 UINT64_C(4026558464), // LiRxImmAlignX16 1742 UINT64_C(4026558464), // LiRxImmX16 1743 UINT64_C(45056), // LwRxPcTcp16 1744 UINT64_C(4026576896), // LwRxPcTcpX16 1745 UINT64_C(4026570752), // LwRxRyOffMemX16 1746 UINT64_C(4026568704), // LwRxSpImmX16 1747 UINT64_C(1879048192), // MADD 1748 UINT64_C(1176502296), // MADDF_D 1749 UINT64_C(1409287096), // MADDF_D_MMR6 1750 UINT64_C(1174405144), // MADDF_S 1751 UINT64_C(1409286584), // MADDF_S_MMR6 1752 UINT64_C(2067791900), // MADDR_Q_H 1753 UINT64_C(2069889052), // MADDR_Q_W 1754 UINT64_C(1879048193), // MADDU 1755 UINT64_C(1879048193), // MADDU_DSP 1756 UINT64_C(6844), // MADDU_DSP_MM 1757 UINT64_C(56124), // MADDU_MM 1758 UINT64_C(2021654546), // MADDV_B 1759 UINT64_C(2027946002), // MADDV_D 1760 UINT64_C(2023751698), // MADDV_H 1761 UINT64_C(2025848850), // MADDV_W 1762 UINT64_C(1275068449), // MADD_D32 1763 UINT64_C(1409286153), // MADD_D32_MM 1764 UINT64_C(1275068449), // MADD_D64 1765 UINT64_C(1879048192), // MADD_DSP 1766 UINT64_C(2748), // MADD_DSP_MM 1767 UINT64_C(52028), // MADD_MM 1768 UINT64_C(2034237468), // MADD_Q_H 1769 UINT64_C(2036334620), // MADD_Q_W 1770 UINT64_C(1275068448), // MADD_S 1771 UINT64_C(1409286145), // MADD_S_MM 1772 UINT64_C(2080375856), // MAQ_SA_W_PHL 1773 UINT64_C(14972), // MAQ_SA_W_PHL_MM 1774 UINT64_C(2080375984), // MAQ_SA_W_PHR 1775 UINT64_C(10876), // MAQ_SA_W_PHR_MM 1776 UINT64_C(2080376112), // MAQ_S_W_PHL 1777 UINT64_C(6780), // MAQ_S_W_PHL_MM 1778 UINT64_C(2080376240), // MAQ_S_W_PHR 1779 UINT64_C(2684), // MAQ_S_W_PHR_MM 1780 UINT64_C(1176502303), // MAXA_D 1781 UINT64_C(1409286699), // MAXA_D_MMR6 1782 UINT64_C(1174405151), // MAXA_S 1783 UINT64_C(1409286187), // MAXA_S_MMR6 1784 UINT64_C(2030043142), // MAXI_S_B 1785 UINT64_C(2036334598), // MAXI_S_D 1786 UINT64_C(2032140294), // MAXI_S_H 1787 UINT64_C(2034237446), // MAXI_S_W 1788 UINT64_C(2038431750), // MAXI_U_B 1789 UINT64_C(2044723206), // MAXI_U_D 1790 UINT64_C(2040528902), // MAXI_U_H 1791 UINT64_C(2042626054), // MAXI_U_W 1792 UINT64_C(2063597582), // MAX_A_B 1793 UINT64_C(2069889038), // MAX_A_D 1794 UINT64_C(2065694734), // MAX_A_H 1795 UINT64_C(2067791886), // MAX_A_W 1796 UINT64_C(1176502301), // MAX_D 1797 UINT64_C(1409286667), // MAX_D_MMR6 1798 UINT64_C(1174405149), // MAX_S 1799 UINT64_C(2030043150), // MAX_S_B 1800 UINT64_C(2036334606), // MAX_S_D 1801 UINT64_C(2032140302), // MAX_S_H 1802 UINT64_C(1409286155), // MAX_S_MMR6 1803 UINT64_C(2034237454), // MAX_S_W 1804 UINT64_C(2038431758), // MAX_U_B 1805 UINT64_C(2044723214), // MAX_U_D 1806 UINT64_C(2040528910), // MAX_U_H 1807 UINT64_C(2042626062), // MAX_U_W 1808 UINT64_C(1073741824), // MFC0 1809 UINT64_C(252), // MFC0_MMR6 1810 UINT64_C(1140850688), // MFC1 1811 UINT64_C(1140850688), // MFC1_D64 1812 UINT64_C(1409294395), // MFC1_MM 1813 UINT64_C(1409294395), // MFC1_MMR6 1814 UINT64_C(1207959552), // MFC2 1815 UINT64_C(19772), // MFC2_MMR6 1816 UINT64_C(1080033280), // MFGC0 1817 UINT64_C(1276), // MFGC0_MM 1818 UINT64_C(244), // MFHC0_MMR6 1819 UINT64_C(1147142144), // MFHC1_D32 1820 UINT64_C(1409298491), // MFHC1_D32_MM 1821 UINT64_C(1147142144), // MFHC1_D64 1822 UINT64_C(1409298491), // MFHC1_D64_MM 1823 UINT64_C(36156), // MFHC2_MMR6 1824 UINT64_C(1080034304), // MFHGC0 1825 UINT64_C(1268), // MFHGC0_MM 1826 UINT64_C(16), // MFHI 1827 UINT64_C(17920), // MFHI16_MM 1828 UINT64_C(16), // MFHI64 1829 UINT64_C(16), // MFHI_DSP 1830 UINT64_C(124), // MFHI_DSP_MM 1831 UINT64_C(3452), // MFHI_MM 1832 UINT64_C(18), // MFLO 1833 UINT64_C(17984), // MFLO16_MM 1834 UINT64_C(18), // MFLO64 1835 UINT64_C(18), // MFLO_DSP 1836 UINT64_C(4220), // MFLO_DSP_MM 1837 UINT64_C(7548), // MFLO_MM 1838 UINT64_C(1090519040), // MFTR 1839 UINT64_C(1176502302), // MINA_D 1840 UINT64_C(1409286691), // MINA_D_MMR6 1841 UINT64_C(1174405150), // MINA_S 1842 UINT64_C(1409286179), // MINA_S_MMR6 1843 UINT64_C(2046820358), // MINI_S_B 1844 UINT64_C(2053111814), // MINI_S_D 1845 UINT64_C(2048917510), // MINI_S_H 1846 UINT64_C(2051014662), // MINI_S_W 1847 UINT64_C(2055208966), // MINI_U_B 1848 UINT64_C(2061500422), // MINI_U_D 1849 UINT64_C(2057306118), // MINI_U_H 1850 UINT64_C(2059403270), // MINI_U_W 1851 UINT64_C(2071986190), // MIN_A_B 1852 UINT64_C(2078277646), // MIN_A_D 1853 UINT64_C(2074083342), // MIN_A_H 1854 UINT64_C(2076180494), // MIN_A_W 1855 UINT64_C(1176502300), // MIN_D 1856 UINT64_C(1409286659), // MIN_D_MMR6 1857 UINT64_C(1174405148), // MIN_S 1858 UINT64_C(2046820366), // MIN_S_B 1859 UINT64_C(2053111822), // MIN_S_D 1860 UINT64_C(2048917518), // MIN_S_H 1861 UINT64_C(1409286147), // MIN_S_MMR6 1862 UINT64_C(2051014670), // MIN_S_W 1863 UINT64_C(2055208974), // MIN_U_B 1864 UINT64_C(2061500430), // MIN_U_D 1865 UINT64_C(2057306126), // MIN_U_H 1866 UINT64_C(2059403278), // MIN_U_W 1867 UINT64_C(218), // MOD 1868 UINT64_C(2080375952), // MODSUB 1869 UINT64_C(661), // MODSUB_MM 1870 UINT64_C(219), // MODU 1871 UINT64_C(472), // MODU_MMR6 1872 UINT64_C(344), // MOD_MMR6 1873 UINT64_C(2063597586), // MOD_S_B 1874 UINT64_C(2069889042), // MOD_S_D 1875 UINT64_C(2065694738), // MOD_S_H 1876 UINT64_C(2067791890), // MOD_S_W 1877 UINT64_C(2071986194), // MOD_U_B 1878 UINT64_C(2078277650), // MOD_U_D 1879 UINT64_C(2074083346), // MOD_U_H 1880 UINT64_C(2076180498), // MOD_U_W 1881 UINT64_C(3072), // MOVE16_MM 1882 UINT64_C(3072), // MOVE16_MMR6 1883 UINT64_C(33792), // MOVEP_MM 1884 UINT64_C(17412), // MOVEP_MMR6 1885 UINT64_C(2025717785), // MOVE_V 1886 UINT64_C(1176502289), // MOVF_D32 1887 UINT64_C(1409286688), // MOVF_D32_MM 1888 UINT64_C(1176502289), // MOVF_D64 1889 UINT64_C(1), // MOVF_I 1890 UINT64_C(1), // MOVF_I64 1891 UINT64_C(1409286523), // MOVF_I_MM 1892 UINT64_C(1174405137), // MOVF_S 1893 UINT64_C(1409286176), // MOVF_S_MM 1894 UINT64_C(1176502291), // MOVN_I64_D64 1895 UINT64_C(11), // MOVN_I64_I 1896 UINT64_C(11), // MOVN_I64_I64 1897 UINT64_C(1174405139), // MOVN_I64_S 1898 UINT64_C(1176502291), // MOVN_I_D32 1899 UINT64_C(1409286456), // MOVN_I_D32_MM 1900 UINT64_C(1176502291), // MOVN_I_D64 1901 UINT64_C(11), // MOVN_I_I 1902 UINT64_C(11), // MOVN_I_I64 1903 UINT64_C(24), // MOVN_I_MM 1904 UINT64_C(1174405139), // MOVN_I_S 1905 UINT64_C(1409286200), // MOVN_I_S_MM 1906 UINT64_C(1176567825), // MOVT_D32 1907 UINT64_C(1409286752), // MOVT_D32_MM 1908 UINT64_C(1176567825), // MOVT_D64 1909 UINT64_C(65537), // MOVT_I 1910 UINT64_C(65537), // MOVT_I64 1911 UINT64_C(1409288571), // MOVT_I_MM 1912 UINT64_C(1174470673), // MOVT_S 1913 UINT64_C(1409286240), // MOVT_S_MM 1914 UINT64_C(1176502290), // MOVZ_I64_D64 1915 UINT64_C(10), // MOVZ_I64_I 1916 UINT64_C(10), // MOVZ_I64_I64 1917 UINT64_C(1174405138), // MOVZ_I64_S 1918 UINT64_C(1176502290), // MOVZ_I_D32 1919 UINT64_C(1409286520), // MOVZ_I_D32_MM 1920 UINT64_C(1176502290), // MOVZ_I_D64 1921 UINT64_C(10), // MOVZ_I_I 1922 UINT64_C(10), // MOVZ_I_I64 1923 UINT64_C(88), // MOVZ_I_MM 1924 UINT64_C(1174405138), // MOVZ_I_S 1925 UINT64_C(1409286264), // MOVZ_I_S_MM 1926 UINT64_C(1879048196), // MSUB 1927 UINT64_C(1176502297), // MSUBF_D 1928 UINT64_C(1409287160), // MSUBF_D_MMR6 1929 UINT64_C(1174405145), // MSUBF_S 1930 UINT64_C(1409286648), // MSUBF_S_MMR6 1931 UINT64_C(2071986204), // MSUBR_Q_H 1932 UINT64_C(2074083356), // MSUBR_Q_W 1933 UINT64_C(1879048197), // MSUBU 1934 UINT64_C(1879048197), // MSUBU_DSP 1935 UINT64_C(15036), // MSUBU_DSP_MM 1936 UINT64_C(64316), // MSUBU_MM 1937 UINT64_C(2030043154), // MSUBV_B 1938 UINT64_C(2036334610), // MSUBV_D 1939 UINT64_C(2032140306), // MSUBV_H 1940 UINT64_C(2034237458), // MSUBV_W 1941 UINT64_C(1275068457), // MSUB_D32 1942 UINT64_C(1409286185), // MSUB_D32_MM 1943 UINT64_C(1275068457), // MSUB_D64 1944 UINT64_C(1879048196), // MSUB_DSP 1945 UINT64_C(10940), // MSUB_DSP_MM 1946 UINT64_C(60220), // MSUB_MM 1947 UINT64_C(2038431772), // MSUB_Q_H 1948 UINT64_C(2040528924), // MSUB_Q_W 1949 UINT64_C(1275068456), // MSUB_S 1950 UINT64_C(1409286177), // MSUB_S_MM 1951 UINT64_C(1082130432), // MTC0 1952 UINT64_C(764), // MTC0_MMR6 1953 UINT64_C(1149239296), // MTC1 1954 UINT64_C(1149239296), // MTC1_D64 1955 UINT64_C(1409296443), // MTC1_MM 1956 UINT64_C(1409296443), // MTC1_MMR6 1957 UINT64_C(1216348160), // MTC2 1958 UINT64_C(23868), // MTC2_MMR6 1959 UINT64_C(1080033792), // MTGC0 1960 UINT64_C(1788), // MTGC0_MM 1961 UINT64_C(756), // MTHC0_MMR6 1962 UINT64_C(1155530752), // MTHC1_D32 1963 UINT64_C(1409300539), // MTHC1_D32_MM 1964 UINT64_C(1155530752), // MTHC1_D64 1965 UINT64_C(1409300539), // MTHC1_D64_MM 1966 UINT64_C(40252), // MTHC2_MMR6 1967 UINT64_C(1080034816), // MTHGC0 1968 UINT64_C(1780), // MTHGC0_MM 1969 UINT64_C(17), // MTHI 1970 UINT64_C(17), // MTHI64 1971 UINT64_C(17), // MTHI_DSP 1972 UINT64_C(8316), // MTHI_DSP_MM 1973 UINT64_C(11644), // MTHI_MM 1974 UINT64_C(2080376824), // MTHLIP 1975 UINT64_C(636), // MTHLIP_MM 1976 UINT64_C(19), // MTLO 1977 UINT64_C(19), // MTLO64 1978 UINT64_C(19), // MTLO_DSP 1979 UINT64_C(12412), // MTLO_DSP_MM 1980 UINT64_C(15740), // MTLO_MM 1981 UINT64_C(1879048200), // MTM0 1982 UINT64_C(1879048204), // MTM1 1983 UINT64_C(1879048205), // MTM2 1984 UINT64_C(1879048201), // MTP0 1985 UINT64_C(1879048202), // MTP1 1986 UINT64_C(1879048203), // MTP2 1987 UINT64_C(1098907648), // MTTR 1988 UINT64_C(216), // MUH 1989 UINT64_C(217), // MUHU 1990 UINT64_C(216), // MUHU_MMR6 1991 UINT64_C(88), // MUH_MMR6 1992 UINT64_C(1879048194), // MUL 1993 UINT64_C(2080376592), // MULEQ_S_W_PHL 1994 UINT64_C(37), // MULEQ_S_W_PHL_MM 1995 UINT64_C(2080376656), // MULEQ_S_W_PHR 1996 UINT64_C(101), // MULEQ_S_W_PHR_MM 1997 UINT64_C(2080375184), // MULEU_S_PH_QBL 1998 UINT64_C(149), // MULEU_S_PH_QBL_MM 1999 UINT64_C(2080375248), // MULEU_S_PH_QBR 2000 UINT64_C(213), // MULEU_S_PH_QBR_MM 2001 UINT64_C(2080376784), // MULQ_RS_PH 2002 UINT64_C(277), // MULQ_RS_PH_MM 2003 UINT64_C(2080376280), // MULQ_RS_W 2004 UINT64_C(405), // MULQ_RS_W_MMR2 2005 UINT64_C(2080376720), // MULQ_S_PH 2006 UINT64_C(341), // MULQ_S_PH_MMR2 2007 UINT64_C(2080376216), // MULQ_S_W 2008 UINT64_C(469), // MULQ_S_W_MMR2 2009 UINT64_C(2063597596), // MULR_Q_H 2010 UINT64_C(2065694748), // MULR_Q_W 2011 UINT64_C(2080375216), // MULSAQ_S_W_PH 2012 UINT64_C(15548), // MULSAQ_S_W_PH_MM 2013 UINT64_C(2080374960), // MULSA_W_PH 2014 UINT64_C(11452), // MULSA_W_PH_MMR2 2015 UINT64_C(24), // MULT 2016 UINT64_C(25), // MULTU_DSP 2017 UINT64_C(7356), // MULTU_DSP_MM 2018 UINT64_C(24), // MULT_DSP 2019 UINT64_C(3260), // MULT_DSP_MM 2020 UINT64_C(35644), // MULT_MM 2021 UINT64_C(25), // MULTu 2022 UINT64_C(39740), // MULTu_MM 2023 UINT64_C(153), // MULU 2024 UINT64_C(152), // MULU_MMR6 2025 UINT64_C(2013265938), // MULV_B 2026 UINT64_C(2019557394), // MULV_D 2027 UINT64_C(2015363090), // MULV_H 2028 UINT64_C(2017460242), // MULV_W 2029 UINT64_C(528), // MUL_MM 2030 UINT64_C(24), // MUL_MMR6 2031 UINT64_C(2080375576), // MUL_PH 2032 UINT64_C(45), // MUL_PH_MMR2 2033 UINT64_C(2030043164), // MUL_Q_H 2034 UINT64_C(2032140316), // MUL_Q_W 2035 UINT64_C(152), // MUL_R6 2036 UINT64_C(2080375704), // MUL_S_PH 2037 UINT64_C(1069), // MUL_S_PH_MMR2 2038 UINT64_C(59408), // Mfhi16 2039 UINT64_C(59410), // Mflo16 2040 UINT64_C(25856), // Move32R16 2041 UINT64_C(26368), // MoveR3216 2042 UINT64_C(2064121886), // NLOC_B 2043 UINT64_C(2064318494), // NLOC_D 2044 UINT64_C(2064187422), // NLOC_H 2045 UINT64_C(2064252958), // NLOC_W 2046 UINT64_C(2064384030), // NLZC_B 2047 UINT64_C(2064580638), // NLZC_D 2048 UINT64_C(2064449566), // NLZC_H 2049 UINT64_C(2064515102), // NLZC_W 2050 UINT64_C(1275068465), // NMADD_D32 2051 UINT64_C(1409286154), // NMADD_D32_MM 2052 UINT64_C(1275068465), // NMADD_D64 2053 UINT64_C(1275068464), // NMADD_S 2054 UINT64_C(1409286146), // NMADD_S_MM 2055 UINT64_C(1275068473), // NMSUB_D32 2056 UINT64_C(1409286186), // NMSUB_D32_MM 2057 UINT64_C(1275068473), // NMSUB_D64 2058 UINT64_C(1275068472), // NMSUB_S 2059 UINT64_C(1409286178), // NMSUB_S_MM 2060 UINT64_C(39), // NOR 2061 UINT64_C(39), // NOR64 2062 UINT64_C(2046820352), // NORI_B 2063 UINT64_C(720), // NOR_MM 2064 UINT64_C(720), // NOR_MMR6 2065 UINT64_C(2017460254), // NOR_V 2066 UINT64_C(17408), // NOT16_MM 2067 UINT64_C(17408), // NOT16_MMR6 2068 UINT64_C(59421), // NegRxRy16 2069 UINT64_C(59407), // NotRxRy16 2070 UINT64_C(37), // OR 2071 UINT64_C(17600), // OR16_MM 2072 UINT64_C(17417), // OR16_MMR6 2073 UINT64_C(37), // OR64 2074 UINT64_C(2030043136), // ORI_B 2075 UINT64_C(1342177280), // ORI_MMR6 2076 UINT64_C(656), // OR_MM 2077 UINT64_C(656), // OR_MMR6 2078 UINT64_C(2015363102), // OR_V 2079 UINT64_C(872415232), // ORi 2080 UINT64_C(872415232), // ORi64 2081 UINT64_C(1342177280), // ORi_MM 2082 UINT64_C(59405), // OrRxRxRy16 2083 UINT64_C(2080375697), // PACKRL_PH 2084 UINT64_C(429), // PACKRL_PH_MM 2085 UINT64_C(320), // PAUSE 2086 UINT64_C(10240), // PAUSE_MM 2087 UINT64_C(10240), // PAUSE_MMR6 2088 UINT64_C(2030043156), // PCKEV_B 2089 UINT64_C(2036334612), // PCKEV_D 2090 UINT64_C(2032140308), // PCKEV_H 2091 UINT64_C(2034237460), // PCKEV_W 2092 UINT64_C(2038431764), // PCKOD_B 2093 UINT64_C(2044723220), // PCKOD_D 2094 UINT64_C(2040528916), // PCKOD_H 2095 UINT64_C(2042626068), // PCKOD_W 2096 UINT64_C(2063859742), // PCNT_B 2097 UINT64_C(2064056350), // PCNT_D 2098 UINT64_C(2063925278), // PCNT_H 2099 UINT64_C(2063990814), // PCNT_W 2100 UINT64_C(2080375505), // PICK_PH 2101 UINT64_C(557), // PICK_PH_MM 2102 UINT64_C(2080374993), // PICK_QB 2103 UINT64_C(493), // PICK_QB_MM 2104 UINT64_C(1879048236), // POP 2105 UINT64_C(2080375058), // PRECEQU_PH_QBL 2106 UINT64_C(2080375186), // PRECEQU_PH_QBLA 2107 UINT64_C(29500), // PRECEQU_PH_QBLA_MM 2108 UINT64_C(28988), // PRECEQU_PH_QBL_MM 2109 UINT64_C(2080375122), // PRECEQU_PH_QBR 2110 UINT64_C(2080375250), // PRECEQU_PH_QBRA 2111 UINT64_C(37692), // PRECEQU_PH_QBRA_MM 2112 UINT64_C(37180), // PRECEQU_PH_QBR_MM 2113 UINT64_C(2080375570), // PRECEQ_W_PHL 2114 UINT64_C(20796), // PRECEQ_W_PHL_MM 2115 UINT64_C(2080375634), // PRECEQ_W_PHR 2116 UINT64_C(24892), // PRECEQ_W_PHR_MM 2117 UINT64_C(2080376594), // PRECEU_PH_QBL 2118 UINT64_C(2080376722), // PRECEU_PH_QBLA 2119 UINT64_C(45884), // PRECEU_PH_QBLA_MM 2120 UINT64_C(45372), // PRECEU_PH_QBL_MM 2121 UINT64_C(2080376658), // PRECEU_PH_QBR 2122 UINT64_C(2080376786), // PRECEU_PH_QBRA 2123 UINT64_C(54076), // PRECEU_PH_QBRA_MM 2124 UINT64_C(53564), // PRECEU_PH_QBR_MM 2125 UINT64_C(2080375761), // PRECRQU_S_QB_PH 2126 UINT64_C(365), // PRECRQU_S_QB_PH_MM 2127 UINT64_C(2080376081), // PRECRQ_PH_W 2128 UINT64_C(237), // PRECRQ_PH_W_MM 2129 UINT64_C(2080375569), // PRECRQ_QB_PH 2130 UINT64_C(173), // PRECRQ_QB_PH_MM 2131 UINT64_C(2080376145), // PRECRQ_RS_PH_W 2132 UINT64_C(301), // PRECRQ_RS_PH_W_MM 2133 UINT64_C(2080375633), // PRECR_QB_PH 2134 UINT64_C(109), // PRECR_QB_PH_MMR2 2135 UINT64_C(2080376721), // PRECR_SRA_PH_W 2136 UINT64_C(973), // PRECR_SRA_PH_W_MMR2 2137 UINT64_C(2080376785), // PRECR_SRA_R_PH_W 2138 UINT64_C(1997), // PRECR_SRA_R_PH_W_MMR2 2139 UINT64_C(3422552064), // PREF 2140 UINT64_C(2080374819), // PREFE 2141 UINT64_C(1610654720), // PREFE_MM 2142 UINT64_C(1409286560), // PREFX_MM 2143 UINT64_C(1610620928), // PREF_MM 2144 UINT64_C(1610620928), // PREF_MMR6 2145 UINT64_C(2080374837), // PREF_R6 2146 UINT64_C(2080374897), // PREPEND 2147 UINT64_C(597), // PREPEND_MMR2 2148 UINT64_C(2080376080), // RADDU_W_QB 2149 UINT64_C(61756), // RADDU_W_QB_MM 2150 UINT64_C(2080375992), // RDDSP 2151 UINT64_C(1660), // RDDSP_MM 2152 UINT64_C(2080374843), // RDHWR 2153 UINT64_C(2080374843), // RDHWR64 2154 UINT64_C(27452), // RDHWR_MM 2155 UINT64_C(448), // RDHWR_MMR6 2156 UINT64_C(57724), // RDPGPR_MMR6 2157 UINT64_C(1176502293), // RECIP_D32 2158 UINT64_C(1409307195), // RECIP_D32_MM 2159 UINT64_C(1176502293), // RECIP_D64 2160 UINT64_C(1409307195), // RECIP_D64_MM 2161 UINT64_C(1174405141), // RECIP_S 2162 UINT64_C(1409290811), // RECIP_S_MM 2163 UINT64_C(2080375506), // REPLV_PH 2164 UINT64_C(828), // REPLV_PH_MM 2165 UINT64_C(2080374994), // REPLV_QB 2166 UINT64_C(4924), // REPLV_QB_MM 2167 UINT64_C(2080375442), // REPL_PH 2168 UINT64_C(61), // REPL_PH_MM 2169 UINT64_C(2080374930), // REPL_QB 2170 UINT64_C(1532), // REPL_QB_MM 2171 UINT64_C(1176502298), // RINT_D 2172 UINT64_C(1409286688), // RINT_D_MMR6 2173 UINT64_C(1174405146), // RINT_S 2174 UINT64_C(1409286176), // RINT_S_MMR6 2175 UINT64_C(2097154), // ROTR 2176 UINT64_C(70), // ROTRV 2177 UINT64_C(208), // ROTRV_MM 2178 UINT64_C(192), // ROTR_MM 2179 UINT64_C(1176502280), // ROUND_L_D64 2180 UINT64_C(1409315643), // ROUND_L_D_MMR6 2181 UINT64_C(1174405128), // ROUND_L_S 2182 UINT64_C(1409299259), // ROUND_L_S_MMR6 2183 UINT64_C(1176502284), // ROUND_W_D32 2184 UINT64_C(1176502284), // ROUND_W_D64 2185 UINT64_C(1409317691), // ROUND_W_D_MMR6 2186 UINT64_C(1409317691), // ROUND_W_MM 2187 UINT64_C(1174405132), // ROUND_W_S 2188 UINT64_C(1409301307), // ROUND_W_S_MM 2189 UINT64_C(1409301307), // ROUND_W_S_MMR6 2190 UINT64_C(1176502294), // RSQRT_D32 2191 UINT64_C(1409303099), // RSQRT_D32_MM 2192 UINT64_C(1176502294), // RSQRT_D64 2193 UINT64_C(1409303099), // RSQRT_D64_MM 2194 UINT64_C(1174405142), // RSQRT_S 2195 UINT64_C(1409286715), // RSQRT_S_MM 2196 UINT64_C(25728), // Restore16 2197 UINT64_C(25728), // RestoreX16 2198 UINT64_C(2020605962), // SAT_S_B 2199 UINT64_C(2013265930), // SAT_S_D 2200 UINT64_C(2019557386), // SAT_S_H 2201 UINT64_C(2017460234), // SAT_S_W 2202 UINT64_C(2028994570), // SAT_U_B 2203 UINT64_C(2021654538), // SAT_U_D 2204 UINT64_C(2027945994), // SAT_U_H 2205 UINT64_C(2025848842), // SAT_U_W 2206 UINT64_C(2684354560), // SB 2207 UINT64_C(34816), // SB16_MM 2208 UINT64_C(34816), // SB16_MMR6 2209 UINT64_C(2684354560), // SB64 2210 UINT64_C(2080374812), // SBE 2211 UINT64_C(1610655744), // SBE_MM 2212 UINT64_C(402653184), // SB_MM 2213 UINT64_C(402653184), // SB_MMR6 2214 UINT64_C(3758096384), // SC 2215 UINT64_C(3758096384), // SC64 2216 UINT64_C(2080374822), // SC64_R6 2217 UINT64_C(4026531840), // SCD 2218 UINT64_C(2080374823), // SCD_R6 2219 UINT64_C(2080374814), // SCE 2220 UINT64_C(1610656768), // SCE_MM 2221 UINT64_C(1610657792), // SC_MM 2222 UINT64_C(1610657792), // SC_MMR6 2223 UINT64_C(2080374822), // SC_R6 2224 UINT64_C(4227858432), // SD 2225 UINT64_C(1879048255), // SDBBP 2226 UINT64_C(18112), // SDBBP16_MM 2227 UINT64_C(17467), // SDBBP16_MMR6 2228 UINT64_C(56188), // SDBBP_MM 2229 UINT64_C(56188), // SDBBP_MMR6 2230 UINT64_C(14), // SDBBP_R6 2231 UINT64_C(4093640704), // SDC1 2232 UINT64_C(4093640704), // SDC164 2233 UINT64_C(3087007744), // SDC1_D64_MMR6 2234 UINT64_C(3087007744), // SDC1_MM 2235 UINT64_C(4160749568), // SDC2 2236 UINT64_C(536911872), // SDC2_MMR6 2237 UINT64_C(1239416832), // SDC2_R6 2238 UINT64_C(4227858432), // SDC3 2239 UINT64_C(26), // SDIV 2240 UINT64_C(43836), // SDIV_MM 2241 UINT64_C(2952790016), // SDL 2242 UINT64_C(3019898880), // SDR 2243 UINT64_C(1275068425), // SDXC1 2244 UINT64_C(1275068425), // SDXC164 2245 UINT64_C(2080375840), // SEB 2246 UINT64_C(2080375840), // SEB64 2247 UINT64_C(11068), // SEB_MM 2248 UINT64_C(2080376352), // SEH 2249 UINT64_C(2080376352), // SEH64 2250 UINT64_C(15164), // SEH_MM 2251 UINT64_C(53), // SELEQZ 2252 UINT64_C(53), // SELEQZ64 2253 UINT64_C(1176502292), // SELEQZ_D 2254 UINT64_C(1409286712), // SELEQZ_D_MMR6 2255 UINT64_C(320), // SELEQZ_MMR6 2256 UINT64_C(1174405140), // SELEQZ_S 2257 UINT64_C(1409286200), // SELEQZ_S_MMR6 2258 UINT64_C(55), // SELNEZ 2259 UINT64_C(55), // SELNEZ64 2260 UINT64_C(1176502295), // SELNEZ_D 2261 UINT64_C(1409286776), // SELNEZ_D_MMR6 2262 UINT64_C(384), // SELNEZ_MMR6 2263 UINT64_C(1174405143), // SELNEZ_S 2264 UINT64_C(1409286264), // SELNEZ_S_MMR6 2265 UINT64_C(1176502288), // SEL_D 2266 UINT64_C(1409286840), // SEL_D_MMR6 2267 UINT64_C(1174405136), // SEL_S 2268 UINT64_C(1409286328), // SEL_S_MMR6 2269 UINT64_C(1879048234), // SEQ 2270 UINT64_C(1879048238), // SEQi 2271 UINT64_C(2751463424), // SH 2272 UINT64_C(43008), // SH16_MM 2273 UINT64_C(43008), // SH16_MMR6 2274 UINT64_C(2751463424), // SH64 2275 UINT64_C(2080374813), // SHE 2276 UINT64_C(1610656256), // SHE_MM 2277 UINT64_C(2013265922), // SHF_B 2278 UINT64_C(2030043138), // SHF_H 2279 UINT64_C(2046820354), // SHF_W 2280 UINT64_C(2080376504), // SHILO 2281 UINT64_C(2080376568), // SHILOV 2282 UINT64_C(4732), // SHILOV_MM 2283 UINT64_C(29), // SHILO_MM 2284 UINT64_C(2080375443), // SHLLV_PH 2285 UINT64_C(14), // SHLLV_PH_MM 2286 UINT64_C(2080374931), // SHLLV_QB 2287 UINT64_C(917), // SHLLV_QB_MM 2288 UINT64_C(2080375699), // SHLLV_S_PH 2289 UINT64_C(1038), // SHLLV_S_PH_MM 2290 UINT64_C(2080376211), // SHLLV_S_W 2291 UINT64_C(981), // SHLLV_S_W_MM 2292 UINT64_C(2080375315), // SHLL_PH 2293 UINT64_C(949), // SHLL_PH_MM 2294 UINT64_C(2080374803), // SHLL_QB 2295 UINT64_C(2172), // SHLL_QB_MM 2296 UINT64_C(2080375571), // SHLL_S_PH 2297 UINT64_C(2997), // SHLL_S_PH_MM 2298 UINT64_C(2080376083), // SHLL_S_W 2299 UINT64_C(1013), // SHLL_S_W_MM 2300 UINT64_C(2080375507), // SHRAV_PH 2301 UINT64_C(397), // SHRAV_PH_MM 2302 UINT64_C(2080375187), // SHRAV_QB 2303 UINT64_C(461), // SHRAV_QB_MMR2 2304 UINT64_C(2080375763), // SHRAV_R_PH 2305 UINT64_C(1421), // SHRAV_R_PH_MM 2306 UINT64_C(2080375251), // SHRAV_R_QB 2307 UINT64_C(1485), // SHRAV_R_QB_MMR2 2308 UINT64_C(2080376275), // SHRAV_R_W 2309 UINT64_C(725), // SHRAV_R_W_MM 2310 UINT64_C(2080375379), // SHRA_PH 2311 UINT64_C(821), // SHRA_PH_MM 2312 UINT64_C(2080375059), // SHRA_QB 2313 UINT64_C(508), // SHRA_QB_MMR2 2314 UINT64_C(2080375635), // SHRA_R_PH 2315 UINT64_C(1845), // SHRA_R_PH_MM 2316 UINT64_C(2080375123), // SHRA_R_QB 2317 UINT64_C(4604), // SHRA_R_QB_MMR2 2318 UINT64_C(2080376147), // SHRA_R_W 2319 UINT64_C(757), // SHRA_R_W_MM 2320 UINT64_C(2080376531), // SHRLV_PH 2321 UINT64_C(789), // SHRLV_PH_MMR2 2322 UINT64_C(2080374995), // SHRLV_QB 2323 UINT64_C(853), // SHRLV_QB_MM 2324 UINT64_C(2080376403), // SHRL_PH 2325 UINT64_C(1020), // SHRL_PH_MMR2 2326 UINT64_C(2080374867), // SHRL_QB 2327 UINT64_C(6268), // SHRL_QB_MM 2328 UINT64_C(939524096), // SH_MM 2329 UINT64_C(939524096), // SH_MMR6 2330 UINT64_C(2013265945), // SLDI_B 2331 UINT64_C(2016935961), // SLDI_D 2332 UINT64_C(2015363097), // SLDI_H 2333 UINT64_C(2016411673), // SLDI_W 2334 UINT64_C(2013265940), // SLD_B 2335 UINT64_C(2019557396), // SLD_D 2336 UINT64_C(2015363092), // SLD_H 2337 UINT64_C(2017460244), // SLD_W 2338 UINT64_C(0), // SLL 2339 UINT64_C(9216), // SLL16_MM 2340 UINT64_C(9216), // SLL16_MMR6 2341 UINT64_C(0), // SLL64_32 2342 UINT64_C(0), // SLL64_64 2343 UINT64_C(2020605961), // SLLI_B 2344 UINT64_C(2013265929), // SLLI_D 2345 UINT64_C(2019557385), // SLLI_H 2346 UINT64_C(2017460233), // SLLI_W 2347 UINT64_C(4), // SLLV 2348 UINT64_C(16), // SLLV_MM 2349 UINT64_C(2013265933), // SLL_B 2350 UINT64_C(2019557389), // SLL_D 2351 UINT64_C(2015363085), // SLL_H 2352 UINT64_C(0), // SLL_MM 2353 UINT64_C(0), // SLL_MMR6 2354 UINT64_C(2017460237), // SLL_W 2355 UINT64_C(42), // SLT 2356 UINT64_C(42), // SLT64 2357 UINT64_C(848), // SLT_MM 2358 UINT64_C(671088640), // SLTi 2359 UINT64_C(671088640), // SLTi64 2360 UINT64_C(2415919104), // SLTi_MM 2361 UINT64_C(738197504), // SLTiu 2362 UINT64_C(738197504), // SLTiu64 2363 UINT64_C(2952790016), // SLTiu_MM 2364 UINT64_C(43), // SLTu 2365 UINT64_C(43), // SLTu64 2366 UINT64_C(912), // SLTu_MM 2367 UINT64_C(1879048235), // SNE 2368 UINT64_C(1879048239), // SNEi 2369 UINT64_C(2017460249), // SPLATI_B 2370 UINT64_C(2021130265), // SPLATI_D 2371 UINT64_C(2019557401), // SPLATI_H 2372 UINT64_C(2020605977), // SPLATI_W 2373 UINT64_C(2021654548), // SPLAT_B 2374 UINT64_C(2027946004), // SPLAT_D 2375 UINT64_C(2023751700), // SPLAT_H 2376 UINT64_C(2025848852), // SPLAT_W 2377 UINT64_C(3), // SRA 2378 UINT64_C(2028994569), // SRAI_B 2379 UINT64_C(2021654537), // SRAI_D 2380 UINT64_C(2027945993), // SRAI_H 2381 UINT64_C(2025848841), // SRAI_W 2382 UINT64_C(2037383178), // SRARI_B 2383 UINT64_C(2030043146), // SRARI_D 2384 UINT64_C(2036334602), // SRARI_H 2385 UINT64_C(2034237450), // SRARI_W 2386 UINT64_C(2021654549), // SRAR_B 2387 UINT64_C(2027946005), // SRAR_D 2388 UINT64_C(2023751701), // SRAR_H 2389 UINT64_C(2025848853), // SRAR_W 2390 UINT64_C(7), // SRAV 2391 UINT64_C(144), // SRAV_MM 2392 UINT64_C(2021654541), // SRA_B 2393 UINT64_C(2027945997), // SRA_D 2394 UINT64_C(2023751693), // SRA_H 2395 UINT64_C(128), // SRA_MM 2396 UINT64_C(2025848845), // SRA_W 2397 UINT64_C(2), // SRL 2398 UINT64_C(9217), // SRL16_MM 2399 UINT64_C(9217), // SRL16_MMR6 2400 UINT64_C(2037383177), // SRLI_B 2401 UINT64_C(2030043145), // SRLI_D 2402 UINT64_C(2036334601), // SRLI_H 2403 UINT64_C(2034237449), // SRLI_W 2404 UINT64_C(2045771786), // SRLRI_B 2405 UINT64_C(2038431754), // SRLRI_D 2406 UINT64_C(2044723210), // SRLRI_H 2407 UINT64_C(2042626058), // SRLRI_W 2408 UINT64_C(2030043157), // SRLR_B 2409 UINT64_C(2036334613), // SRLR_D 2410 UINT64_C(2032140309), // SRLR_H 2411 UINT64_C(2034237461), // SRLR_W 2412 UINT64_C(6), // SRLV 2413 UINT64_C(80), // SRLV_MM 2414 UINT64_C(2030043149), // SRL_B 2415 UINT64_C(2036334605), // SRL_D 2416 UINT64_C(2032140301), // SRL_H 2417 UINT64_C(64), // SRL_MM 2418 UINT64_C(2034237453), // SRL_W 2419 UINT64_C(64), // SSNOP 2420 UINT64_C(2048), // SSNOP_MM 2421 UINT64_C(2048), // SSNOP_MMR6 2422 UINT64_C(2013265956), // ST_B 2423 UINT64_C(2013265959), // ST_D 2424 UINT64_C(2013265957), // ST_H 2425 UINT64_C(2013265958), // ST_W 2426 UINT64_C(34), // SUB 2427 UINT64_C(2080375384), // SUBQH_PH 2428 UINT64_C(589), // SUBQH_PH_MMR2 2429 UINT64_C(2080375512), // SUBQH_R_PH 2430 UINT64_C(1613), // SUBQH_R_PH_MMR2 2431 UINT64_C(2080376024), // SUBQH_R_W 2432 UINT64_C(1677), // SUBQH_R_W_MMR2 2433 UINT64_C(2080375896), // SUBQH_W 2434 UINT64_C(653), // SUBQH_W_MMR2 2435 UINT64_C(2080375504), // SUBQ_PH 2436 UINT64_C(525), // SUBQ_PH_MM 2437 UINT64_C(2080375760), // SUBQ_S_PH 2438 UINT64_C(1549), // SUBQ_S_PH_MM 2439 UINT64_C(2080376272), // SUBQ_S_W 2440 UINT64_C(837), // SUBQ_S_W_MM 2441 UINT64_C(2030043153), // SUBSUS_U_B 2442 UINT64_C(2036334609), // SUBSUS_U_D 2443 UINT64_C(2032140305), // SUBSUS_U_H 2444 UINT64_C(2034237457), // SUBSUS_U_W 2445 UINT64_C(2038431761), // SUBSUU_S_B 2446 UINT64_C(2044723217), // SUBSUU_S_D 2447 UINT64_C(2040528913), // SUBSUU_S_H 2448 UINT64_C(2042626065), // SUBSUU_S_W 2449 UINT64_C(2013265937), // SUBS_S_B 2450 UINT64_C(2019557393), // SUBS_S_D 2451 UINT64_C(2015363089), // SUBS_S_H 2452 UINT64_C(2017460241), // SUBS_S_W 2453 UINT64_C(2021654545), // SUBS_U_B 2454 UINT64_C(2027946001), // SUBS_U_D 2455 UINT64_C(2023751697), // SUBS_U_H 2456 UINT64_C(2025848849), // SUBS_U_W 2457 UINT64_C(1025), // SUBU16_MM 2458 UINT64_C(1025), // SUBU16_MMR6 2459 UINT64_C(2080374872), // SUBUH_QB 2460 UINT64_C(845), // SUBUH_QB_MMR2 2461 UINT64_C(2080375000), // SUBUH_R_QB 2462 UINT64_C(1869), // SUBUH_R_QB_MMR2 2463 UINT64_C(464), // SUBU_MMR6 2464 UINT64_C(2080375376), // SUBU_PH 2465 UINT64_C(781), // SUBU_PH_MMR2 2466 UINT64_C(2080374864), // SUBU_QB 2467 UINT64_C(717), // SUBU_QB_MM 2468 UINT64_C(2080375632), // SUBU_S_PH 2469 UINT64_C(1805), // SUBU_S_PH_MMR2 2470 UINT64_C(2080375120), // SUBU_S_QB 2471 UINT64_C(1741), // SUBU_S_QB_MM 2472 UINT64_C(2021654534), // SUBVI_B 2473 UINT64_C(2027945990), // SUBVI_D 2474 UINT64_C(2023751686), // SUBVI_H 2475 UINT64_C(2025848838), // SUBVI_W 2476 UINT64_C(2021654542), // SUBV_B 2477 UINT64_C(2027945998), // SUBV_D 2478 UINT64_C(2023751694), // SUBV_H 2479 UINT64_C(2025848846), // SUBV_W 2480 UINT64_C(400), // SUB_MM 2481 UINT64_C(400), // SUB_MMR6 2482 UINT64_C(35), // SUBu 2483 UINT64_C(464), // SUBu_MM 2484 UINT64_C(1275068429), // SUXC1 2485 UINT64_C(1275068429), // SUXC164 2486 UINT64_C(1409286536), // SUXC1_MM 2487 UINT64_C(2885681152), // SW 2488 UINT64_C(59392), // SW16_MM 2489 UINT64_C(59392), // SW16_MMR6 2490 UINT64_C(2885681152), // SW64 2491 UINT64_C(3825205248), // SWC1 2492 UINT64_C(2550136832), // SWC1_MM 2493 UINT64_C(3892314112), // SWC2 2494 UINT64_C(536903680), // SWC2_MMR6 2495 UINT64_C(1231028224), // SWC2_R6 2496 UINT64_C(3959422976), // SWC3 2497 UINT64_C(2885681152), // SWDSP 2498 UINT64_C(4160749568), // SWDSP_MM 2499 UINT64_C(2080374815), // SWE 2500 UINT64_C(1610657280), // SWE_MM 2501 UINT64_C(2818572288), // SWL 2502 UINT64_C(2818572288), // SWL64 2503 UINT64_C(2080374817), // SWLE 2504 UINT64_C(1610653696), // SWLE_MM 2505 UINT64_C(1610645504), // SWL_MM 2506 UINT64_C(17728), // SWM16_MM 2507 UINT64_C(17418), // SWM16_MMR6 2508 UINT64_C(536924160), // SWM32_MM 2509 UINT64_C(536907776), // SWP_MM 2510 UINT64_C(3087007744), // SWR 2511 UINT64_C(3087007744), // SWR64 2512 UINT64_C(2080374818), // SWRE 2513 UINT64_C(1610654208), // SWRE_MM 2514 UINT64_C(1610649600), // SWR_MM 2515 UINT64_C(51200), // SWSP_MM 2516 UINT64_C(51200), // SWSP_MMR6 2517 UINT64_C(1275068424), // SWXC1 2518 UINT64_C(1409286280), // SWXC1_MM 2519 UINT64_C(4160749568), // SW_MM 2520 UINT64_C(4160749568), // SW_MMR6 2521 UINT64_C(15), // SYNC 2522 UINT64_C(69140480), // SYNCI 2523 UINT64_C(1107296256), // SYNCI_MM 2524 UINT64_C(1098907648), // SYNCI_MMR6 2525 UINT64_C(27516), // SYNC_MM 2526 UINT64_C(27516), // SYNC_MMR6 2527 UINT64_C(12), // SYSCALL 2528 UINT64_C(35708), // SYSCALL_MM 2529 UINT64_C(25728), // Save16 2530 UINT64_C(25728), // SaveX16 2531 UINT64_C(4026580992), // SbRxRyOffMemX16 2532 UINT64_C(59537), // SebRx16 2533 UINT64_C(59569), // SehRx16 2534 UINT64_C(4026583040), // ShRxRyOffMemX16 2535 UINT64_C(4026544128), // SllX16 2536 UINT64_C(59396), // SllvRxRy16 2537 UINT64_C(59394), // SltRxRy16 2538 UINT64_C(20480), // SltiRxImm16 2539 UINT64_C(4026552320), // SltiRxImmX16 2540 UINT64_C(22528), // SltiuRxImm16 2541 UINT64_C(4026554368), // SltiuRxImmX16 2542 UINT64_C(59395), // SltuRxRy16 2543 UINT64_C(4026544131), // SraX16 2544 UINT64_C(59399), // SravRxRy16 2545 UINT64_C(4026544130), // SrlX16 2546 UINT64_C(59398), // SrlvRxRy16 2547 UINT64_C(57347), // SubuRxRyRz16 2548 UINT64_C(4026587136), // SwRxRyOffMemX16 2549 UINT64_C(4026585088), // SwRxSpImmX16 2550 UINT64_C(52), // TEQ 2551 UINT64_C(67895296), // TEQI 2552 UINT64_C(1103101952), // TEQI_MM 2553 UINT64_C(60), // TEQ_MM 2554 UINT64_C(48), // TGE 2555 UINT64_C(67633152), // TGEI 2556 UINT64_C(67698688), // TGEIU 2557 UINT64_C(1096810496), // TGEIU_MM 2558 UINT64_C(1092616192), // TGEI_MM 2559 UINT64_C(49), // TGEU 2560 UINT64_C(1084), // TGEU_MM 2561 UINT64_C(572), // TGE_MM 2562 UINT64_C(1107296267), // TLBGINV 2563 UINT64_C(1107296268), // TLBGINVF 2564 UINT64_C(20860), // TLBGINVF_MM 2565 UINT64_C(16764), // TLBGINV_MM 2566 UINT64_C(1107296272), // TLBGP 2567 UINT64_C(380), // TLBGP_MM 2568 UINT64_C(1107296265), // TLBGR 2569 UINT64_C(4476), // TLBGR_MM 2570 UINT64_C(1107296266), // TLBGWI 2571 UINT64_C(8572), // TLBGWI_MM 2572 UINT64_C(1107296270), // TLBGWR 2573 UINT64_C(12668), // TLBGWR_MM 2574 UINT64_C(1107296259), // TLBINV 2575 UINT64_C(1107296260), // TLBINVF 2576 UINT64_C(21372), // TLBINVF_MMR6 2577 UINT64_C(17276), // TLBINV_MMR6 2578 UINT64_C(1107296264), // TLBP 2579 UINT64_C(892), // TLBP_MM 2580 UINT64_C(1107296257), // TLBR 2581 UINT64_C(4988), // TLBR_MM 2582 UINT64_C(1107296258), // TLBWI 2583 UINT64_C(9084), // TLBWI_MM 2584 UINT64_C(1107296262), // TLBWR 2585 UINT64_C(13180), // TLBWR_MM 2586 UINT64_C(50), // TLT 2587 UINT64_C(67764224), // TLTI 2588 UINT64_C(1094713344), // TLTIU_MM 2589 UINT64_C(1090519040), // TLTI_MM 2590 UINT64_C(51), // TLTU 2591 UINT64_C(2620), // TLTU_MM 2592 UINT64_C(2108), // TLT_MM 2593 UINT64_C(54), // TNE 2594 UINT64_C(68026368), // TNEI 2595 UINT64_C(1098907648), // TNEI_MM 2596 UINT64_C(3132), // TNE_MM 2597 UINT64_C(1176502281), // TRUNC_L_D64 2598 UINT64_C(1409311547), // TRUNC_L_D_MMR6 2599 UINT64_C(1174405129), // TRUNC_L_S 2600 UINT64_C(1409295163), // TRUNC_L_S_MMR6 2601 UINT64_C(1176502285), // TRUNC_W_D32 2602 UINT64_C(1176502285), // TRUNC_W_D64 2603 UINT64_C(1409313595), // TRUNC_W_D_MMR6 2604 UINT64_C(1409313595), // TRUNC_W_MM 2605 UINT64_C(1174405133), // TRUNC_W_S 2606 UINT64_C(1409297211), // TRUNC_W_S_MM 2607 UINT64_C(1409297211), // TRUNC_W_S_MMR6 2608 UINT64_C(67829760), // TTLTIU 2609 UINT64_C(27), // UDIV 2610 UINT64_C(47932), // UDIV_MM 2611 UINT64_C(1879048209), // V3MULU 2612 UINT64_C(1879048208), // VMM0 2613 UINT64_C(1879048207), // VMULU 2614 UINT64_C(2013265941), // VSHF_B 2615 UINT64_C(2019557397), // VSHF_D 2616 UINT64_C(2015363093), // VSHF_H 2617 UINT64_C(2017460245), // VSHF_W 2618 UINT64_C(1107296288), // WAIT 2619 UINT64_C(37756), // WAIT_MM 2620 UINT64_C(37756), // WAIT_MMR6 2621 UINT64_C(2080376056), // WRDSP 2622 UINT64_C(5756), // WRDSP_MM 2623 UINT64_C(61820), // WRPGPR_MMR6 2624 UINT64_C(2080374944), // WSBH 2625 UINT64_C(31548), // WSBH_MM 2626 UINT64_C(31548), // WSBH_MMR6 2627 UINT64_C(38), // XOR 2628 UINT64_C(17472), // XOR16_MM 2629 UINT64_C(17416), // XOR16_MMR6 2630 UINT64_C(38), // XOR64 2631 UINT64_C(2063597568), // XORI_B 2632 UINT64_C(1879048192), // XORI_MMR6 2633 UINT64_C(784), // XOR_MM 2634 UINT64_C(784), // XOR_MMR6 2635 UINT64_C(2019557406), // XOR_V 2636 UINT64_C(939524096), // XORi 2637 UINT64_C(939524096), // XORi64 2638 UINT64_C(1879048192), // XORi_MM 2639 UINT64_C(59406), // XorRxRxRy16 2640 UINT64_C(2080374793), // YIELD 2641 UINT64_C(0) 2642 }; 2643 const unsigned opcode = MI.getOpcode(); 2644 uint64_t Value = InstBits[opcode]; 2645 uint64_t op = 0; 2646 (void)op; // suppress warning 2647 switch (opcode) { 2648 case Mips::Break16: 2649 case Mips::DERET: 2650 case Mips::DERET_MM: 2651 case Mips::DERET_MMR6: 2652 case Mips::EHB: 2653 case Mips::EHB_MM: 2654 case Mips::EHB_MMR6: 2655 case Mips::ERET: 2656 case Mips::ERETNC: 2657 case Mips::ERETNC_MMR6: 2658 case Mips::ERET_MM: 2659 case Mips::ERET_MMR6: 2660 case Mips::JrRa16: 2661 case Mips::JrcRa16: 2662 case Mips::PAUSE: 2663 case Mips::PAUSE_MM: 2664 case Mips::PAUSE_MMR6: 2665 case Mips::Restore16: 2666 case Mips::RestoreX16: 2667 case Mips::SSNOP: 2668 case Mips::SSNOP_MM: 2669 case Mips::SSNOP_MMR6: 2670 case Mips::Save16: 2671 case Mips::SaveX16: 2672 case Mips::TLBGINV: 2673 case Mips::TLBGINVF: 2674 case Mips::TLBGINVF_MM: 2675 case Mips::TLBGINV_MM: 2676 case Mips::TLBGP: 2677 case Mips::TLBGP_MM: 2678 case Mips::TLBGR: 2679 case Mips::TLBGR_MM: 2680 case Mips::TLBGWI: 2681 case Mips::TLBGWI_MM: 2682 case Mips::TLBGWR: 2683 case Mips::TLBGWR_MM: 2684 case Mips::TLBINV: 2685 case Mips::TLBINVF: 2686 case Mips::TLBINVF_MMR6: 2687 case Mips::TLBINV_MMR6: 2688 case Mips::TLBP: 2689 case Mips::TLBP_MM: 2690 case Mips::TLBR: 2691 case Mips::TLBR_MM: 2692 case Mips::TLBWI: 2693 case Mips::TLBWI_MM: 2694 case Mips::TLBWR: 2695 case Mips::TLBWR_MM: 2696 case Mips::WAIT: { 2697 break; 2698 } 2699 case Mips::MTHLIP: 2700 case Mips::SHILOV: { 2701 // op: ac 2702 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2703 Value |= (op & UINT64_C(3)) << 11; 2704 // op: rs 2705 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2706 Value |= (op & UINT64_C(31)) << 21; 2707 break; 2708 } 2709 case Mips::DPAQX_SA_W_PH: 2710 case Mips::DPAQX_S_W_PH: 2711 case Mips::DPAQ_SA_L_W: 2712 case Mips::DPAQ_S_W_PH: 2713 case Mips::DPAU_H_QBL: 2714 case Mips::DPAU_H_QBR: 2715 case Mips::DPAX_W_PH: 2716 case Mips::DPA_W_PH: 2717 case Mips::DPSQX_SA_W_PH: 2718 case Mips::DPSQX_S_W_PH: 2719 case Mips::DPSQ_SA_L_W: 2720 case Mips::DPSQ_S_W_PH: 2721 case Mips::DPSU_H_QBL: 2722 case Mips::DPSU_H_QBR: 2723 case Mips::DPSX_W_PH: 2724 case Mips::DPS_W_PH: 2725 case Mips::MADDU_DSP: 2726 case Mips::MADD_DSP: 2727 case Mips::MAQ_SA_W_PHL: 2728 case Mips::MAQ_SA_W_PHR: 2729 case Mips::MAQ_S_W_PHL: 2730 case Mips::MAQ_S_W_PHR: 2731 case Mips::MSUBU_DSP: 2732 case Mips::MSUB_DSP: 2733 case Mips::MULSAQ_S_W_PH: 2734 case Mips::MULSA_W_PH: 2735 case Mips::MULTU_DSP: 2736 case Mips::MULT_DSP: { 2737 // op: ac 2738 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2739 Value |= (op & UINT64_C(3)) << 11; 2740 // op: rs 2741 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2742 Value |= (op & UINT64_C(31)) << 21; 2743 // op: rt 2744 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2745 Value |= (op & UINT64_C(31)) << 16; 2746 break; 2747 } 2748 case Mips::SHILO: { 2749 // op: ac 2750 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2751 Value |= (op & UINT64_C(3)) << 11; 2752 // op: shift 2753 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2754 Value |= (op & UINT64_C(63)) << 20; 2755 break; 2756 } 2757 case Mips::CACHEE: 2758 case Mips::CACHE_R6: 2759 case Mips::PREFE: 2760 case Mips::PREF_R6: { 2761 // op: addr 2762 op = getMemEncoding(MI, 0, Fixups, STI); 2763 Value |= (op & UINT64_C(2031616)) << 5; 2764 Value |= (op & UINT64_C(511)) << 7; 2765 // op: hint 2766 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2767 Value |= (op & UINT64_C(31)) << 16; 2768 break; 2769 } 2770 case Mips::SYNCI: { 2771 // op: addr 2772 op = getMemEncoding(MI, 0, Fixups, STI); 2773 Value |= (op & UINT64_C(2031616)) << 5; 2774 Value |= op & UINT64_C(65535); 2775 break; 2776 } 2777 case Mips::CACHE: 2778 case Mips::PREF: { 2779 // op: addr 2780 op = getMemEncoding(MI, 0, Fixups, STI); 2781 Value |= (op & UINT64_C(2031616)) << 5; 2782 Value |= op & UINT64_C(65535); 2783 // op: hint 2784 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2785 Value |= (op & UINT64_C(31)) << 16; 2786 break; 2787 } 2788 case Mips::LD_B: 2789 case Mips::ST_B: { 2790 // op: addr 2791 op = getMemEncoding(MI, 1, Fixups, STI); 2792 Value |= (op & UINT64_C(1023)) << 16; 2793 Value |= (op & UINT64_C(2031616)) >> 5; 2794 // op: wd 2795 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2796 Value |= (op & UINT64_C(31)) << 6; 2797 break; 2798 } 2799 case Mips::LBE: 2800 case Mips::LBuE: 2801 case Mips::LHE: 2802 case Mips::LHuE: 2803 case Mips::LLE: 2804 case Mips::LWE: 2805 case Mips::LWLE: 2806 case Mips::LWRE: 2807 case Mips::SBE: 2808 case Mips::SHE: 2809 case Mips::SWE: 2810 case Mips::SWLE: 2811 case Mips::SWRE: { 2812 // op: addr 2813 op = getMemEncoding(MI, 1, Fixups, STI); 2814 Value |= (op & UINT64_C(2031616)) << 5; 2815 Value |= (op & UINT64_C(511)) << 7; 2816 // op: hint 2817 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2818 Value |= (op & UINT64_C(31)) << 16; 2819 break; 2820 } 2821 case Mips::SCE: { 2822 // op: addr 2823 op = getMemEncoding(MI, 2, Fixups, STI); 2824 Value |= (op & UINT64_C(2031616)) << 5; 2825 Value |= (op & UINT64_C(511)) << 7; 2826 // op: hint 2827 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2828 Value |= (op & UINT64_C(31)) << 16; 2829 break; 2830 } 2831 case Mips::LD_H: 2832 case Mips::ST_H: { 2833 // op: addr 2834 op = getMemEncoding<1>(MI, 1, Fixups, STI); 2835 Value |= (op & UINT64_C(1023)) << 16; 2836 Value |= (op & UINT64_C(2031616)) >> 5; 2837 // op: wd 2838 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2839 Value |= (op & UINT64_C(31)) << 6; 2840 break; 2841 } 2842 case Mips::LD_W: 2843 case Mips::ST_W: { 2844 // op: addr 2845 op = getMemEncoding<2>(MI, 1, Fixups, STI); 2846 Value |= (op & UINT64_C(1023)) << 16; 2847 Value |= (op & UINT64_C(2031616)) >> 5; 2848 // op: wd 2849 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2850 Value |= (op & UINT64_C(31)) << 6; 2851 break; 2852 } 2853 case Mips::LD_D: 2854 case Mips::ST_D: { 2855 // op: addr 2856 op = getMemEncoding<3>(MI, 1, Fixups, STI); 2857 Value |= (op & UINT64_C(1023)) << 16; 2858 Value |= (op & UINT64_C(2031616)) >> 5; 2859 // op: wd 2860 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2861 Value |= (op & UINT64_C(31)) << 6; 2862 break; 2863 } 2864 case Mips::CACHE_MM: 2865 case Mips::CACHE_MMR6: 2866 case Mips::PREF_MM: 2867 case Mips::PREF_MMR6: { 2868 // op: addr 2869 op = getMemEncodingMMImm12(MI, 0, Fixups, STI); 2870 Value |= op & UINT64_C(2031616); 2871 Value |= op & UINT64_C(4095); 2872 // op: hint 2873 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2874 Value |= (op & UINT64_C(31)) << 21; 2875 break; 2876 } 2877 case Mips::SYNCI_MM: 2878 case Mips::SYNCI_MMR6: { 2879 // op: addr 2880 op = getMemEncodingMMImm16(MI, 0, Fixups, STI); 2881 Value |= op & UINT64_C(2097151); 2882 break; 2883 } 2884 case Mips::LBU_MMR6: 2885 case Mips::LB_MMR6: { 2886 // op: addr 2887 op = getMemEncodingMMImm16(MI, 1, Fixups, STI); 2888 Value |= op & UINT64_C(2097151); 2889 // op: rt 2890 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2891 Value |= (op & UINT64_C(31)) << 21; 2892 break; 2893 } 2894 case Mips::CACHEE_MM: 2895 case Mips::PREFE_MM: { 2896 // op: addr 2897 op = getMemEncodingMMImm9(MI, 0, Fixups, STI); 2898 Value |= op & UINT64_C(2031616); 2899 Value |= op & UINT64_C(511); 2900 // op: hint 2901 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2902 Value |= (op & UINT64_C(31)) << 21; 2903 break; 2904 } 2905 case Mips::HYPCALL: { 2906 // op: code_ 2907 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2908 Value |= (op & UINT64_C(1023)) << 11; 2909 break; 2910 } 2911 case Mips::HYPCALL_MM: 2912 case Mips::SDBBP_MM: 2913 case Mips::SDBBP_MMR6: 2914 case Mips::SYSCALL_MM: 2915 case Mips::WAIT_MM: 2916 case Mips::WAIT_MMR6: { 2917 // op: code_ 2918 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2919 Value |= (op & UINT64_C(1023)) << 16; 2920 break; 2921 } 2922 case Mips::SDBBP: 2923 case Mips::SDBBP_R6: 2924 case Mips::SYSCALL: { 2925 // op: code_ 2926 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2927 Value |= (op & UINT64_C(1048575)) << 6; 2928 break; 2929 } 2930 case Mips::BREAK16_MMR6: 2931 case Mips::SDBBP16_MMR6: { 2932 // op: code_ 2933 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2934 Value |= (op & UINT64_C(15)) << 6; 2935 break; 2936 } 2937 case Mips::BREAK16_MM: 2938 case Mips::SDBBP16_MM: { 2939 // op: code_ 2940 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2941 Value |= op & UINT64_C(15); 2942 break; 2943 } 2944 case Mips::BREAK: 2945 case Mips::BREAK_MM: 2946 case Mips::BREAK_MMR6: { 2947 // op: code_1 2948 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2949 Value |= (op & UINT64_C(1023)) << 16; 2950 // op: code_2 2951 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2952 Value |= (op & UINT64_C(1023)) << 6; 2953 break; 2954 } 2955 case Mips::BC2EQZ: 2956 case Mips::BC2NEZ: { 2957 // op: ct 2958 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2959 Value |= (op & UINT64_C(31)) << 16; 2960 // op: offset 2961 op = getBranchTargetOpValue(MI, 1, Fixups, STI); 2962 Value |= op & UINT64_C(65535); 2963 break; 2964 } 2965 case Mips::MOVEP_MMR6: { 2966 // op: dst_regs 2967 op = getMovePRegPairOpValue(MI, 0, Fixups, STI); 2968 Value |= (op & UINT64_C(7)) << 7; 2969 // op: rt 2970 op = getMovePRegSingleOpValue(MI, 3, Fixups, STI); 2971 Value |= (op & UINT64_C(7)) << 4; 2972 // op: rs 2973 op = getMovePRegSingleOpValue(MI, 2, Fixups, STI); 2974 Value |= (op & UINT64_C(4)) << 1; 2975 Value |= op & UINT64_C(3); 2976 break; 2977 } 2978 case Mips::MOVEP_MM: { 2979 // op: dst_regs 2980 op = getMovePRegPairOpValue(MI, 0, Fixups, STI); 2981 Value |= (op & UINT64_C(7)) << 7; 2982 // op: rt 2983 op = getMovePRegSingleOpValue(MI, 3, Fixups, STI); 2984 Value |= (op & UINT64_C(7)) << 4; 2985 // op: rs 2986 op = getMovePRegSingleOpValue(MI, 2, Fixups, STI); 2987 Value |= (op & UINT64_C(7)) << 1; 2988 break; 2989 } 2990 case Mips::BC1F: 2991 case Mips::BC1FL: 2992 case Mips::BC1T: 2993 case Mips::BC1TL: { 2994 // op: fcc 2995 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2996 Value |= (op & UINT64_C(7)) << 18; 2997 // op: offset 2998 op = getBranchTargetOpValue(MI, 1, Fixups, STI); 2999 Value |= op & UINT64_C(65535); 3000 break; 3001 } 3002 case Mips::BC1F_MM: 3003 case Mips::BC1T_MM: { 3004 // op: fcc 3005 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3006 Value |= (op & UINT64_C(7)) << 18; 3007 // op: offset 3008 op = getBranchTargetOpValueMM(MI, 1, Fixups, STI); 3009 Value |= op & UINT64_C(65535); 3010 break; 3011 } 3012 case Mips::LUXC1_MM: 3013 case Mips::LWXC1_MM: { 3014 // op: fd 3015 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3016 Value |= (op & UINT64_C(31)) << 11; 3017 // op: base 3018 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3019 Value |= (op & UINT64_C(31)) << 16; 3020 // op: index 3021 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3022 Value |= (op & UINT64_C(31)) << 21; 3023 break; 3024 } 3025 case Mips::MOVN_I_D32_MM: 3026 case Mips::MOVN_I_S_MM: 3027 case Mips::MOVZ_I_D32_MM: 3028 case Mips::MOVZ_I_S_MM: { 3029 // op: fd 3030 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3031 Value |= (op & UINT64_C(31)) << 11; 3032 // op: fs 3033 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3034 Value |= (op & UINT64_C(31)) << 16; 3035 // op: rt 3036 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3037 Value |= (op & UINT64_C(31)) << 21; 3038 break; 3039 } 3040 case Mips::CEIL_W_MM: 3041 case Mips::CEIL_W_S_MM: 3042 case Mips::CVT_D32_S_MM: 3043 case Mips::CVT_D32_W_MM: 3044 case Mips::CVT_D64_S_MM: 3045 case Mips::CVT_D64_W_MM: 3046 case Mips::CVT_L_D64_MM: 3047 case Mips::CVT_L_S_MM: 3048 case Mips::CVT_S_D32_MM: 3049 case Mips::CVT_S_D64_MM: 3050 case Mips::CVT_S_W_MM: 3051 case Mips::CVT_W_D32_MM: 3052 case Mips::CVT_W_D64_MM: 3053 case Mips::CVT_W_S_MM: 3054 case Mips::FABS_D32_MM: 3055 case Mips::FABS_D64_MM: 3056 case Mips::FABS_S_MM: 3057 case Mips::FLOOR_W_MM: 3058 case Mips::FLOOR_W_S_MM: 3059 case Mips::FMOV_D32_MM: 3060 case Mips::FMOV_D64_MM: 3061 case Mips::FMOV_S_MM: 3062 case Mips::FNEG_D32_MM: 3063 case Mips::FNEG_D64_MM: 3064 case Mips::FNEG_S_MM: 3065 case Mips::FSQRT_D32_MM: 3066 case Mips::FSQRT_D64_MM: 3067 case Mips::FSQRT_S_MM: 3068 case Mips::RECIP_D32_MM: 3069 case Mips::RECIP_D64_MM: 3070 case Mips::RECIP_S_MM: 3071 case Mips::ROUND_W_MM: 3072 case Mips::ROUND_W_S_MM: 3073 case Mips::RSQRT_D32_MM: 3074 case Mips::RSQRT_D64_MM: 3075 case Mips::RSQRT_S_MM: 3076 case Mips::TRUNC_W_MM: 3077 case Mips::TRUNC_W_S_MM: { 3078 // op: fd 3079 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3080 Value |= (op & UINT64_C(31)) << 21; 3081 // op: fs 3082 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3083 Value |= (op & UINT64_C(31)) << 16; 3084 break; 3085 } 3086 case Mips::MOVF_D32_MM: 3087 case Mips::MOVF_S_MM: 3088 case Mips::MOVT_D32_MM: 3089 case Mips::MOVT_S_MM: { 3090 // op: fd 3091 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3092 Value |= (op & UINT64_C(31)) << 21; 3093 // op: fs 3094 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3095 Value |= (op & UINT64_C(31)) << 16; 3096 // op: fcc 3097 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3098 Value |= (op & UINT64_C(7)) << 13; 3099 break; 3100 } 3101 case Mips::LDXC1: 3102 case Mips::LDXC164: 3103 case Mips::LUXC1: 3104 case Mips::LUXC164: 3105 case Mips::LWXC1: { 3106 // op: fd 3107 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3108 Value |= (op & UINT64_C(31)) << 6; 3109 // op: base 3110 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3111 Value |= (op & UINT64_C(31)) << 21; 3112 // op: index 3113 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3114 Value |= (op & UINT64_C(31)) << 16; 3115 break; 3116 } 3117 case Mips::MADD_D32: 3118 case Mips::MADD_D64: 3119 case Mips::MADD_S: 3120 case Mips::MSUB_D32: 3121 case Mips::MSUB_D64: 3122 case Mips::MSUB_S: 3123 case Mips::NMADD_D32: 3124 case Mips::NMADD_D64: 3125 case Mips::NMADD_S: 3126 case Mips::NMSUB_D32: 3127 case Mips::NMSUB_D64: 3128 case Mips::NMSUB_S: { 3129 // op: fd 3130 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3131 Value |= (op & UINT64_C(31)) << 6; 3132 // op: fr 3133 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3134 Value |= (op & UINT64_C(31)) << 21; 3135 // op: fs 3136 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3137 Value |= (op & UINT64_C(31)) << 11; 3138 // op: ft 3139 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3140 Value |= (op & UINT64_C(31)) << 16; 3141 break; 3142 } 3143 case Mips::CEIL_L_D64: 3144 case Mips::CEIL_L_S: 3145 case Mips::CEIL_W_D32: 3146 case Mips::CEIL_W_D64: 3147 case Mips::CEIL_W_S: 3148 case Mips::CVT_D32_S: 3149 case Mips::CVT_D32_W: 3150 case Mips::CVT_D64_L: 3151 case Mips::CVT_D64_S: 3152 case Mips::CVT_D64_W: 3153 case Mips::CVT_L_D64: 3154 case Mips::CVT_L_S: 3155 case Mips::CVT_S_D32: 3156 case Mips::CVT_S_D64: 3157 case Mips::CVT_S_L: 3158 case Mips::CVT_S_W: 3159 case Mips::CVT_W_D32: 3160 case Mips::CVT_W_D64: 3161 case Mips::CVT_W_S: 3162 case Mips::FABS_D32: 3163 case Mips::FABS_D64: 3164 case Mips::FABS_S: 3165 case Mips::FLOOR_L_D64: 3166 case Mips::FLOOR_L_S: 3167 case Mips::FLOOR_W_D32: 3168 case Mips::FLOOR_W_D64: 3169 case Mips::FLOOR_W_S: 3170 case Mips::FMOV_D32: 3171 case Mips::FMOV_D64: 3172 case Mips::FMOV_S: 3173 case Mips::FNEG_D32: 3174 case Mips::FNEG_D64: 3175 case Mips::FNEG_S: 3176 case Mips::FSQRT_D32: 3177 case Mips::FSQRT_D64: 3178 case Mips::FSQRT_S: 3179 case Mips::RECIP_D32: 3180 case Mips::RECIP_D64: 3181 case Mips::RECIP_S: 3182 case Mips::ROUND_L_D64: 3183 case Mips::ROUND_L_S: 3184 case Mips::ROUND_W_D32: 3185 case Mips::ROUND_W_D64: 3186 case Mips::ROUND_W_S: 3187 case Mips::RSQRT_D32: 3188 case Mips::RSQRT_D64: 3189 case Mips::RSQRT_S: 3190 case Mips::TRUNC_L_D64: 3191 case Mips::TRUNC_L_S: 3192 case Mips::TRUNC_W_D32: 3193 case Mips::TRUNC_W_D64: 3194 case Mips::TRUNC_W_S: { 3195 // op: fd 3196 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3197 Value |= (op & UINT64_C(31)) << 6; 3198 // op: fs 3199 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3200 Value |= (op & UINT64_C(31)) << 11; 3201 break; 3202 } 3203 case Mips::MOVF_D32: 3204 case Mips::MOVF_D64: 3205 case Mips::MOVF_S: 3206 case Mips::MOVT_D32: 3207 case Mips::MOVT_D64: 3208 case Mips::MOVT_S: { 3209 // op: fd 3210 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3211 Value |= (op & UINT64_C(31)) << 6; 3212 // op: fs 3213 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3214 Value |= (op & UINT64_C(31)) << 11; 3215 // op: fcc 3216 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3217 Value |= (op & UINT64_C(7)) << 18; 3218 break; 3219 } 3220 case Mips::CMP_EQ_D: 3221 case Mips::CMP_EQ_S: 3222 case Mips::CMP_F_D: 3223 case Mips::CMP_F_S: 3224 case Mips::CMP_LE_D: 3225 case Mips::CMP_LE_S: 3226 case Mips::CMP_LT_D: 3227 case Mips::CMP_LT_S: 3228 case Mips::CMP_SAF_D: 3229 case Mips::CMP_SAF_S: 3230 case Mips::CMP_SEQ_D: 3231 case Mips::CMP_SEQ_S: 3232 case Mips::CMP_SLE_D: 3233 case Mips::CMP_SLE_S: 3234 case Mips::CMP_SLT_D: 3235 case Mips::CMP_SLT_S: 3236 case Mips::CMP_SUEQ_D: 3237 case Mips::CMP_SUEQ_S: 3238 case Mips::CMP_SULE_D: 3239 case Mips::CMP_SULE_S: 3240 case Mips::CMP_SULT_D: 3241 case Mips::CMP_SULT_S: 3242 case Mips::CMP_SUN_D: 3243 case Mips::CMP_SUN_S: 3244 case Mips::CMP_UEQ_D: 3245 case Mips::CMP_UEQ_S: 3246 case Mips::CMP_ULE_D: 3247 case Mips::CMP_ULE_S: 3248 case Mips::CMP_ULT_D: 3249 case Mips::CMP_ULT_S: 3250 case Mips::CMP_UN_D: 3251 case Mips::CMP_UN_S: 3252 case Mips::FADD_D32: 3253 case Mips::FADD_D64: 3254 case Mips::FADD_S: 3255 case Mips::FDIV_D32: 3256 case Mips::FDIV_D64: 3257 case Mips::FDIV_S: 3258 case Mips::FMUL_D32: 3259 case Mips::FMUL_D64: 3260 case Mips::FMUL_S: 3261 case Mips::FSUB_D32: 3262 case Mips::FSUB_D64: 3263 case Mips::FSUB_S: { 3264 // op: fd 3265 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3266 Value |= (op & UINT64_C(31)) << 6; 3267 // op: fs 3268 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3269 Value |= (op & UINT64_C(31)) << 11; 3270 // op: ft 3271 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3272 Value |= (op & UINT64_C(31)) << 16; 3273 break; 3274 } 3275 case Mips::MOVN_I64_D64: 3276 case Mips::MOVN_I64_S: 3277 case Mips::MOVN_I_D32: 3278 case Mips::MOVN_I_D64: 3279 case Mips::MOVN_I_S: 3280 case Mips::MOVZ_I64_D64: 3281 case Mips::MOVZ_I64_S: 3282 case Mips::MOVZ_I_D32: 3283 case Mips::MOVZ_I_D64: 3284 case Mips::MOVZ_I_S: { 3285 // op: fd 3286 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3287 Value |= (op & UINT64_C(31)) << 6; 3288 // op: fs 3289 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3290 Value |= (op & UINT64_C(31)) << 11; 3291 // op: rt 3292 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3293 Value |= (op & UINT64_C(31)) << 16; 3294 break; 3295 } 3296 case Mips::SUXC1_MM: 3297 case Mips::SWXC1_MM: { 3298 // op: fs 3299 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3300 Value |= (op & UINT64_C(31)) << 11; 3301 // op: base 3302 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3303 Value |= (op & UINT64_C(31)) << 16; 3304 // op: index 3305 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3306 Value |= (op & UINT64_C(31)) << 21; 3307 break; 3308 } 3309 case Mips::SDXC1: 3310 case Mips::SDXC164: 3311 case Mips::SUXC1: 3312 case Mips::SUXC164: 3313 case Mips::SWXC1: { 3314 // op: fs 3315 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3316 Value |= (op & UINT64_C(31)) << 11; 3317 // op: base 3318 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3319 Value |= (op & UINT64_C(31)) << 21; 3320 // op: index 3321 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3322 Value |= (op & UINT64_C(31)) << 16; 3323 break; 3324 } 3325 case Mips::FCMP_D32: 3326 case Mips::FCMP_D64: 3327 case Mips::FCMP_S32: { 3328 // op: fs 3329 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3330 Value |= (op & UINT64_C(31)) << 11; 3331 // op: ft 3332 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3333 Value |= (op & UINT64_C(31)) << 16; 3334 // op: cond 3335 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3336 Value |= op & UINT64_C(15); 3337 break; 3338 } 3339 case Mips::FCMP_D32_MM: 3340 case Mips::FCMP_S32_MM: { 3341 // op: fs 3342 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3343 Value |= (op & UINT64_C(31)) << 16; 3344 // op: ft 3345 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3346 Value |= (op & UINT64_C(31)) << 21; 3347 // op: cond 3348 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3349 Value |= (op & UINT64_C(15)) << 6; 3350 break; 3351 } 3352 case Mips::CLASS_D: 3353 case Mips::CLASS_S: 3354 case Mips::RINT_D: 3355 case Mips::RINT_S: { 3356 // op: fs 3357 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3358 Value |= (op & UINT64_C(31)) << 11; 3359 // op: fd 3360 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3361 Value |= (op & UINT64_C(31)) << 6; 3362 break; 3363 } 3364 case Mips::C_EQ_D32: 3365 case Mips::C_EQ_D64: 3366 case Mips::C_EQ_S: 3367 case Mips::C_F_D32: 3368 case Mips::C_F_D64: 3369 case Mips::C_F_S: 3370 case Mips::C_LE_D32: 3371 case Mips::C_LE_D64: 3372 case Mips::C_LE_S: 3373 case Mips::C_LT_D32: 3374 case Mips::C_LT_D64: 3375 case Mips::C_LT_S: 3376 case Mips::C_NGE_D32: 3377 case Mips::C_NGE_D64: 3378 case Mips::C_NGE_S: 3379 case Mips::C_NGLE_D32: 3380 case Mips::C_NGLE_D64: 3381 case Mips::C_NGLE_S: 3382 case Mips::C_NGL_D32: 3383 case Mips::C_NGL_D64: 3384 case Mips::C_NGL_S: 3385 case Mips::C_NGT_D32: 3386 case Mips::C_NGT_D64: 3387 case Mips::C_NGT_S: 3388 case Mips::C_OLE_D32: 3389 case Mips::C_OLE_D64: 3390 case Mips::C_OLE_S: 3391 case Mips::C_OLT_D32: 3392 case Mips::C_OLT_D64: 3393 case Mips::C_OLT_S: 3394 case Mips::C_SEQ_D32: 3395 case Mips::C_SEQ_D64: 3396 case Mips::C_SEQ_S: 3397 case Mips::C_SF_D32: 3398 case Mips::C_SF_D64: 3399 case Mips::C_SF_S: 3400 case Mips::C_UEQ_D32: 3401 case Mips::C_UEQ_D64: 3402 case Mips::C_UEQ_S: 3403 case Mips::C_ULE_D32: 3404 case Mips::C_ULE_D64: 3405 case Mips::C_ULE_S: 3406 case Mips::C_ULT_D32: 3407 case Mips::C_ULT_D64: 3408 case Mips::C_ULT_S: 3409 case Mips::C_UN_D32: 3410 case Mips::C_UN_D64: 3411 case Mips::C_UN_S: { 3412 // op: fs 3413 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3414 Value |= (op & UINT64_C(31)) << 11; 3415 // op: ft 3416 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3417 Value |= (op & UINT64_C(31)) << 16; 3418 // op: fcc 3419 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3420 Value |= (op & UINT64_C(7)) << 8; 3421 break; 3422 } 3423 case Mips::C_EQ_D32_MM: 3424 case Mips::C_EQ_D64_MM: 3425 case Mips::C_EQ_S_MM: 3426 case Mips::C_F_D32_MM: 3427 case Mips::C_F_D64_MM: 3428 case Mips::C_F_S_MM: 3429 case Mips::C_LE_D32_MM: 3430 case Mips::C_LE_D64_MM: 3431 case Mips::C_LE_S_MM: 3432 case Mips::C_LT_D32_MM: 3433 case Mips::C_LT_D64_MM: 3434 case Mips::C_LT_S_MM: 3435 case Mips::C_NGE_D32_MM: 3436 case Mips::C_NGE_D64_MM: 3437 case Mips::C_NGE_S_MM: 3438 case Mips::C_NGLE_D32_MM: 3439 case Mips::C_NGLE_D64_MM: 3440 case Mips::C_NGLE_S_MM: 3441 case Mips::C_NGL_D32_MM: 3442 case Mips::C_NGL_D64_MM: 3443 case Mips::C_NGL_S_MM: 3444 case Mips::C_NGT_D32_MM: 3445 case Mips::C_NGT_D64_MM: 3446 case Mips::C_NGT_S_MM: 3447 case Mips::C_OLE_D32_MM: 3448 case Mips::C_OLE_D64_MM: 3449 case Mips::C_OLE_S_MM: 3450 case Mips::C_OLT_D32_MM: 3451 case Mips::C_OLT_D64_MM: 3452 case Mips::C_OLT_S_MM: 3453 case Mips::C_SEQ_D32_MM: 3454 case Mips::C_SEQ_D64_MM: 3455 case Mips::C_SEQ_S_MM: 3456 case Mips::C_SF_D32_MM: 3457 case Mips::C_SF_D64_MM: 3458 case Mips::C_SF_S_MM: 3459 case Mips::C_UEQ_D32_MM: 3460 case Mips::C_UEQ_D64_MM: 3461 case Mips::C_UEQ_S_MM: 3462 case Mips::C_ULE_D32_MM: 3463 case Mips::C_ULE_D64_MM: 3464 case Mips::C_ULE_S_MM: 3465 case Mips::C_ULT_D32_MM: 3466 case Mips::C_ULT_D64_MM: 3467 case Mips::C_ULT_S_MM: 3468 case Mips::C_UN_D32_MM: 3469 case Mips::C_UN_D64_MM: 3470 case Mips::C_UN_S_MM: { 3471 // op: fs 3472 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3473 Value |= (op & UINT64_C(31)) << 16; 3474 // op: ft 3475 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3476 Value |= (op & UINT64_C(31)) << 21; 3477 // op: fcc 3478 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3479 Value |= (op & UINT64_C(7)) << 13; 3480 break; 3481 } 3482 case Mips::CLASS_D_MMR6: 3483 case Mips::CLASS_S_MMR6: 3484 case Mips::RINT_D_MMR6: 3485 case Mips::RINT_S_MMR6: { 3486 // op: fs 3487 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3488 Value |= (op & UINT64_C(31)) << 21; 3489 // op: fd 3490 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3491 Value |= (op & UINT64_C(31)) << 16; 3492 break; 3493 } 3494 case Mips::BC1EQZ: 3495 case Mips::BC1NEZ: { 3496 // op: ft 3497 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3498 Value |= (op & UINT64_C(31)) << 16; 3499 // op: offset 3500 op = getBranchTargetOpValue(MI, 1, Fixups, STI); 3501 Value |= op & UINT64_C(65535); 3502 break; 3503 } 3504 case Mips::LDC1_D64_MMR6: 3505 case Mips::SDC1_D64_MMR6: { 3506 // op: ft 3507 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3508 Value |= (op & UINT64_C(31)) << 21; 3509 // op: addr 3510 op = getMemEncodingMMImm16(MI, 1, Fixups, STI); 3511 Value |= op & UINT64_C(2097151); 3512 break; 3513 } 3514 case Mips::CEIL_L_D_MMR6: 3515 case Mips::CEIL_L_S_MMR6: 3516 case Mips::CEIL_W_D_MMR6: 3517 case Mips::CEIL_W_S_MMR6: 3518 case Mips::CVT_D_L_MMR6: 3519 case Mips::CVT_L_D_MMR6: 3520 case Mips::CVT_L_S_MMR6: 3521 case Mips::CVT_S_L_MMR6: 3522 case Mips::CVT_S_W_MMR6: 3523 case Mips::CVT_W_S_MMR6: 3524 case Mips::FLOOR_L_D_MMR6: 3525 case Mips::FLOOR_L_S_MMR6: 3526 case Mips::FLOOR_W_D_MMR6: 3527 case Mips::FLOOR_W_S_MMR6: 3528 case Mips::FMOV_S_MMR6: 3529 case Mips::FNEG_S_MMR6: 3530 case Mips::ROUND_L_D_MMR6: 3531 case Mips::ROUND_L_S_MMR6: 3532 case Mips::ROUND_W_D_MMR6: 3533 case Mips::ROUND_W_S_MMR6: 3534 case Mips::TRUNC_L_D_MMR6: 3535 case Mips::TRUNC_L_S_MMR6: 3536 case Mips::TRUNC_W_D_MMR6: 3537 case Mips::TRUNC_W_S_MMR6: { 3538 // op: ft 3539 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3540 Value |= (op & UINT64_C(31)) << 21; 3541 // op: fs 3542 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3543 Value |= (op & UINT64_C(31)) << 16; 3544 break; 3545 } 3546 case Mips::FADD_S_MMR6: 3547 case Mips::FDIV_S_MMR6: 3548 case Mips::FMUL_S_MMR6: 3549 case Mips::FSUB_S_MMR6: { 3550 // op: ft 3551 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3552 Value |= (op & UINT64_C(31)) << 21; 3553 // op: fs 3554 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3555 Value |= (op & UINT64_C(31)) << 16; 3556 // op: fd 3557 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3558 Value |= (op & UINT64_C(31)) << 11; 3559 break; 3560 } 3561 case Mips::MAXA_D: 3562 case Mips::MAXA_S: 3563 case Mips::MAX_D: 3564 case Mips::MAX_S: 3565 case Mips::MINA_D: 3566 case Mips::MINA_S: 3567 case Mips::MIN_D: 3568 case Mips::MIN_S: 3569 case Mips::SELEQZ_D: 3570 case Mips::SELEQZ_S: 3571 case Mips::SELNEZ_D: 3572 case Mips::SELNEZ_S: { 3573 // op: ft 3574 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3575 Value |= (op & UINT64_C(31)) << 16; 3576 // op: fs 3577 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3578 Value |= (op & UINT64_C(31)) << 11; 3579 // op: fd 3580 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3581 Value |= (op & UINT64_C(31)) << 6; 3582 break; 3583 } 3584 case Mips::CMP_AF_D_MMR6: 3585 case Mips::CMP_AF_S_MMR6: 3586 case Mips::CMP_EQ_D_MMR6: 3587 case Mips::CMP_EQ_S_MMR6: 3588 case Mips::CMP_LE_D_MMR6: 3589 case Mips::CMP_LE_S_MMR6: 3590 case Mips::CMP_LT_D_MMR6: 3591 case Mips::CMP_LT_S_MMR6: 3592 case Mips::CMP_SAF_D_MMR6: 3593 case Mips::CMP_SAF_S_MMR6: 3594 case Mips::CMP_SEQ_D_MMR6: 3595 case Mips::CMP_SEQ_S_MMR6: 3596 case Mips::CMP_SLE_D_MMR6: 3597 case Mips::CMP_SLE_S_MMR6: 3598 case Mips::CMP_SLT_D_MMR6: 3599 case Mips::CMP_SLT_S_MMR6: 3600 case Mips::CMP_SUEQ_D_MMR6: 3601 case Mips::CMP_SUEQ_S_MMR6: 3602 case Mips::CMP_SULE_D_MMR6: 3603 case Mips::CMP_SULE_S_MMR6: 3604 case Mips::CMP_SULT_D_MMR6: 3605 case Mips::CMP_SULT_S_MMR6: 3606 case Mips::CMP_SUN_D_MMR6: 3607 case Mips::CMP_SUN_S_MMR6: 3608 case Mips::CMP_UEQ_D_MMR6: 3609 case Mips::CMP_UEQ_S_MMR6: 3610 case Mips::CMP_ULE_D_MMR6: 3611 case Mips::CMP_ULE_S_MMR6: 3612 case Mips::CMP_ULT_D_MMR6: 3613 case Mips::CMP_ULT_S_MMR6: 3614 case Mips::CMP_UN_D_MMR6: 3615 case Mips::CMP_UN_S_MMR6: 3616 case Mips::FADD_D32_MM: 3617 case Mips::FADD_D64_MM: 3618 case Mips::FADD_S_MM: 3619 case Mips::FDIV_D32_MM: 3620 case Mips::FDIV_D64_MM: 3621 case Mips::FDIV_S_MM: 3622 case Mips::FMUL_D32_MM: 3623 case Mips::FMUL_D64_MM: 3624 case Mips::FMUL_S_MM: 3625 case Mips::FSUB_D32_MM: 3626 case Mips::FSUB_D64_MM: 3627 case Mips::FSUB_S_MM: 3628 case Mips::MAXA_D_MMR6: 3629 case Mips::MAXA_S_MMR6: 3630 case Mips::MAX_D_MMR6: 3631 case Mips::MAX_S_MMR6: 3632 case Mips::MINA_D_MMR6: 3633 case Mips::MINA_S_MMR6: 3634 case Mips::MIN_D_MMR6: 3635 case Mips::MIN_S_MMR6: 3636 case Mips::SELEQZ_D_MMR6: 3637 case Mips::SELEQZ_S_MMR6: 3638 case Mips::SELNEZ_D_MMR6: 3639 case Mips::SELNEZ_S_MMR6: { 3640 // op: ft 3641 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3642 Value |= (op & UINT64_C(31)) << 21; 3643 // op: fs 3644 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3645 Value |= (op & UINT64_C(31)) << 16; 3646 // op: fd 3647 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3648 Value |= (op & UINT64_C(31)) << 11; 3649 break; 3650 } 3651 case Mips::MADDF_D: 3652 case Mips::MADDF_S: 3653 case Mips::MSUBF_D: 3654 case Mips::MSUBF_S: 3655 case Mips::SEL_D: 3656 case Mips::SEL_S: { 3657 // op: ft 3658 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3659 Value |= (op & UINT64_C(31)) << 16; 3660 // op: fs 3661 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3662 Value |= (op & UINT64_C(31)) << 11; 3663 // op: fd 3664 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3665 Value |= (op & UINT64_C(31)) << 6; 3666 break; 3667 } 3668 case Mips::MADDF_D_MMR6: 3669 case Mips::MADDF_S_MMR6: 3670 case Mips::MSUBF_D_MMR6: 3671 case Mips::MSUBF_S_MMR6: 3672 case Mips::SEL_D_MMR6: 3673 case Mips::SEL_S_MMR6: { 3674 // op: ft 3675 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3676 Value |= (op & UINT64_C(31)) << 21; 3677 // op: fs 3678 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3679 Value |= (op & UINT64_C(31)) << 16; 3680 // op: fd 3681 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3682 Value |= (op & UINT64_C(31)) << 11; 3683 break; 3684 } 3685 case Mips::MADD_D32_MM: 3686 case Mips::MADD_S_MM: 3687 case Mips::MSUB_D32_MM: 3688 case Mips::MSUB_S_MM: 3689 case Mips::NMADD_D32_MM: 3690 case Mips::NMADD_S_MM: 3691 case Mips::NMSUB_D32_MM: 3692 case Mips::NMSUB_S_MM: { 3693 // op: ft 3694 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3695 Value |= (op & UINT64_C(31)) << 21; 3696 // op: fs 3697 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3698 Value |= (op & UINT64_C(31)) << 16; 3699 // op: fd 3700 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3701 Value |= (op & UINT64_C(31)) << 11; 3702 // op: fr 3703 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3704 Value |= (op & UINT64_C(31)) << 6; 3705 break; 3706 } 3707 case Mips::ADDVI_B: 3708 case Mips::ADDVI_D: 3709 case Mips::ADDVI_H: 3710 case Mips::ADDVI_W: 3711 case Mips::CEQI_B: 3712 case Mips::CEQI_D: 3713 case Mips::CEQI_H: 3714 case Mips::CEQI_W: 3715 case Mips::CLEI_S_B: 3716 case Mips::CLEI_S_D: 3717 case Mips::CLEI_S_H: 3718 case Mips::CLEI_S_W: 3719 case Mips::CLEI_U_B: 3720 case Mips::CLEI_U_D: 3721 case Mips::CLEI_U_H: 3722 case Mips::CLEI_U_W: 3723 case Mips::CLTI_S_B: 3724 case Mips::CLTI_S_D: 3725 case Mips::CLTI_S_H: 3726 case Mips::CLTI_S_W: 3727 case Mips::CLTI_U_B: 3728 case Mips::CLTI_U_D: 3729 case Mips::CLTI_U_H: 3730 case Mips::CLTI_U_W: 3731 case Mips::MAXI_S_B: 3732 case Mips::MAXI_S_D: 3733 case Mips::MAXI_S_H: 3734 case Mips::MAXI_S_W: 3735 case Mips::MAXI_U_B: 3736 case Mips::MAXI_U_D: 3737 case Mips::MAXI_U_H: 3738 case Mips::MAXI_U_W: 3739 case Mips::MINI_S_B: 3740 case Mips::MINI_S_D: 3741 case Mips::MINI_S_H: 3742 case Mips::MINI_S_W: 3743 case Mips::MINI_U_B: 3744 case Mips::MINI_U_D: 3745 case Mips::MINI_U_H: 3746 case Mips::MINI_U_W: 3747 case Mips::SUBVI_B: 3748 case Mips::SUBVI_D: 3749 case Mips::SUBVI_H: 3750 case Mips::SUBVI_W: { 3751 // op: imm 3752 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3753 Value |= (op & UINT64_C(31)) << 16; 3754 // op: ws 3755 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3756 Value |= (op & UINT64_C(31)) << 11; 3757 // op: wd 3758 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3759 Value |= (op & UINT64_C(31)) << 6; 3760 break; 3761 } 3762 case Mips::ADDIUSP_MM: { 3763 // op: imm 3764 op = getSImm9AddiuspValue(MI, 0, Fixups, STI); 3765 Value |= (op & UINT64_C(511)) << 1; 3766 break; 3767 } 3768 case Mips::JRCADDIUSP_MMR6: { 3769 // op: imm 3770 op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI); 3771 Value |= (op & UINT64_C(31)) << 5; 3772 break; 3773 } 3774 case Mips::JRADDIUSP: { 3775 // op: imm 3776 op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI); 3777 Value |= op & UINT64_C(31); 3778 break; 3779 } 3780 case Mips::Bimm16: { 3781 // op: imm11 3782 op = getBranchTargetOpValue(MI, 0, Fixups, STI); 3783 Value |= op & UINT64_C(2047); 3784 break; 3785 } 3786 case Mips::AddiuRxRyOffMemX16: { 3787 // op: imm15 3788 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3789 Value |= (op & UINT64_C(2032)) << 16; 3790 Value |= (op & UINT64_C(30720)) << 5; 3791 Value |= op & UINT64_C(15); 3792 // op: rx 3793 op = getMemEncoding(MI, 1, Fixups, STI); 3794 Value |= (op & UINT64_C(7)) << 8; 3795 // op: ry 3796 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3797 Value |= (op & UINT64_C(7)) << 5; 3798 break; 3799 } 3800 case Mips::BimmX16: { 3801 // op: imm16 3802 op = getBranchTargetOpValue(MI, 0, Fixups, STI); 3803 Value |= (op & UINT64_C(2016)) << 16; 3804 Value |= (op & UINT64_C(63488)) << 5; 3805 Value |= op & UINT64_C(31); 3806 break; 3807 } 3808 case Mips::AddiuSpImmX16: 3809 case Mips::BteqzX16: 3810 case Mips::BtnezX16: { 3811 // op: imm16 3812 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3813 Value |= (op & UINT64_C(2016)) << 16; 3814 Value |= (op & UINT64_C(63488)) << 5; 3815 Value |= op & UINT64_C(31); 3816 break; 3817 } 3818 case Mips::AddiuRxImmX16: 3819 case Mips::AddiuRxPcImmX16: 3820 case Mips::AddiuRxRxImmX16: 3821 case Mips::BeqzRxImmX16: 3822 case Mips::BnezRxImmX16: 3823 case Mips::CmpiRxImmX16: 3824 case Mips::LiRxImmAlignX16: 3825 case Mips::LiRxImmX16: 3826 case Mips::LwRxPcTcpX16: 3827 case Mips::SltiRxImmX16: 3828 case Mips::SltiuRxImmX16: { 3829 // op: imm16 3830 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3831 Value |= (op & UINT64_C(2016)) << 16; 3832 Value |= (op & UINT64_C(63488)) << 5; 3833 Value |= op & UINT64_C(31); 3834 // op: rx 3835 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3836 Value |= (op & UINT64_C(7)) << 8; 3837 break; 3838 } 3839 case Mips::LbRxRyOffMemX16: 3840 case Mips::LbuRxRyOffMemX16: 3841 case Mips::LhRxRyOffMemX16: 3842 case Mips::LhuRxRyOffMemX16: 3843 case Mips::LwRxRyOffMemX16: 3844 case Mips::LwRxSpImmX16: 3845 case Mips::SbRxRyOffMemX16: 3846 case Mips::ShRxRyOffMemX16: 3847 case Mips::SwRxRyOffMemX16: 3848 case Mips::SwRxSpImmX16: { 3849 // op: imm16 3850 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3851 Value |= (op & UINT64_C(2016)) << 16; 3852 Value |= (op & UINT64_C(63488)) << 5; 3853 Value |= op & UINT64_C(31); 3854 // op: rx 3855 op = getMemEncoding(MI, 1, Fixups, STI); 3856 Value |= (op & UINT64_C(7)) << 8; 3857 // op: ry 3858 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3859 Value |= (op & UINT64_C(7)) << 5; 3860 break; 3861 } 3862 case Mips::Jal16: 3863 case Mips::JalB16: { 3864 // op: imm26 3865 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3866 Value |= (op & UINT64_C(2031616)) << 5; 3867 Value |= (op & UINT64_C(65011712)) >> 5; 3868 Value |= op & UINT64_C(65535); 3869 break; 3870 } 3871 case Mips::AddiuSpImm16: 3872 case Mips::Bteqz16: 3873 case Mips::Btnez16: { 3874 // op: imm8 3875 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3876 Value |= op & UINT64_C(255); 3877 break; 3878 } 3879 case Mips::PREFX_MM: { 3880 // op: index 3881 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3882 Value |= (op & UINT64_C(31)) << 21; 3883 // op: base 3884 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3885 Value |= (op & UINT64_C(31)) << 16; 3886 // op: hint 3887 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3888 Value |= (op & UINT64_C(31)) << 11; 3889 break; 3890 } 3891 case Mips::LBUX_MM: 3892 case Mips::LHX_MM: 3893 case Mips::LWX_MM: { 3894 // op: index 3895 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3896 Value |= (op & UINT64_C(31)) << 21; 3897 // op: base 3898 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3899 Value |= (op & UINT64_C(31)) << 16; 3900 // op: rd 3901 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3902 Value |= (op & UINT64_C(31)) << 11; 3903 break; 3904 } 3905 case Mips::COPY_S_D: { 3906 // op: n 3907 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3908 Value |= (op & UINT64_C(1)) << 16; 3909 // op: ws 3910 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3911 Value |= (op & UINT64_C(31)) << 11; 3912 // op: rd 3913 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3914 Value |= (op & UINT64_C(31)) << 6; 3915 break; 3916 } 3917 case Mips::SPLATI_D: { 3918 // op: n 3919 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3920 Value |= (op & UINT64_C(1)) << 16; 3921 // op: ws 3922 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3923 Value |= (op & UINT64_C(31)) << 11; 3924 // op: wd 3925 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3926 Value |= (op & UINT64_C(31)) << 6; 3927 break; 3928 } 3929 case Mips::INSVE_D: { 3930 // op: n 3931 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3932 Value |= (op & UINT64_C(1)) << 16; 3933 // op: ws 3934 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3935 Value |= (op & UINT64_C(31)) << 11; 3936 // op: wd 3937 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3938 Value |= (op & UINT64_C(31)) << 6; 3939 break; 3940 } 3941 case Mips::COPY_S_B: 3942 case Mips::COPY_U_B: { 3943 // op: n 3944 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3945 Value |= (op & UINT64_C(15)) << 16; 3946 // op: ws 3947 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3948 Value |= (op & UINT64_C(31)) << 11; 3949 // op: rd 3950 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3951 Value |= (op & UINT64_C(31)) << 6; 3952 break; 3953 } 3954 case Mips::SPLATI_B: { 3955 // op: n 3956 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3957 Value |= (op & UINT64_C(15)) << 16; 3958 // op: ws 3959 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3960 Value |= (op & UINT64_C(31)) << 11; 3961 // op: wd 3962 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3963 Value |= (op & UINT64_C(31)) << 6; 3964 break; 3965 } 3966 case Mips::INSVE_B: { 3967 // op: n 3968 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3969 Value |= (op & UINT64_C(15)) << 16; 3970 // op: ws 3971 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 3972 Value |= (op & UINT64_C(31)) << 11; 3973 // op: wd 3974 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3975 Value |= (op & UINT64_C(31)) << 6; 3976 break; 3977 } 3978 case Mips::COPY_S_W: 3979 case Mips::COPY_U_W: { 3980 // op: n 3981 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3982 Value |= (op & UINT64_C(3)) << 16; 3983 // op: ws 3984 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3985 Value |= (op & UINT64_C(31)) << 11; 3986 // op: rd 3987 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 3988 Value |= (op & UINT64_C(31)) << 6; 3989 break; 3990 } 3991 case Mips::SPLATI_W: { 3992 // op: n 3993 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 3994 Value |= (op & UINT64_C(3)) << 16; 3995 // op: ws 3996 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 3997 Value |= (op & UINT64_C(31)) << 11; 3998 // op: wd 3999 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4000 Value |= (op & UINT64_C(31)) << 6; 4001 break; 4002 } 4003 case Mips::INSVE_W: { 4004 // op: n 4005 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4006 Value |= (op & UINT64_C(3)) << 16; 4007 // op: ws 4008 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4009 Value |= (op & UINT64_C(31)) << 11; 4010 // op: wd 4011 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4012 Value |= (op & UINT64_C(31)) << 6; 4013 break; 4014 } 4015 case Mips::COPY_S_H: 4016 case Mips::COPY_U_H: { 4017 // op: n 4018 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4019 Value |= (op & UINT64_C(7)) << 16; 4020 // op: ws 4021 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4022 Value |= (op & UINT64_C(31)) << 11; 4023 // op: rd 4024 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4025 Value |= (op & UINT64_C(31)) << 6; 4026 break; 4027 } 4028 case Mips::SPLATI_H: { 4029 // op: n 4030 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4031 Value |= (op & UINT64_C(7)) << 16; 4032 // op: ws 4033 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4034 Value |= (op & UINT64_C(31)) << 11; 4035 // op: wd 4036 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4037 Value |= (op & UINT64_C(31)) << 6; 4038 break; 4039 } 4040 case Mips::INSVE_H: { 4041 // op: n 4042 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4043 Value |= (op & UINT64_C(7)) << 16; 4044 // op: ws 4045 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4046 Value |= (op & UINT64_C(31)) << 11; 4047 // op: wd 4048 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4049 Value |= (op & UINT64_C(31)) << 6; 4050 break; 4051 } 4052 case Mips::INSERT_D: { 4053 // op: n 4054 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4055 Value |= (op & UINT64_C(1)) << 16; 4056 // op: rs 4057 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4058 Value |= (op & UINT64_C(31)) << 11; 4059 // op: wd 4060 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4061 Value |= (op & UINT64_C(31)) << 6; 4062 break; 4063 } 4064 case Mips::SLDI_D: { 4065 // op: n 4066 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4067 Value |= (op & UINT64_C(1)) << 16; 4068 // op: ws 4069 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4070 Value |= (op & UINT64_C(31)) << 11; 4071 // op: wd 4072 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4073 Value |= (op & UINT64_C(31)) << 6; 4074 break; 4075 } 4076 case Mips::INSERT_B: { 4077 // op: n 4078 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4079 Value |= (op & UINT64_C(15)) << 16; 4080 // op: rs 4081 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4082 Value |= (op & UINT64_C(31)) << 11; 4083 // op: wd 4084 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4085 Value |= (op & UINT64_C(31)) << 6; 4086 break; 4087 } 4088 case Mips::SLDI_B: { 4089 // op: n 4090 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4091 Value |= (op & UINT64_C(15)) << 16; 4092 // op: ws 4093 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4094 Value |= (op & UINT64_C(31)) << 11; 4095 // op: wd 4096 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4097 Value |= (op & UINT64_C(31)) << 6; 4098 break; 4099 } 4100 case Mips::INSERT_W: { 4101 // op: n 4102 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4103 Value |= (op & UINT64_C(3)) << 16; 4104 // op: rs 4105 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4106 Value |= (op & UINT64_C(31)) << 11; 4107 // op: wd 4108 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4109 Value |= (op & UINT64_C(31)) << 6; 4110 break; 4111 } 4112 case Mips::SLDI_W: { 4113 // op: n 4114 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4115 Value |= (op & UINT64_C(3)) << 16; 4116 // op: ws 4117 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4118 Value |= (op & UINT64_C(31)) << 11; 4119 // op: wd 4120 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4121 Value |= (op & UINT64_C(31)) << 6; 4122 break; 4123 } 4124 case Mips::INSERT_H: { 4125 // op: n 4126 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4127 Value |= (op & UINT64_C(7)) << 16; 4128 // op: rs 4129 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4130 Value |= (op & UINT64_C(31)) << 11; 4131 // op: wd 4132 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4133 Value |= (op & UINT64_C(31)) << 6; 4134 break; 4135 } 4136 case Mips::SLDI_H: { 4137 // op: n 4138 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4139 Value |= (op & UINT64_C(7)) << 16; 4140 // op: ws 4141 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4142 Value |= (op & UINT64_C(31)) << 11; 4143 // op: wd 4144 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4145 Value |= (op & UINT64_C(31)) << 6; 4146 break; 4147 } 4148 case Mips::BALC: 4149 case Mips::BC: { 4150 // op: offset 4151 op = getBranchTarget26OpValue(MI, 0, Fixups, STI); 4152 Value |= op & UINT64_C(67108863); 4153 break; 4154 } 4155 case Mips::BALC_MMR6: 4156 case Mips::BC_MMR6: { 4157 // op: offset 4158 op = getBranchTarget26OpValueMM(MI, 0, Fixups, STI); 4159 Value |= op & UINT64_C(67108863); 4160 break; 4161 } 4162 case Mips::BAL: 4163 case Mips::BPOSGE32: { 4164 // op: offset 4165 op = getBranchTargetOpValue(MI, 0, Fixups, STI); 4166 Value |= op & UINT64_C(65535); 4167 break; 4168 } 4169 case Mips::BNZ_B: 4170 case Mips::BNZ_D: 4171 case Mips::BNZ_H: 4172 case Mips::BNZ_V: 4173 case Mips::BNZ_W: 4174 case Mips::BZ_B: 4175 case Mips::BZ_D: 4176 case Mips::BZ_H: 4177 case Mips::BZ_V: 4178 case Mips::BZ_W: { 4179 // op: offset 4180 op = getBranchTargetOpValue(MI, 1, Fixups, STI); 4181 Value |= op & UINT64_C(65535); 4182 // op: wt 4183 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4184 Value |= (op & UINT64_C(31)) << 16; 4185 break; 4186 } 4187 case Mips::BPOSGE32C_MMR3: { 4188 // op: offset 4189 op = getBranchTargetOpValue1SImm16(MI, 0, Fixups, STI); 4190 Value |= op & UINT64_C(65535); 4191 break; 4192 } 4193 case Mips::BPOSGE32_MM: { 4194 // op: offset 4195 op = getBranchTargetOpValueMM(MI, 0, Fixups, STI); 4196 Value |= op & UINT64_C(65535); 4197 break; 4198 } 4199 case Mips::B16_MM: 4200 case Mips::BC16_MMR6: { 4201 // op: offset 4202 op = getBranchTargetOpValueMMPC10(MI, 0, Fixups, STI); 4203 Value |= op & UINT64_C(1023); 4204 break; 4205 } 4206 case Mips::Move32R16: { 4207 // op: r32 4208 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4209 Value |= (op & UINT64_C(7)) << 5; 4210 Value |= op & UINT64_C(24); 4211 // op: rz 4212 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4213 Value |= op & UINT64_C(7); 4214 break; 4215 } 4216 case Mips::MFHI: 4217 case Mips::MFHI64: 4218 case Mips::MFLO: 4219 case Mips::MFLO64: { 4220 // op: rd 4221 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4222 Value |= (op & UINT64_C(31)) << 11; 4223 break; 4224 } 4225 case Mips::MFHI_DSP: 4226 case Mips::MFLO_DSP: { 4227 // op: rd 4228 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4229 Value |= (op & UINT64_C(31)) << 11; 4230 // op: ac 4231 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4232 Value |= (op & UINT64_C(3)) << 21; 4233 break; 4234 } 4235 case Mips::LWXS_MM: { 4236 // op: rd 4237 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4238 Value |= (op & UINT64_C(31)) << 11; 4239 // op: base 4240 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4241 Value |= (op & UINT64_C(31)) << 16; 4242 // op: index 4243 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4244 Value |= (op & UINT64_C(31)) << 21; 4245 break; 4246 } 4247 case Mips::LBUX: 4248 case Mips::LHX: 4249 case Mips::LWX: { 4250 // op: rd 4251 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4252 Value |= (op & UINT64_C(31)) << 11; 4253 // op: base 4254 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4255 Value |= (op & UINT64_C(31)) << 21; 4256 // op: index 4257 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4258 Value |= (op & UINT64_C(31)) << 16; 4259 break; 4260 } 4261 case Mips::REPL_PH: 4262 case Mips::REPL_PH_MM: 4263 case Mips::REPL_QB: { 4264 // op: rd 4265 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4266 Value |= (op & UINT64_C(31)) << 11; 4267 // op: imm 4268 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4269 Value |= (op & UINT64_C(1023)) << 16; 4270 break; 4271 } 4272 case Mips::RDDSP: { 4273 // op: rd 4274 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4275 Value |= (op & UINT64_C(31)) << 11; 4276 // op: mask 4277 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4278 Value |= (op & UINT64_C(1023)) << 16; 4279 break; 4280 } 4281 case Mips::ADDQH_PH_MMR2: 4282 case Mips::ADDQH_R_PH_MMR2: 4283 case Mips::ADDQH_R_W_MMR2: 4284 case Mips::ADDQH_W_MMR2: 4285 case Mips::ADDQ_PH_MM: 4286 case Mips::ADDQ_S_PH_MM: 4287 case Mips::ADDQ_S_W_MM: 4288 case Mips::ADDSC_MM: 4289 case Mips::ADDUH_QB_MMR2: 4290 case Mips::ADDUH_R_QB_MMR2: 4291 case Mips::ADDU_PH_MMR2: 4292 case Mips::ADDU_QB_MM: 4293 case Mips::ADDU_S_PH_MMR2: 4294 case Mips::ADDU_S_QB_MM: 4295 case Mips::ADDWC_MM: 4296 case Mips::CMPGDU_EQ_QB_MMR2: 4297 case Mips::CMPGDU_LE_QB_MMR2: 4298 case Mips::CMPGDU_LT_QB_MMR2: 4299 case Mips::MODSUB_MM: 4300 case Mips::MULEQ_S_W_PHL_MM: 4301 case Mips::MULEQ_S_W_PHR_MM: 4302 case Mips::MULEU_S_PH_QBL_MM: 4303 case Mips::MULEU_S_PH_QBR_MM: 4304 case Mips::MULQ_RS_PH_MM: 4305 case Mips::MULQ_RS_W_MMR2: 4306 case Mips::MULQ_S_PH_MMR2: 4307 case Mips::MULQ_S_W_MMR2: 4308 case Mips::MUL_PH_MMR2: 4309 case Mips::MUL_S_PH_MMR2: 4310 case Mips::PACKRL_PH_MM: 4311 case Mips::PICK_PH_MM: 4312 case Mips::PICK_QB_MM: 4313 case Mips::PRECRQU_S_QB_PH_MM: 4314 case Mips::PRECRQ_PH_W_MM: 4315 case Mips::PRECRQ_QB_PH_MM: 4316 case Mips::PRECRQ_RS_PH_W_MM: 4317 case Mips::PRECR_QB_PH_MMR2: 4318 case Mips::SELEQZ_MMR6: 4319 case Mips::SELNEZ_MMR6: 4320 case Mips::SUBQH_PH_MMR2: 4321 case Mips::SUBQH_R_PH_MMR2: 4322 case Mips::SUBQH_R_W_MMR2: 4323 case Mips::SUBQH_W_MMR2: 4324 case Mips::SUBQ_PH_MM: 4325 case Mips::SUBQ_S_PH_MM: 4326 case Mips::SUBQ_S_W_MM: 4327 case Mips::SUBUH_QB_MMR2: 4328 case Mips::SUBUH_R_QB_MMR2: 4329 case Mips::SUBU_PH_MMR2: 4330 case Mips::SUBU_QB_MM: 4331 case Mips::SUBU_S_PH_MMR2: 4332 case Mips::SUBU_S_QB_MM: { 4333 // op: rd 4334 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4335 Value |= (op & UINT64_C(31)) << 11; 4336 // op: rs 4337 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4338 Value |= (op & UINT64_C(31)) << 16; 4339 // op: rt 4340 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4341 Value |= (op & UINT64_C(31)) << 21; 4342 break; 4343 } 4344 case Mips::LSA_MMR6: { 4345 // op: rd 4346 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4347 Value |= (op & UINT64_C(31)) << 11; 4348 // op: rs 4349 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4350 Value |= (op & UINT64_C(31)) << 16; 4351 // op: rt 4352 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4353 Value |= (op & UINT64_C(31)) << 21; 4354 // op: imm2 4355 op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI); 4356 Value |= (op & UINT64_C(3)) << 9; 4357 break; 4358 } 4359 case Mips::CLO_R6: 4360 case Mips::CLZ_R6: 4361 case Mips::DCLO_R6: 4362 case Mips::DCLZ_R6: 4363 case Mips::DPOP: 4364 case Mips::JALR: 4365 case Mips::JALR64: 4366 case Mips::JALR_HB: 4367 case Mips::JALR_HB64: 4368 case Mips::POP: 4369 case Mips::RADDU_W_QB: { 4370 // op: rd 4371 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4372 Value |= (op & UINT64_C(31)) << 11; 4373 // op: rs 4374 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4375 Value |= (op & UINT64_C(31)) << 21; 4376 break; 4377 } 4378 case Mips::MOVF_I: 4379 case Mips::MOVF_I64: 4380 case Mips::MOVT_I: 4381 case Mips::MOVT_I64: { 4382 // op: rd 4383 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4384 Value |= (op & UINT64_C(31)) << 11; 4385 // op: rs 4386 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4387 Value |= (op & UINT64_C(31)) << 21; 4388 // op: fcc 4389 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4390 Value |= (op & UINT64_C(7)) << 18; 4391 break; 4392 } 4393 case Mips::ADD: 4394 case Mips::ADDQH_PH: 4395 case Mips::ADDQH_R_PH: 4396 case Mips::ADDQH_R_W: 4397 case Mips::ADDQH_W: 4398 case Mips::ADDQ_PH: 4399 case Mips::ADDQ_S_PH: 4400 case Mips::ADDQ_S_W: 4401 case Mips::ADDSC: 4402 case Mips::ADDUH_QB: 4403 case Mips::ADDUH_R_QB: 4404 case Mips::ADDU_PH: 4405 case Mips::ADDU_QB: 4406 case Mips::ADDU_S_PH: 4407 case Mips::ADDU_S_QB: 4408 case Mips::ADDWC: 4409 case Mips::ADDu: 4410 case Mips::AND: 4411 case Mips::AND64: 4412 case Mips::BADDu: 4413 case Mips::DADD: 4414 case Mips::DADDu: 4415 case Mips::DDIV: 4416 case Mips::DDIVU: 4417 case Mips::DIV: 4418 case Mips::DIVU: 4419 case Mips::DMOD: 4420 case Mips::DMODU: 4421 case Mips::DMUH: 4422 case Mips::DMUHU: 4423 case Mips::DMUL: 4424 case Mips::DMULU: 4425 case Mips::DMUL_R6: 4426 case Mips::DSUB: 4427 case Mips::DSUBu: 4428 case Mips::MOD: 4429 case Mips::MODSUB: 4430 case Mips::MODU: 4431 case Mips::MOVN_I64_I: 4432 case Mips::MOVN_I64_I64: 4433 case Mips::MOVN_I_I: 4434 case Mips::MOVN_I_I64: 4435 case Mips::MOVZ_I64_I: 4436 case Mips::MOVZ_I64_I64: 4437 case Mips::MOVZ_I_I: 4438 case Mips::MOVZ_I_I64: 4439 case Mips::MUH: 4440 case Mips::MUHU: 4441 case Mips::MUL: 4442 case Mips::MULEQ_S_W_PHL: 4443 case Mips::MULEQ_S_W_PHR: 4444 case Mips::MULEU_S_PH_QBL: 4445 case Mips::MULEU_S_PH_QBR: 4446 case Mips::MULQ_RS_PH: 4447 case Mips::MULQ_RS_W: 4448 case Mips::MULQ_S_PH: 4449 case Mips::MULQ_S_W: 4450 case Mips::MULU: 4451 case Mips::MUL_PH: 4452 case Mips::MUL_R6: 4453 case Mips::MUL_S_PH: 4454 case Mips::NOR: 4455 case Mips::NOR64: 4456 case Mips::OR: 4457 case Mips::OR64: 4458 case Mips::SELEQZ: 4459 case Mips::SELEQZ64: 4460 case Mips::SELNEZ: 4461 case Mips::SELNEZ64: 4462 case Mips::SEQ: 4463 case Mips::SLT: 4464 case Mips::SLT64: 4465 case Mips::SLTu: 4466 case Mips::SLTu64: 4467 case Mips::SNE: 4468 case Mips::SUB: 4469 case Mips::SUBQH_PH: 4470 case Mips::SUBQH_R_PH: 4471 case Mips::SUBQH_R_W: 4472 case Mips::SUBQH_W: 4473 case Mips::SUBQ_PH: 4474 case Mips::SUBQ_S_PH: 4475 case Mips::SUBQ_S_W: 4476 case Mips::SUBUH_QB: 4477 case Mips::SUBUH_R_QB: 4478 case Mips::SUBU_PH: 4479 case Mips::SUBU_QB: 4480 case Mips::SUBU_S_PH: 4481 case Mips::SUBU_S_QB: 4482 case Mips::SUBu: 4483 case Mips::V3MULU: 4484 case Mips::VMM0: 4485 case Mips::VMULU: 4486 case Mips::XOR: 4487 case Mips::XOR64: { 4488 // op: rd 4489 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4490 Value |= (op & UINT64_C(31)) << 11; 4491 // op: rs 4492 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4493 Value |= (op & UINT64_C(31)) << 21; 4494 // op: rt 4495 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4496 Value |= (op & UINT64_C(31)) << 16; 4497 break; 4498 } 4499 case Mips::ALIGN: { 4500 // op: rd 4501 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4502 Value |= (op & UINT64_C(31)) << 11; 4503 // op: rs 4504 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4505 Value |= (op & UINT64_C(31)) << 21; 4506 // op: rt 4507 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4508 Value |= (op & UINT64_C(31)) << 16; 4509 // op: bp 4510 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4511 Value |= (op & UINT64_C(3)) << 6; 4512 break; 4513 } 4514 case Mips::ALIGN_MMR6: { 4515 // op: rd 4516 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4517 Value |= (op & UINT64_C(31)) << 11; 4518 // op: rs 4519 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4520 Value |= (op & UINT64_C(31)) << 21; 4521 // op: rt 4522 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4523 Value |= (op & UINT64_C(31)) << 16; 4524 // op: bp 4525 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4526 Value |= (op & UINT64_C(3)) << 9; 4527 break; 4528 } 4529 case Mips::DALIGN: { 4530 // op: rd 4531 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4532 Value |= (op & UINT64_C(31)) << 11; 4533 // op: rs 4534 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4535 Value |= (op & UINT64_C(31)) << 21; 4536 // op: rt 4537 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4538 Value |= (op & UINT64_C(31)) << 16; 4539 // op: bp 4540 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 4541 Value |= (op & UINT64_C(7)) << 6; 4542 break; 4543 } 4544 case Mips::DLSA_R6: 4545 case Mips::LSA_R6: { 4546 // op: rd 4547 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4548 Value |= (op & UINT64_C(31)) << 11; 4549 // op: rs 4550 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4551 Value |= (op & UINT64_C(31)) << 21; 4552 // op: rt 4553 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4554 Value |= (op & UINT64_C(31)) << 16; 4555 // op: imm2 4556 op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI); 4557 Value |= (op & UINT64_C(3)) << 6; 4558 break; 4559 } 4560 case Mips::SHLLV_PH_MM: 4561 case Mips::SHLLV_QB_MM: 4562 case Mips::SHLLV_S_PH_MM: 4563 case Mips::SHLLV_S_W_MM: 4564 case Mips::SHRAV_PH_MM: 4565 case Mips::SHRAV_QB_MMR2: 4566 case Mips::SHRAV_R_PH_MM: 4567 case Mips::SHRAV_R_QB_MMR2: 4568 case Mips::SHRAV_R_W_MM: 4569 case Mips::SHRLV_PH_MMR2: 4570 case Mips::SHRLV_QB_MM: { 4571 // op: rd 4572 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4573 Value |= (op & UINT64_C(31)) << 11; 4574 // op: rs 4575 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4576 Value |= (op & UINT64_C(31)) << 16; 4577 // op: rt 4578 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4579 Value |= (op & UINT64_C(31)) << 21; 4580 break; 4581 } 4582 case Mips::ABSQ_S_PH: 4583 case Mips::ABSQ_S_QB: 4584 case Mips::ABSQ_S_W: 4585 case Mips::BITREV: 4586 case Mips::BITSWAP: 4587 case Mips::DBITSWAP: 4588 case Mips::DSBH: 4589 case Mips::DSHD: 4590 case Mips::DSLL64_32: 4591 case Mips::PRECEQU_PH_QBL: 4592 case Mips::PRECEQU_PH_QBLA: 4593 case Mips::PRECEQU_PH_QBR: 4594 case Mips::PRECEQU_PH_QBRA: 4595 case Mips::PRECEQ_W_PHL: 4596 case Mips::PRECEQ_W_PHR: 4597 case Mips::PRECEU_PH_QBL: 4598 case Mips::PRECEU_PH_QBLA: 4599 case Mips::PRECEU_PH_QBR: 4600 case Mips::PRECEU_PH_QBRA: 4601 case Mips::REPLV_PH: 4602 case Mips::REPLV_QB: 4603 case Mips::SEB: 4604 case Mips::SEB64: 4605 case Mips::SEH: 4606 case Mips::SEH64: 4607 case Mips::SLL64_32: 4608 case Mips::SLL64_64: 4609 case Mips::WSBH: { 4610 // op: rd 4611 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4612 Value |= (op & UINT64_C(31)) << 11; 4613 // op: rt 4614 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4615 Value |= (op & UINT64_C(31)) << 16; 4616 break; 4617 } 4618 case Mips::DROTRV: 4619 case Mips::DSLLV: 4620 case Mips::DSRAV: 4621 case Mips::DSRLV: 4622 case Mips::ROTRV: 4623 case Mips::SLLV: 4624 case Mips::SRAV: 4625 case Mips::SRLV: { 4626 // op: rd 4627 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4628 Value |= (op & UINT64_C(31)) << 11; 4629 // op: rt 4630 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4631 Value |= (op & UINT64_C(31)) << 16; 4632 // op: rs 4633 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4634 Value |= (op & UINT64_C(31)) << 21; 4635 break; 4636 } 4637 case Mips::SHLLV_PH: 4638 case Mips::SHLLV_QB: 4639 case Mips::SHLLV_S_PH: 4640 case Mips::SHLLV_S_W: 4641 case Mips::SHLL_PH: 4642 case Mips::SHLL_QB: 4643 case Mips::SHLL_S_PH: 4644 case Mips::SHLL_S_W: 4645 case Mips::SHRAV_PH: 4646 case Mips::SHRAV_QB: 4647 case Mips::SHRAV_R_PH: 4648 case Mips::SHRAV_R_QB: 4649 case Mips::SHRAV_R_W: 4650 case Mips::SHRA_PH: 4651 case Mips::SHRA_QB: 4652 case Mips::SHRA_R_PH: 4653 case Mips::SHRA_R_QB: 4654 case Mips::SHRA_R_W: 4655 case Mips::SHRLV_PH: 4656 case Mips::SHRLV_QB: 4657 case Mips::SHRL_PH: 4658 case Mips::SHRL_QB: { 4659 // op: rd 4660 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4661 Value |= (op & UINT64_C(31)) << 11; 4662 // op: rt 4663 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4664 Value |= (op & UINT64_C(31)) << 16; 4665 // op: rs_sa 4666 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4667 Value |= (op & UINT64_C(31)) << 21; 4668 break; 4669 } 4670 case Mips::DROTR: 4671 case Mips::DROTR32: 4672 case Mips::DSLL: 4673 case Mips::DSLL32: 4674 case Mips::DSRA: 4675 case Mips::DSRA32: 4676 case Mips::DSRL: 4677 case Mips::DSRL32: 4678 case Mips::ROTR: 4679 case Mips::SLL: 4680 case Mips::SRA: 4681 case Mips::SRL: { 4682 // op: rd 4683 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4684 Value |= (op & UINT64_C(31)) << 11; 4685 // op: rt 4686 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4687 Value |= (op & UINT64_C(31)) << 16; 4688 // op: shamt 4689 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4690 Value |= (op & UINT64_C(31)) << 6; 4691 break; 4692 } 4693 case Mips::ROTRV_MM: 4694 case Mips::SLLV_MM: 4695 case Mips::SRAV_MM: 4696 case Mips::SRLV_MM: { 4697 // op: rd 4698 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4699 Value |= (op & UINT64_C(31)) << 11; 4700 // op: rt 4701 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4702 Value |= (op & UINT64_C(31)) << 21; 4703 // op: rs 4704 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4705 Value |= (op & UINT64_C(31)) << 16; 4706 break; 4707 } 4708 case Mips::ADDU_MMR6: 4709 case Mips::ADD_MMR6: 4710 case Mips::AND_MMR6: 4711 case Mips::DIVU_MMR6: 4712 case Mips::DIV_MMR6: 4713 case Mips::MODU_MMR6: 4714 case Mips::MOD_MMR6: 4715 case Mips::MUHU_MMR6: 4716 case Mips::MUH_MMR6: 4717 case Mips::MULU_MMR6: 4718 case Mips::MUL_MMR6: 4719 case Mips::NOR_MMR6: 4720 case Mips::OR_MMR6: 4721 case Mips::SUBU_MMR6: 4722 case Mips::SUB_MMR6: 4723 case Mips::XOR_MMR6: { 4724 // op: rd 4725 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4726 Value |= (op & UINT64_C(31)) << 11; 4727 // op: rt 4728 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4729 Value |= (op & UINT64_C(31)) << 21; 4730 // op: rs 4731 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4732 Value |= (op & UINT64_C(31)) << 16; 4733 break; 4734 } 4735 case Mips::MFHI_MM: 4736 case Mips::MFLO_MM: { 4737 // op: rd 4738 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4739 Value |= (op & UINT64_C(31)) << 16; 4740 break; 4741 } 4742 case Mips::BITSWAP_MMR6: { 4743 // op: rd 4744 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4745 Value |= (op & UINT64_C(31)) << 16; 4746 // op: rt 4747 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4748 Value |= (op & UINT64_C(31)) << 21; 4749 break; 4750 } 4751 case Mips::CLO: 4752 case Mips::CLZ: 4753 case Mips::DCLO: 4754 case Mips::DCLZ: { 4755 // op: rd 4756 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4757 Value |= (op & UINT64_C(31)) << 16; 4758 Value |= (op & UINT64_C(31)) << 11; 4759 // op: rs 4760 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4761 Value |= (op & UINT64_C(31)) << 21; 4762 break; 4763 } 4764 case Mips::CLO_MM: 4765 case Mips::CLZ_MM: { 4766 // op: rd 4767 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4768 Value |= (op & UINT64_C(31)) << 21; 4769 // op: rs 4770 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4771 Value |= (op & UINT64_C(31)) << 16; 4772 break; 4773 } 4774 case Mips::MOVF_I_MM: 4775 case Mips::MOVT_I_MM: { 4776 // op: rd 4777 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4778 Value |= (op & UINT64_C(31)) << 21; 4779 // op: rs 4780 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4781 Value |= (op & UINT64_C(31)) << 16; 4782 // op: fcc 4783 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4784 Value |= (op & UINT64_C(7)) << 13; 4785 break; 4786 } 4787 case Mips::SEB_MM: 4788 case Mips::SEH_MM: 4789 case Mips::WSBH_MM: { 4790 // op: rd 4791 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4792 Value |= (op & UINT64_C(31)) << 21; 4793 // op: rt 4794 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4795 Value |= (op & UINT64_C(31)) << 16; 4796 break; 4797 } 4798 case Mips::ROTR_MM: 4799 case Mips::SLL_MM: 4800 case Mips::SLL_MMR6: 4801 case Mips::SRA_MM: 4802 case Mips::SRL_MM: { 4803 // op: rd 4804 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4805 Value |= (op & UINT64_C(31)) << 21; 4806 // op: rt 4807 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4808 Value |= (op & UINT64_C(31)) << 16; 4809 // op: shamt 4810 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4811 Value |= (op & UINT64_C(31)) << 11; 4812 break; 4813 } 4814 case Mips::CFCMSA: { 4815 // op: rd 4816 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4817 Value |= (op & UINT64_C(31)) << 6; 4818 // op: cs 4819 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4820 Value |= (op & UINT64_C(31)) << 11; 4821 break; 4822 } 4823 case Mips::LI16_MM: 4824 case Mips::LI16_MMR6: { 4825 // op: rd 4826 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4827 Value |= (op & UINT64_C(7)) << 7; 4828 // op: imm 4829 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4830 Value |= op & UINT64_C(127); 4831 break; 4832 } 4833 case Mips::ADDIUR1SP_MM: { 4834 // op: rd 4835 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4836 Value |= (op & UINT64_C(7)) << 7; 4837 // op: imm 4838 op = getUImm6Lsl2Encoding(MI, 1, Fixups, STI); 4839 Value |= (op & UINT64_C(63)) << 1; 4840 break; 4841 } 4842 case Mips::ADDIUR2_MM: { 4843 // op: rd 4844 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4845 Value |= (op & UINT64_C(7)) << 7; 4846 // op: rs 4847 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4848 Value |= (op & UINT64_C(7)) << 4; 4849 // op: imm 4850 op = getSImm3Lsa2Value(MI, 2, Fixups, STI); 4851 Value |= (op & UINT64_C(7)) << 1; 4852 break; 4853 } 4854 case Mips::ANDI16_MM: 4855 case Mips::ANDI16_MMR6: { 4856 // op: rd 4857 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4858 Value |= (op & UINT64_C(7)) << 7; 4859 // op: rs 4860 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4861 Value |= (op & UINT64_C(7)) << 4; 4862 // op: imm 4863 op = getUImm4AndValue(MI, 2, Fixups, STI); 4864 Value |= op & UINT64_C(15); 4865 break; 4866 } 4867 case Mips::SLL16_MM: 4868 case Mips::SLL16_MMR6: 4869 case Mips::SRL16_MM: 4870 case Mips::SRL16_MMR6: { 4871 // op: rd 4872 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4873 Value |= (op & UINT64_C(7)) << 7; 4874 // op: rt 4875 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4876 Value |= (op & UINT64_C(7)) << 4; 4877 // op: shamt 4878 op = getUImm3Mod8Encoding(MI, 2, Fixups, STI); 4879 Value |= (op & UINT64_C(7)) << 1; 4880 break; 4881 } 4882 case Mips::ADDU16_MM: 4883 case Mips::SUBU16_MM: { 4884 // op: rd 4885 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4886 Value |= (op & UINT64_C(7)) << 7; 4887 // op: rt 4888 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4889 Value |= (op & UINT64_C(7)) << 4; 4890 // op: rs 4891 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4892 Value |= (op & UINT64_C(7)) << 1; 4893 break; 4894 } 4895 case Mips::MFHI16_MM: 4896 case Mips::MFLO16_MM: { 4897 // op: rd 4898 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4899 Value |= op & UINT64_C(31); 4900 break; 4901 } 4902 case Mips::ADDIUS5_MM: { 4903 // op: rd 4904 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4905 Value |= (op & UINT64_C(31)) << 5; 4906 // op: imm 4907 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4908 Value |= (op & UINT64_C(15)) << 1; 4909 break; 4910 } 4911 case Mips::DVP_MMR6: 4912 case Mips::EVP_MMR6: 4913 case Mips::JR_MM: 4914 case Mips::MTHI_MM: 4915 case Mips::MTLO_MM: { 4916 // op: rs 4917 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4918 Value |= (op & UINT64_C(31)) << 16; 4919 break; 4920 } 4921 case Mips::MFHI_DSP_MM: 4922 case Mips::MFLO_DSP_MM: { 4923 // op: rs 4924 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4925 Value |= (op & UINT64_C(31)) << 16; 4926 // op: ac 4927 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4928 Value |= (op & UINT64_C(3)) << 14; 4929 break; 4930 } 4931 case Mips::TEQI_MM: 4932 case Mips::TGEIU_MM: 4933 case Mips::TGEI_MM: 4934 case Mips::TLTIU_MM: 4935 case Mips::TLTI_MM: 4936 case Mips::TNEI_MM: { 4937 // op: rs 4938 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4939 Value |= (op & UINT64_C(31)) << 16; 4940 // op: imm16 4941 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4942 Value |= op & UINT64_C(65535); 4943 break; 4944 } 4945 case Mips::BEQZC_MM: 4946 case Mips::BGEZALS_MM: 4947 case Mips::BGEZAL_MM: 4948 case Mips::BGEZ_MM: 4949 case Mips::BGTZ_MM: 4950 case Mips::BLEZ_MM: 4951 case Mips::BLTZALS_MM: 4952 case Mips::BLTZAL_MM: 4953 case Mips::BLTZ_MM: 4954 case Mips::BNEZC_MM: { 4955 // op: rs 4956 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4957 Value |= (op & UINT64_C(31)) << 16; 4958 // op: offset 4959 op = getBranchTargetOpValueMM(MI, 1, Fixups, STI); 4960 Value |= op & UINT64_C(65535); 4961 break; 4962 } 4963 case Mips::MADDU_MM: 4964 case Mips::MADD_MM: 4965 case Mips::MSUBU_MM: 4966 case Mips::MSUB_MM: 4967 case Mips::MULT_MM: 4968 case Mips::MULTu_MM: 4969 case Mips::SDIV_MM: 4970 case Mips::UDIV_MM: { 4971 // op: rs 4972 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4973 Value |= (op & UINT64_C(31)) << 16; 4974 // op: rt 4975 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4976 Value |= (op & UINT64_C(31)) << 21; 4977 break; 4978 } 4979 case Mips::TEQ_MM: 4980 case Mips::TGEU_MM: 4981 case Mips::TGE_MM: 4982 case Mips::TLTU_MM: 4983 case Mips::TLT_MM: 4984 case Mips::TNE_MM: { 4985 // op: rs 4986 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4987 Value |= (op & UINT64_C(31)) << 16; 4988 // op: rt 4989 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4990 Value |= (op & UINT64_C(31)) << 21; 4991 // op: code_ 4992 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4993 Value |= (op & UINT64_C(15)) << 12; 4994 break; 4995 } 4996 case Mips::BEQ_MM: 4997 case Mips::BNE_MM: { 4998 // op: rs 4999 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5000 Value |= (op & UINT64_C(31)) << 16; 5001 // op: rt 5002 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5003 Value |= (op & UINT64_C(31)) << 21; 5004 // op: offset 5005 op = getBranchTargetOpValueMM(MI, 2, Fixups, STI); 5006 Value |= op & UINT64_C(65535); 5007 break; 5008 } 5009 case Mips::GINVI_MMR6: { 5010 // op: rs 5011 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5012 Value |= (op & UINT64_C(31)) << 16; 5013 // op: type 5014 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5015 Value |= (op & UINT64_C(3)) << 9; 5016 break; 5017 } 5018 case Mips::GINVT_MMR6: { 5019 // op: rs 5020 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5021 Value |= (op & UINT64_C(31)) << 16; 5022 // op: type 5023 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5024 Value |= (op & UINT64_C(3)) << 9; 5025 break; 5026 } 5027 case Mips::JR: 5028 case Mips::JR64: 5029 case Mips::JR_HB: 5030 case Mips::JR_HB64: 5031 case Mips::JR_HB64_R6: 5032 case Mips::JR_HB_R6: 5033 case Mips::MTHI: 5034 case Mips::MTHI64: 5035 case Mips::MTLO: 5036 case Mips::MTLO64: 5037 case Mips::MTM0: 5038 case Mips::MTM1: 5039 case Mips::MTM2: 5040 case Mips::MTP0: 5041 case Mips::MTP1: 5042 case Mips::MTP2: { 5043 // op: rs 5044 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5045 Value |= (op & UINT64_C(31)) << 21; 5046 break; 5047 } 5048 case Mips::ALUIPC: 5049 case Mips::AUIPC: { 5050 // op: rs 5051 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5052 Value |= (op & UINT64_C(31)) << 21; 5053 // op: imm 5054 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5055 Value |= op & UINT64_C(65535); 5056 break; 5057 } 5058 case Mips::DAHI: 5059 case Mips::DATI: { 5060 // op: rs 5061 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5062 Value |= (op & UINT64_C(31)) << 21; 5063 // op: imm 5064 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5065 Value |= op & UINT64_C(65535); 5066 break; 5067 } 5068 case Mips::LDPC: { 5069 // op: rs 5070 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5071 Value |= (op & UINT64_C(31)) << 21; 5072 // op: imm 5073 op = getSimm18Lsl3Encoding(MI, 1, Fixups, STI); 5074 Value |= op & UINT64_C(262143); 5075 break; 5076 } 5077 case Mips::ADDIUPC: 5078 case Mips::LWPC: 5079 case Mips::LWUPC: { 5080 // op: rs 5081 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5082 Value |= (op & UINT64_C(31)) << 21; 5083 // op: imm 5084 op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI); 5085 Value |= op & UINT64_C(524287); 5086 break; 5087 } 5088 case Mips::TEQI: 5089 case Mips::TGEI: 5090 case Mips::TGEIU: 5091 case Mips::TLTI: 5092 case Mips::TNEI: 5093 case Mips::TTLTIU: { 5094 // op: rs 5095 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5096 Value |= (op & UINT64_C(31)) << 21; 5097 // op: imm16 5098 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5099 Value |= op & UINT64_C(65535); 5100 break; 5101 } 5102 case Mips::WRDSP: { 5103 // op: rs 5104 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5105 Value |= (op & UINT64_C(31)) << 21; 5106 // op: mask 5107 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5108 Value |= (op & UINT64_C(1023)) << 11; 5109 break; 5110 } 5111 case Mips::BEQZC: 5112 case Mips::BEQZC64: 5113 case Mips::BNEZC: 5114 case Mips::BNEZC64: { 5115 // op: rs 5116 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5117 Value |= (op & UINT64_C(31)) << 21; 5118 // op: offset 5119 op = getBranchTarget21OpValue(MI, 1, Fixups, STI); 5120 Value |= op & UINT64_C(2097151); 5121 break; 5122 } 5123 case Mips::BEQZC_MMR6: 5124 case Mips::BNEZC_MMR6: { 5125 // op: rs 5126 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5127 Value |= (op & UINT64_C(31)) << 21; 5128 // op: offset 5129 op = getBranchTarget21OpValueMM(MI, 1, Fixups, STI); 5130 Value |= op & UINT64_C(2097151); 5131 break; 5132 } 5133 case Mips::BGEZ: 5134 case Mips::BGEZ64: 5135 case Mips::BGEZAL: 5136 case Mips::BGEZALL: 5137 case Mips::BGEZL: 5138 case Mips::BGTZ: 5139 case Mips::BGTZ64: 5140 case Mips::BGTZL: 5141 case Mips::BLEZ: 5142 case Mips::BLEZ64: 5143 case Mips::BLEZL: 5144 case Mips::BLTZ: 5145 case Mips::BLTZ64: 5146 case Mips::BLTZAL: 5147 case Mips::BLTZALL: 5148 case Mips::BLTZL: { 5149 // op: rs 5150 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5151 Value |= (op & UINT64_C(31)) << 21; 5152 // op: offset 5153 op = getBranchTargetOpValue(MI, 1, Fixups, STI); 5154 Value |= op & UINT64_C(65535); 5155 break; 5156 } 5157 case Mips::BBIT0: 5158 case Mips::BBIT032: 5159 case Mips::BBIT1: 5160 case Mips::BBIT132: { 5161 // op: rs 5162 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5163 Value |= (op & UINT64_C(31)) << 21; 5164 // op: p 5165 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5166 Value |= (op & UINT64_C(31)) << 16; 5167 // op: offset 5168 op = getBranchTargetOpValue(MI, 2, Fixups, STI); 5169 Value |= op & UINT64_C(65535); 5170 break; 5171 } 5172 case Mips::CMPU_EQ_QB: 5173 case Mips::CMPU_LE_QB: 5174 case Mips::CMPU_LT_QB: 5175 case Mips::CMP_EQ_PH: 5176 case Mips::CMP_LE_PH: 5177 case Mips::CMP_LT_PH: 5178 case Mips::DMULT: 5179 case Mips::DMULTu: 5180 case Mips::DSDIV: 5181 case Mips::DUDIV: 5182 case Mips::MADD: 5183 case Mips::MADDU: 5184 case Mips::MSUB: 5185 case Mips::MSUBU: 5186 case Mips::MULT: 5187 case Mips::MULTu: 5188 case Mips::SDIV: 5189 case Mips::UDIV: { 5190 // op: rs 5191 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5192 Value |= (op & UINT64_C(31)) << 21; 5193 // op: rt 5194 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5195 Value |= (op & UINT64_C(31)) << 16; 5196 break; 5197 } 5198 case Mips::TEQ: 5199 case Mips::TGE: 5200 case Mips::TGEU: 5201 case Mips::TLT: 5202 case Mips::TLTU: 5203 case Mips::TNE: { 5204 // op: rs 5205 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5206 Value |= (op & UINT64_C(31)) << 21; 5207 // op: rt 5208 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5209 Value |= (op & UINT64_C(31)) << 16; 5210 // op: code_ 5211 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5212 Value |= (op & UINT64_C(1023)) << 6; 5213 break; 5214 } 5215 case Mips::BEQ: 5216 case Mips::BEQ64: 5217 case Mips::BEQC: 5218 case Mips::BEQC64: 5219 case Mips::BEQL: 5220 case Mips::BGEC: 5221 case Mips::BGEC64: 5222 case Mips::BGEUC: 5223 case Mips::BGEUC64: 5224 case Mips::BLTC: 5225 case Mips::BLTC64: 5226 case Mips::BLTUC: 5227 case Mips::BLTUC64: 5228 case Mips::BNE: 5229 case Mips::BNE64: 5230 case Mips::BNEC: 5231 case Mips::BNEC64: 5232 case Mips::BNEL: 5233 case Mips::BNVC: 5234 case Mips::BOVC: { 5235 // op: rs 5236 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5237 Value |= (op & UINT64_C(31)) << 21; 5238 // op: rt 5239 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5240 Value |= (op & UINT64_C(31)) << 16; 5241 // op: offset 5242 op = getBranchTargetOpValue(MI, 2, Fixups, STI); 5243 Value |= op & UINT64_C(65535); 5244 break; 5245 } 5246 case Mips::FORK: { 5247 // op: rs 5248 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5249 Value |= (op & UINT64_C(31)) << 21; 5250 // op: rt 5251 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5252 Value |= (op & UINT64_C(31)) << 16; 5253 // op: rd 5254 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5255 Value |= (op & UINT64_C(31)) << 11; 5256 break; 5257 } 5258 case Mips::GINVI: { 5259 // op: rs 5260 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5261 Value |= (op & UINT64_C(31)) << 21; 5262 // op: type_ 5263 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5264 Value |= (op & UINT64_C(3)) << 8; 5265 break; 5266 } 5267 case Mips::GINVT: { 5268 // op: rs 5269 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5270 Value |= (op & UINT64_C(31)) << 21; 5271 // op: type_ 5272 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5273 Value |= (op & UINT64_C(3)) << 8; 5274 break; 5275 } 5276 case Mips::JALRC16_MMR6: 5277 case Mips::JRC16_MMR6: { 5278 // op: rs 5279 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5280 Value |= (op & UINT64_C(31)) << 5; 5281 break; 5282 } 5283 case Mips::ADDIUPC_MM: { 5284 // op: rs 5285 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5286 Value |= (op & UINT64_C(7)) << 23; 5287 // op: imm 5288 op = getSimm23Lsl2Encoding(MI, 1, Fixups, STI); 5289 Value |= op & UINT64_C(8388607); 5290 break; 5291 } 5292 case Mips::BEQZ16_MM: 5293 case Mips::BEQZC16_MMR6: 5294 case Mips::BNEZ16_MM: 5295 case Mips::BNEZC16_MMR6: { 5296 // op: rs 5297 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5298 Value |= (op & UINT64_C(7)) << 7; 5299 // op: offset 5300 op = getBranchTarget7OpValueMM(MI, 1, Fixups, STI); 5301 Value |= op & UINT64_C(127); 5302 break; 5303 } 5304 case Mips::JALR16_MM: 5305 case Mips::JALRS16_MM: 5306 case Mips::JR16_MM: 5307 case Mips::JRC16_MM: { 5308 // op: rs 5309 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5310 Value |= op & UINT64_C(31); 5311 break; 5312 } 5313 case Mips::CTCMSA: { 5314 // op: rs 5315 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5316 Value |= (op & UINT64_C(31)) << 11; 5317 // op: cd 5318 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5319 Value |= (op & UINT64_C(31)) << 6; 5320 break; 5321 } 5322 case Mips::FILL_B: 5323 case Mips::FILL_D: 5324 case Mips::FILL_H: 5325 case Mips::FILL_W: { 5326 // op: rs 5327 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5328 Value |= (op & UINT64_C(31)) << 11; 5329 // op: wd 5330 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5331 Value |= (op & UINT64_C(31)) << 6; 5332 break; 5333 } 5334 case Mips::MTHI_DSP_MM: 5335 case Mips::MTHLIP_MM: 5336 case Mips::MTLO_DSP_MM: 5337 case Mips::SHILOV_MM: { 5338 // op: rs 5339 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5340 Value |= (op & UINT64_C(31)) << 16; 5341 // op: ac 5342 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5343 Value |= (op & UINT64_C(3)) << 14; 5344 break; 5345 } 5346 case Mips::JALRS_MM: 5347 case Mips::JALR_MM: { 5348 // op: rs 5349 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5350 Value |= (op & UINT64_C(31)) << 16; 5351 // op: rd 5352 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5353 Value |= (op & UINT64_C(31)) << 21; 5354 break; 5355 } 5356 case Mips::CLO_MMR6: { 5357 // op: rs 5358 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5359 Value |= (op & UINT64_C(31)) << 16; 5360 // op: rt 5361 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5362 Value |= (op & UINT64_C(31)) << 21; 5363 break; 5364 } 5365 case Mips::AUI_MMR6: { 5366 // op: rs 5367 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5368 Value |= (op & UINT64_C(31)) << 16; 5369 // op: rt 5370 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5371 Value |= (op & UINT64_C(31)) << 21; 5372 // op: imm 5373 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5374 Value |= op & UINT64_C(65535); 5375 break; 5376 } 5377 case Mips::ADDi_MM: 5378 case Mips::ADDiu_MM: 5379 case Mips::ANDi_MM: 5380 case Mips::ORi_MM: 5381 case Mips::XORi_MM: { 5382 // op: rs 5383 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5384 Value |= (op & UINT64_C(31)) << 16; 5385 // op: rt 5386 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5387 Value |= (op & UINT64_C(31)) << 21; 5388 // op: imm16 5389 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5390 Value |= op & UINT64_C(65535); 5391 break; 5392 } 5393 case Mips::MTHI_DSP: 5394 case Mips::MTLO_DSP: { 5395 // op: rs 5396 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5397 Value |= (op & UINT64_C(31)) << 21; 5398 // op: ac 5399 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5400 Value |= (op & UINT64_C(3)) << 11; 5401 break; 5402 } 5403 case Mips::YIELD: { 5404 // op: rs 5405 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5406 Value |= (op & UINT64_C(31)) << 21; 5407 // op: rd 5408 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5409 Value |= (op & UINT64_C(31)) << 11; 5410 break; 5411 } 5412 case Mips::CLZ_MMR6: { 5413 // op: rs 5414 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5415 Value |= (op & UINT64_C(31)) << 21; 5416 // op: rt 5417 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5418 Value |= (op & UINT64_C(31)) << 11; 5419 break; 5420 } 5421 case Mips::AUI: 5422 case Mips::DAUI: { 5423 // op: rs 5424 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5425 Value |= (op & UINT64_C(31)) << 21; 5426 // op: rt 5427 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5428 Value |= (op & UINT64_C(31)) << 16; 5429 // op: imm 5430 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5431 Value |= op & UINT64_C(65535); 5432 break; 5433 } 5434 case Mips::SEQi: 5435 case Mips::SNEi: { 5436 // op: rs 5437 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5438 Value |= (op & UINT64_C(31)) << 21; 5439 // op: rt 5440 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5441 Value |= (op & UINT64_C(31)) << 16; 5442 // op: imm10 5443 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5444 Value |= (op & UINT64_C(1023)) << 6; 5445 break; 5446 } 5447 case Mips::ADDi: 5448 case Mips::ADDiu: 5449 case Mips::ANDi: 5450 case Mips::ANDi64: 5451 case Mips::DADDi: 5452 case Mips::DADDiu: 5453 case Mips::ORi: 5454 case Mips::ORi64: 5455 case Mips::XORi: 5456 case Mips::XORi64: { 5457 // op: rs 5458 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5459 Value |= (op & UINT64_C(31)) << 21; 5460 // op: rt 5461 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5462 Value |= (op & UINT64_C(31)) << 16; 5463 // op: imm16 5464 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5465 Value |= op & UINT64_C(65535); 5466 break; 5467 } 5468 case Mips::PRECR_SRA_PH_W: 5469 case Mips::PRECR_SRA_R_PH_W: { 5470 // op: rs 5471 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5472 Value |= (op & UINT64_C(31)) << 21; 5473 // op: rt 5474 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5475 Value |= (op & UINT64_C(31)) << 16; 5476 // op: sa 5477 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5478 Value |= (op & UINT64_C(31)) << 11; 5479 break; 5480 } 5481 case Mips::CRC32B: 5482 case Mips::CRC32CB: 5483 case Mips::CRC32CD: 5484 case Mips::CRC32CH: 5485 case Mips::CRC32CW: 5486 case Mips::CRC32D: 5487 case Mips::CRC32H: 5488 case Mips::CRC32W: { 5489 // op: rs 5490 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5491 Value |= (op & UINT64_C(31)) << 21; 5492 // op: rt 5493 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5494 Value |= (op & UINT64_C(31)) << 16; 5495 break; 5496 } 5497 case Mips::CMPGDU_EQ_QB: 5498 case Mips::CMPGDU_LE_QB: 5499 case Mips::CMPGDU_LT_QB: 5500 case Mips::CMPGU_EQ_QB: 5501 case Mips::CMPGU_LE_QB: 5502 case Mips::CMPGU_LT_QB: 5503 case Mips::PACKRL_PH: 5504 case Mips::PICK_PH: 5505 case Mips::PICK_QB: 5506 case Mips::PRECRQU_S_QB_PH: 5507 case Mips::PRECRQ_PH_W: 5508 case Mips::PRECRQ_QB_PH: 5509 case Mips::PRECRQ_RS_PH_W: 5510 case Mips::PRECR_QB_PH: { 5511 // op: rs 5512 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5513 Value |= (op & UINT64_C(31)) << 21; 5514 // op: rt 5515 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5516 Value |= (op & UINT64_C(31)) << 16; 5517 // op: rd 5518 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5519 Value |= (op & UINT64_C(31)) << 11; 5520 break; 5521 } 5522 case Mips::DLSA: 5523 case Mips::LSA: { 5524 // op: rs 5525 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5526 Value |= (op & UINT64_C(31)) << 21; 5527 // op: rt 5528 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5529 Value |= (op & UINT64_C(31)) << 16; 5530 // op: rd 5531 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5532 Value |= (op & UINT64_C(31)) << 11; 5533 // op: sa 5534 op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI); 5535 Value |= (op & UINT64_C(3)) << 6; 5536 break; 5537 } 5538 case Mips::ADDU16_MMR6: 5539 case Mips::SUBU16_MMR6: { 5540 // op: rs 5541 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5542 Value |= (op & UINT64_C(7)) << 7; 5543 // op: rt 5544 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5545 Value |= (op & UINT64_C(7)) << 4; 5546 // op: rd 5547 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5548 Value |= (op & UINT64_C(7)) << 1; 5549 break; 5550 } 5551 case Mips::MOVE16_MM: 5552 case Mips::MOVE16_MMR6: { 5553 // op: rs 5554 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5555 Value |= op & UINT64_C(31); 5556 // op: rd 5557 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5558 Value |= (op & UINT64_C(31)) << 5; 5559 break; 5560 } 5561 case Mips::DI: 5562 case Mips::DI_MM: 5563 case Mips::DI_MMR6: 5564 case Mips::DMT: 5565 case Mips::DVP: 5566 case Mips::DVPE: 5567 case Mips::EI: 5568 case Mips::EI_MM: 5569 case Mips::EI_MMR6: 5570 case Mips::EMT: 5571 case Mips::EVP: 5572 case Mips::EVPE: { 5573 // op: rt 5574 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5575 Value |= (op & UINT64_C(31)) << 16; 5576 break; 5577 } 5578 case Mips::EXTP: 5579 case Mips::EXTPDP: 5580 case Mips::EXTPDPV: 5581 case Mips::EXTPV: 5582 case Mips::EXTRV_RS_W: 5583 case Mips::EXTRV_R_W: 5584 case Mips::EXTRV_S_H: 5585 case Mips::EXTRV_W: 5586 case Mips::EXTR_RS_W: 5587 case Mips::EXTR_R_W: 5588 case Mips::EXTR_S_H: 5589 case Mips::EXTR_W: { 5590 // op: rt 5591 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5592 Value |= (op & UINT64_C(31)) << 16; 5593 // op: ac 5594 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5595 Value |= (op & UINT64_C(3)) << 11; 5596 // op: shift_rs 5597 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5598 Value |= (op & UINT64_C(31)) << 21; 5599 break; 5600 } 5601 case Mips::LL64_R6: 5602 case Mips::LLD_R6: 5603 case Mips::LL_R6: { 5604 // op: rt 5605 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5606 Value |= (op & UINT64_C(31)) << 16; 5607 // op: addr 5608 op = getMemEncoding(MI, 1, Fixups, STI); 5609 Value |= (op & UINT64_C(2031616)) << 5; 5610 Value |= (op & UINT64_C(511)) << 7; 5611 break; 5612 } 5613 case Mips::LB: 5614 case Mips::LB64: 5615 case Mips::LBu: 5616 case Mips::LBu64: 5617 case Mips::LD: 5618 case Mips::LDC1: 5619 case Mips::LDC164: 5620 case Mips::LDC2: 5621 case Mips::LDC3: 5622 case Mips::LDL: 5623 case Mips::LDR: 5624 case Mips::LEA_ADDiu: 5625 case Mips::LEA_ADDiu64: 5626 case Mips::LH: 5627 case Mips::LH64: 5628 case Mips::LHu: 5629 case Mips::LHu64: 5630 case Mips::LL: 5631 case Mips::LL64: 5632 case Mips::LLD: 5633 case Mips::LW: 5634 case Mips::LW64: 5635 case Mips::LWC1: 5636 case Mips::LWC2: 5637 case Mips::LWC3: 5638 case Mips::LWDSP: 5639 case Mips::LWL: 5640 case Mips::LWL64: 5641 case Mips::LWR: 5642 case Mips::LWR64: 5643 case Mips::LWu: 5644 case Mips::SB: 5645 case Mips::SB64: 5646 case Mips::SD: 5647 case Mips::SDC1: 5648 case Mips::SDC164: 5649 case Mips::SDC2: 5650 case Mips::SDC3: 5651 case Mips::SDL: 5652 case Mips::SDR: 5653 case Mips::SH: 5654 case Mips::SH64: 5655 case Mips::SW: 5656 case Mips::SW64: 5657 case Mips::SWC1: 5658 case Mips::SWC2: 5659 case Mips::SWC3: 5660 case Mips::SWDSP: 5661 case Mips::SWL: 5662 case Mips::SWL64: 5663 case Mips::SWR: 5664 case Mips::SWR64: { 5665 // op: rt 5666 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5667 Value |= (op & UINT64_C(31)) << 16; 5668 // op: addr 5669 op = getMemEncoding(MI, 1, Fixups, STI); 5670 Value |= (op & UINT64_C(2031616)) << 5; 5671 Value |= op & UINT64_C(65535); 5672 break; 5673 } 5674 case Mips::LDC2_R6: 5675 case Mips::LWC2_R6: 5676 case Mips::SDC2_R6: 5677 case Mips::SWC2_R6: { 5678 // op: rt 5679 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5680 Value |= (op & UINT64_C(31)) << 16; 5681 // op: addr 5682 op = getMemEncoding(MI, 1, Fixups, STI); 5683 Value |= (op & UINT64_C(2031616)) >> 5; 5684 Value |= op & UINT64_C(2047); 5685 break; 5686 } 5687 case Mips::CFC1: 5688 case Mips::DMFC1: 5689 case Mips::MFC1: 5690 case Mips::MFC1_D64: 5691 case Mips::MFHC1_D32: 5692 case Mips::MFHC1_D64: { 5693 // op: rt 5694 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5695 Value |= (op & UINT64_C(31)) << 16; 5696 // op: fs 5697 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5698 Value |= (op & UINT64_C(31)) << 11; 5699 break; 5700 } 5701 case Mips::DMFC2_OCTEON: 5702 case Mips::DMTC2_OCTEON: 5703 case Mips::LUi: 5704 case Mips::LUi64: 5705 case Mips::LUi_MM: { 5706 // op: rt 5707 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5708 Value |= (op & UINT64_C(31)) << 16; 5709 // op: imm16 5710 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5711 Value |= op & UINT64_C(65535); 5712 break; 5713 } 5714 case Mips::BEQZALC: 5715 case Mips::BGTZALC: 5716 case Mips::BGTZC: 5717 case Mips::BGTZC64: 5718 case Mips::BLEZALC: 5719 case Mips::BLEZC: 5720 case Mips::BLEZC64: 5721 case Mips::BNEZALC: { 5722 // op: rt 5723 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5724 Value |= (op & UINT64_C(31)) << 16; 5725 // op: offset 5726 op = getBranchTargetOpValue(MI, 1, Fixups, STI); 5727 Value |= op & UINT64_C(65535); 5728 break; 5729 } 5730 case Mips::BC1EQZC_MMR6: 5731 case Mips::BC1NEZC_MMR6: 5732 case Mips::BC2EQZC_MMR6: 5733 case Mips::BC2NEZC_MMR6: { 5734 // op: rt 5735 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5736 Value |= (op & UINT64_C(31)) << 16; 5737 // op: offset 5738 op = getBranchTargetOpValueMM(MI, 1, Fixups, STI); 5739 Value |= op & UINT64_C(65535); 5740 break; 5741 } 5742 case Mips::JIALC: 5743 case Mips::JIALC64: 5744 case Mips::JIALC_MMR6: 5745 case Mips::JIC: 5746 case Mips::JIC64: 5747 case Mips::JIC_MMR6: { 5748 // op: rt 5749 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5750 Value |= (op & UINT64_C(31)) << 16; 5751 // op: offset 5752 op = getJumpOffset16OpValue(MI, 1, Fixups, STI); 5753 Value |= op & UINT64_C(65535); 5754 break; 5755 } 5756 case Mips::RDHWR: 5757 case Mips::RDHWR64: { 5758 // op: rt 5759 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5760 Value |= (op & UINT64_C(31)) << 16; 5761 // op: rd 5762 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5763 Value |= (op & UINT64_C(31)) << 11; 5764 // op: sel 5765 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5766 Value |= (op & UINT64_C(7)) << 6; 5767 break; 5768 } 5769 case Mips::DMFC0: 5770 case Mips::DMFC2: 5771 case Mips::DMFGC0: 5772 case Mips::MFC0: 5773 case Mips::MFC2: 5774 case Mips::MFGC0: 5775 case Mips::MFHGC0: { 5776 // op: rt 5777 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5778 Value |= (op & UINT64_C(31)) << 16; 5779 // op: rd 5780 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5781 Value |= (op & UINT64_C(31)) << 11; 5782 // op: sel 5783 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5784 Value |= op & UINT64_C(7); 5785 break; 5786 } 5787 case Mips::SLTi: 5788 case Mips::SLTi64: 5789 case Mips::SLTiu: 5790 case Mips::SLTiu64: { 5791 // op: rt 5792 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5793 Value |= (op & UINT64_C(31)) << 16; 5794 // op: rs 5795 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5796 Value |= (op & UINT64_C(31)) << 21; 5797 // op: imm16 5798 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5799 Value |= op & UINT64_C(65535); 5800 break; 5801 } 5802 case Mips::CINS: 5803 case Mips::CINS32: 5804 case Mips::CINS64_32: 5805 case Mips::CINS_i32: 5806 case Mips::EXTS: 5807 case Mips::EXTS32: { 5808 // op: rt 5809 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5810 Value |= (op & UINT64_C(31)) << 16; 5811 // op: rs 5812 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5813 Value |= (op & UINT64_C(31)) << 21; 5814 // op: pos 5815 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5816 Value |= (op & UINT64_C(31)) << 6; 5817 // op: lenm1 5818 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 5819 Value |= (op & UINT64_C(31)) << 11; 5820 break; 5821 } 5822 case Mips::DINS: 5823 case Mips::DINSM: 5824 case Mips::DINSU: 5825 case Mips::INS: { 5826 // op: rt 5827 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5828 Value |= (op & UINT64_C(31)) << 16; 5829 // op: rs 5830 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5831 Value |= (op & UINT64_C(31)) << 21; 5832 // op: pos 5833 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5834 Value |= (op & UINT64_C(31)) << 6; 5835 // op: size 5836 op = getSizeInsEncoding(MI, 3, Fixups, STI); 5837 Value |= (op & UINT64_C(31)) << 11; 5838 break; 5839 } 5840 case Mips::DEXT: 5841 case Mips::DEXT64_32: 5842 case Mips::DEXTM: 5843 case Mips::DEXTU: 5844 case Mips::EXT: { 5845 // op: rt 5846 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5847 Value |= (op & UINT64_C(31)) << 16; 5848 // op: rs 5849 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5850 Value |= (op & UINT64_C(31)) << 21; 5851 // op: pos 5852 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5853 Value |= (op & UINT64_C(31)) << 6; 5854 // op: size 5855 op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI); 5856 Value |= (op & UINT64_C(31)) << 11; 5857 break; 5858 } 5859 case Mips::APPEND: 5860 case Mips::BALIGN: 5861 case Mips::PREPEND: { 5862 // op: rt 5863 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5864 Value |= (op & UINT64_C(31)) << 16; 5865 // op: rs 5866 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5867 Value |= (op & UINT64_C(31)) << 21; 5868 // op: sa 5869 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5870 Value |= (op & UINT64_C(31)) << 11; 5871 break; 5872 } 5873 case Mips::INSV: { 5874 // op: rt 5875 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5876 Value |= (op & UINT64_C(31)) << 16; 5877 // op: rs 5878 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5879 Value |= (op & UINT64_C(31)) << 21; 5880 break; 5881 } 5882 case Mips::LWU_MM: { 5883 // op: rt 5884 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5885 Value |= (op & UINT64_C(31)) << 21; 5886 // op: addr 5887 op = getMemEncoding(MI, 1, Fixups, STI); 5888 Value |= op & UINT64_C(2031616); 5889 Value |= op & UINT64_C(4095); 5890 break; 5891 } 5892 case Mips::LBE_MM: 5893 case Mips::LBuE_MM: 5894 case Mips::LHE_MM: 5895 case Mips::LHuE_MM: 5896 case Mips::LLE_MM: 5897 case Mips::LWE_MM: 5898 case Mips::SBE_MM: 5899 case Mips::SHE_MM: 5900 case Mips::SWE_MM: { 5901 // op: rt 5902 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5903 Value |= (op & UINT64_C(31)) << 21; 5904 // op: addr 5905 op = getMemEncoding(MI, 1, Fixups, STI); 5906 Value |= op & UINT64_C(2031616); 5907 Value |= op & UINT64_C(511); 5908 break; 5909 } 5910 case Mips::LEA_ADDiu_MM: 5911 case Mips::LH_MM: 5912 case Mips::LHu_MM: 5913 case Mips::LWDSP_MM: 5914 case Mips::LW_MM: 5915 case Mips::LW_MMR6: 5916 case Mips::SB_MM: 5917 case Mips::SB_MMR6: 5918 case Mips::SH_MM: 5919 case Mips::SH_MMR6: 5920 case Mips::SWDSP_MM: 5921 case Mips::SW_MM: 5922 case Mips::SW_MMR6: { 5923 // op: rt 5924 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5925 Value |= (op & UINT64_C(31)) << 21; 5926 // op: addr 5927 op = getMemEncoding(MI, 1, Fixups, STI); 5928 Value |= op & UINT64_C(2097151); 5929 break; 5930 } 5931 case Mips::LWP_MM: 5932 case Mips::SWP_MM: { 5933 // op: rt 5934 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5935 Value |= (op & UINT64_C(31)) << 21; 5936 // op: addr 5937 op = getMemEncoding(MI, 2, Fixups, STI); 5938 Value |= op & UINT64_C(2031616); 5939 Value |= op & UINT64_C(4095); 5940 break; 5941 } 5942 case Mips::LDC2_MMR6: 5943 case Mips::LWC2_MMR6: 5944 case Mips::SDC2_MMR6: 5945 case Mips::SWC2_MMR6: { 5946 // op: rt 5947 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5948 Value |= (op & UINT64_C(31)) << 21; 5949 // op: addr 5950 op = getMemEncodingMMImm11(MI, 1, Fixups, STI); 5951 Value |= op & UINT64_C(2031616); 5952 Value |= op & UINT64_C(2047); 5953 break; 5954 } 5955 case Mips::LL_MM: 5956 case Mips::LWL_MM: 5957 case Mips::LWR_MM: 5958 case Mips::SWL_MM: 5959 case Mips::SWR_MM: { 5960 // op: rt 5961 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5962 Value |= (op & UINT64_C(31)) << 21; 5963 // op: addr 5964 op = getMemEncodingMMImm12(MI, 1, Fixups, STI); 5965 Value |= op & UINT64_C(2031616); 5966 Value |= op & UINT64_C(4095); 5967 break; 5968 } 5969 case Mips::LB_MM: 5970 case Mips::LBu_MM: 5971 case Mips::LDC1_MM: 5972 case Mips::LWC1_MM: 5973 case Mips::SDC1_MM: 5974 case Mips::SWC1_MM: { 5975 // op: rt 5976 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5977 Value |= (op & UINT64_C(31)) << 21; 5978 // op: addr 5979 op = getMemEncodingMMImm16(MI, 1, Fixups, STI); 5980 Value |= op & UINT64_C(2097151); 5981 break; 5982 } 5983 case Mips::LL_MMR6: 5984 case Mips::LWLE_MM: 5985 case Mips::LWRE_MM: 5986 case Mips::SWLE_MM: 5987 case Mips::SWRE_MM: { 5988 // op: rt 5989 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5990 Value |= (op & UINT64_C(31)) << 21; 5991 // op: addr 5992 op = getMemEncodingMMImm9(MI, 1, Fixups, STI); 5993 Value |= op & UINT64_C(2031616); 5994 Value |= op & UINT64_C(511); 5995 break; 5996 } 5997 case Mips::CFC1_MM: 5998 case Mips::MFC1_MM: 5999 case Mips::MFC1_MMR6: 6000 case Mips::MFHC1_D32_MM: 6001 case Mips::MFHC1_D64_MM: { 6002 // op: rt 6003 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6004 Value |= (op & UINT64_C(31)) << 21; 6005 // op: fs 6006 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6007 Value |= (op & UINT64_C(31)) << 16; 6008 break; 6009 } 6010 case Mips::REPL_QB_MM: { 6011 // op: rt 6012 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6013 Value |= (op & UINT64_C(31)) << 21; 6014 // op: imm 6015 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6016 Value |= (op & UINT64_C(255)) << 13; 6017 break; 6018 } 6019 case Mips::ALUIPC_MMR6: 6020 case Mips::AUIPC_MMR6: { 6021 // op: rt 6022 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6023 Value |= (op & UINT64_C(31)) << 21; 6024 // op: imm 6025 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6026 Value |= op & UINT64_C(65535); 6027 break; 6028 } 6029 case Mips::EXTPDP_MM: 6030 case Mips::EXTP_MM: 6031 case Mips::EXTR_RS_W_MM: 6032 case Mips::EXTR_R_W_MM: 6033 case Mips::EXTR_S_H_MM: 6034 case Mips::EXTR_W_MM: { 6035 // op: rt 6036 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6037 Value |= (op & UINT64_C(31)) << 21; 6038 // op: imm 6039 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6040 Value |= (op & UINT64_C(31)) << 16; 6041 // op: ac 6042 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6043 Value |= (op & UINT64_C(3)) << 14; 6044 break; 6045 } 6046 case Mips::ADDIUPC_MMR6: 6047 case Mips::LWPC_MMR6: { 6048 // op: rt 6049 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6050 Value |= (op & UINT64_C(31)) << 21; 6051 // op: imm 6052 op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI); 6053 Value |= op & UINT64_C(524287); 6054 break; 6055 } 6056 case Mips::LUI_MMR6: { 6057 // op: rt 6058 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6059 Value |= (op & UINT64_C(31)) << 21; 6060 // op: imm16 6061 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6062 Value |= op & UINT64_C(65535); 6063 break; 6064 } 6065 case Mips::CFC2_MM: 6066 case Mips::MFC2_MMR6: 6067 case Mips::MFHC2_MMR6: { 6068 // op: rt 6069 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6070 Value |= (op & UINT64_C(31)) << 21; 6071 // op: impl 6072 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6073 Value |= (op & UINT64_C(31)) << 16; 6074 break; 6075 } 6076 case Mips::RDDSP_MM: 6077 case Mips::WRDSP_MM: { 6078 // op: rt 6079 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6080 Value |= (op & UINT64_C(31)) << 21; 6081 // op: mask 6082 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6083 Value |= (op & UINT64_C(127)) << 14; 6084 break; 6085 } 6086 case Mips::BGTZC_MMR6: 6087 case Mips::BLEZC_MMR6: { 6088 // op: rt 6089 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6090 Value |= (op & UINT64_C(31)) << 21; 6091 // op: offset 6092 op = getBranchTargetOpValueLsl2MMR6(MI, 1, Fixups, STI); 6093 Value |= op & UINT64_C(65535); 6094 break; 6095 } 6096 case Mips::BEQZALC_MMR6: 6097 case Mips::BGTZALC_MMR6: 6098 case Mips::BLEZALC_MMR6: 6099 case Mips::BNEZALC_MMR6: { 6100 // op: rt 6101 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6102 Value |= (op & UINT64_C(31)) << 21; 6103 // op: offset 6104 op = getBranchTargetOpValueMM(MI, 1, Fixups, STI); 6105 Value |= op & UINT64_C(65535); 6106 break; 6107 } 6108 case Mips::RDHWR_MM: 6109 case Mips::RDPGPR_MMR6: { 6110 // op: rt 6111 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6112 Value |= (op & UINT64_C(31)) << 21; 6113 // op: rd 6114 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6115 Value |= (op & UINT64_C(31)) << 16; 6116 break; 6117 } 6118 case Mips::ABSQ_S_PH_MM: 6119 case Mips::ABSQ_S_QB_MMR2: 6120 case Mips::ABSQ_S_W_MM: 6121 case Mips::BITREV_MM: 6122 case Mips::JALRC_HB_MMR6: 6123 case Mips::JALRC_MMR6: 6124 case Mips::PRECEQU_PH_QBLA_MM: 6125 case Mips::PRECEQU_PH_QBL_MM: 6126 case Mips::PRECEQU_PH_QBRA_MM: 6127 case Mips::PRECEQU_PH_QBR_MM: 6128 case Mips::PRECEQ_W_PHL_MM: 6129 case Mips::PRECEQ_W_PHR_MM: 6130 case Mips::PRECEU_PH_QBLA_MM: 6131 case Mips::PRECEU_PH_QBL_MM: 6132 case Mips::PRECEU_PH_QBRA_MM: 6133 case Mips::PRECEU_PH_QBR_MM: 6134 case Mips::RADDU_W_QB_MM: 6135 case Mips::REPLV_PH_MM: 6136 case Mips::REPLV_QB_MM: 6137 case Mips::WRPGPR_MMR6: 6138 case Mips::WSBH_MMR6: { 6139 // op: rt 6140 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6141 Value |= (op & UINT64_C(31)) << 21; 6142 // op: rs 6143 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6144 Value |= (op & UINT64_C(31)) << 16; 6145 break; 6146 } 6147 case Mips::BALIGN_MMR2: { 6148 // op: rt 6149 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6150 Value |= (op & UINT64_C(31)) << 21; 6151 // op: rs 6152 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6153 Value |= (op & UINT64_C(31)) << 16; 6154 // op: bp 6155 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6156 Value |= (op & UINT64_C(3)) << 14; 6157 break; 6158 } 6159 case Mips::ADDIU_MMR6: 6160 case Mips::ANDI_MMR6: 6161 case Mips::ORI_MMR6: 6162 case Mips::SLTi_MM: 6163 case Mips::SLTiu_MM: 6164 case Mips::XORI_MMR6: { 6165 // op: rt 6166 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6167 Value |= (op & UINT64_C(31)) << 21; 6168 // op: rs 6169 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6170 Value |= (op & UINT64_C(31)) << 16; 6171 // op: imm16 6172 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6173 Value |= op & UINT64_C(65535); 6174 break; 6175 } 6176 case Mips::BNVC_MMR6: 6177 case Mips::BOVC_MMR6: { 6178 // op: rt 6179 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6180 Value |= (op & UINT64_C(31)) << 21; 6181 // op: rs 6182 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6183 Value |= (op & UINT64_C(31)) << 16; 6184 // op: offset 6185 op = getBranchTargetOpValueMMR6(MI, 2, Fixups, STI); 6186 Value |= op & UINT64_C(65535); 6187 break; 6188 } 6189 case Mips::INS_MM: { 6190 // op: rt 6191 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6192 Value |= (op & UINT64_C(31)) << 21; 6193 // op: rs 6194 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6195 Value |= (op & UINT64_C(31)) << 16; 6196 // op: pos 6197 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6198 Value |= (op & UINT64_C(31)) << 6; 6199 // op: size 6200 op = getSizeInsEncoding(MI, 3, Fixups, STI); 6201 Value |= (op & UINT64_C(31)) << 11; 6202 break; 6203 } 6204 case Mips::EXT_MM: { 6205 // op: rt 6206 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6207 Value |= (op & UINT64_C(31)) << 21; 6208 // op: rs 6209 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6210 Value |= (op & UINT64_C(31)) << 16; 6211 // op: pos 6212 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6213 Value |= (op & UINT64_C(31)) << 6; 6214 // op: size 6215 op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI); 6216 Value |= (op & UINT64_C(31)) << 11; 6217 break; 6218 } 6219 case Mips::SHLL_PH_MM: 6220 case Mips::SHLL_S_PH_MM: 6221 case Mips::SHRA_PH_MM: 6222 case Mips::SHRA_R_PH_MM: 6223 case Mips::SHRL_PH_MMR2: { 6224 // op: rt 6225 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6226 Value |= (op & UINT64_C(31)) << 21; 6227 // op: rs 6228 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6229 Value |= (op & UINT64_C(31)) << 16; 6230 // op: sa 6231 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6232 Value |= (op & UINT64_C(15)) << 12; 6233 break; 6234 } 6235 case Mips::APPEND_MMR2: 6236 case Mips::PRECR_SRA_PH_W_MMR2: 6237 case Mips::PRECR_SRA_R_PH_W_MMR2: 6238 case Mips::PREPEND_MMR2: 6239 case Mips::SHLL_S_W_MM: 6240 case Mips::SHRA_R_W_MM: { 6241 // op: rt 6242 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6243 Value |= (op & UINT64_C(31)) << 21; 6244 // op: rs 6245 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6246 Value |= (op & UINT64_C(31)) << 16; 6247 // op: sa 6248 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6249 Value |= (op & UINT64_C(31)) << 11; 6250 break; 6251 } 6252 case Mips::SHLL_QB_MM: 6253 case Mips::SHRA_QB_MMR2: 6254 case Mips::SHRA_R_QB_MMR2: 6255 case Mips::SHRL_QB_MM: { 6256 // op: rt 6257 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6258 Value |= (op & UINT64_C(31)) << 21; 6259 // op: rs 6260 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6261 Value |= (op & UINT64_C(31)) << 16; 6262 // op: sa 6263 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6264 Value |= (op & UINT64_C(7)) << 13; 6265 break; 6266 } 6267 case Mips::MFC0_MMR6: 6268 case Mips::MFGC0_MM: 6269 case Mips::MFHC0_MMR6: 6270 case Mips::MFHGC0_MM: 6271 case Mips::RDHWR_MMR6: { 6272 // op: rt 6273 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6274 Value |= (op & UINT64_C(31)) << 21; 6275 // op: rs 6276 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6277 Value |= (op & UINT64_C(31)) << 16; 6278 // op: sel 6279 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6280 Value |= (op & UINT64_C(7)) << 11; 6281 break; 6282 } 6283 case Mips::INS_MMR6: { 6284 // op: rt 6285 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6286 Value |= (op & UINT64_C(31)) << 21; 6287 // op: rs 6288 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6289 Value |= (op & UINT64_C(31)) << 16; 6290 // op: size 6291 op = getSizeInsEncoding(MI, 3, Fixups, STI); 6292 Value |= (op & UINT64_C(31)) << 11; 6293 // op: pos 6294 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6295 Value |= (op & UINT64_C(31)) << 6; 6296 break; 6297 } 6298 case Mips::EXT_MMR6: { 6299 // op: rt 6300 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6301 Value |= (op & UINT64_C(31)) << 21; 6302 // op: rs 6303 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6304 Value |= (op & UINT64_C(31)) << 16; 6305 // op: size 6306 op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI); 6307 Value |= (op & UINT64_C(31)) << 11; 6308 // op: pos 6309 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6310 Value |= (op & UINT64_C(31)) << 6; 6311 break; 6312 } 6313 case Mips::INSV_MM: { 6314 // op: rt 6315 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6316 Value |= (op & UINT64_C(31)) << 21; 6317 // op: rs 6318 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6319 Value |= (op & UINT64_C(31)) << 16; 6320 break; 6321 } 6322 case Mips::EXTPDPV_MM: 6323 case Mips::EXTPV_MM: 6324 case Mips::EXTRV_RS_W_MM: 6325 case Mips::EXTRV_R_W_MM: 6326 case Mips::EXTRV_S_H_MM: 6327 case Mips::EXTRV_W_MM: { 6328 // op: rt 6329 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6330 Value |= (op & UINT64_C(31)) << 21; 6331 // op: rs 6332 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6333 Value |= (op & UINT64_C(31)) << 16; 6334 // op: ac 6335 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6336 Value |= (op & UINT64_C(3)) << 14; 6337 break; 6338 } 6339 case Mips::BGEZALC: 6340 case Mips::BGEZC: 6341 case Mips::BGEZC64: 6342 case Mips::BLTZALC: 6343 case Mips::BLTZC: 6344 case Mips::BLTZC64: { 6345 // op: rt 6346 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6347 Value |= (op & UINT64_C(31)) << 21; 6348 Value |= (op & UINT64_C(31)) << 16; 6349 // op: offset 6350 op = getBranchTargetOpValue(MI, 1, Fixups, STI); 6351 Value |= op & UINT64_C(65535); 6352 break; 6353 } 6354 case Mips::BGEZC_MMR6: 6355 case Mips::BLTZC_MMR6: { 6356 // op: rt 6357 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6358 Value |= (op & UINT64_C(31)) << 21; 6359 Value |= (op & UINT64_C(31)) << 16; 6360 // op: offset 6361 op = getBranchTargetOpValueLsl2MMR6(MI, 1, Fixups, STI); 6362 Value |= op & UINT64_C(65535); 6363 break; 6364 } 6365 case Mips::BGEZALC_MMR6: 6366 case Mips::BLTZALC_MMR6: { 6367 // op: rt 6368 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6369 Value |= (op & UINT64_C(31)) << 21; 6370 Value |= (op & UINT64_C(31)) << 16; 6371 // op: offset 6372 op = getBranchTargetOpValueMM(MI, 1, Fixups, STI); 6373 Value |= op & UINT64_C(65535); 6374 break; 6375 } 6376 case Mips::LWSP_MM: 6377 case Mips::SWSP_MM: 6378 case Mips::SWSP_MMR6: { 6379 // op: rt 6380 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6381 Value |= (op & UINT64_C(31)) << 5; 6382 // op: offset 6383 op = getMemEncodingMMSPImm5Lsl2(MI, 1, Fixups, STI); 6384 Value |= op & UINT64_C(31); 6385 break; 6386 } 6387 case Mips::NOT16_MM: { 6388 // op: rt 6389 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6390 Value |= (op & UINT64_C(7)) << 3; 6391 // op: rs 6392 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6393 Value |= op & UINT64_C(7); 6394 break; 6395 } 6396 case Mips::LBU16_MM: 6397 case Mips::SB16_MM: 6398 case Mips::SB16_MMR6: { 6399 // op: rt 6400 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6401 Value |= (op & UINT64_C(7)) << 7; 6402 // op: addr 6403 op = getMemEncodingMMImm4(MI, 1, Fixups, STI); 6404 Value |= op & UINT64_C(127); 6405 break; 6406 } 6407 case Mips::LHU16_MM: 6408 case Mips::SH16_MM: 6409 case Mips::SH16_MMR6: { 6410 // op: rt 6411 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6412 Value |= (op & UINT64_C(7)) << 7; 6413 // op: addr 6414 op = getMemEncodingMMImm4Lsl1(MI, 1, Fixups, STI); 6415 Value |= op & UINT64_C(127); 6416 break; 6417 } 6418 case Mips::LW16_MM: 6419 case Mips::SW16_MM: 6420 case Mips::SW16_MMR6: { 6421 // op: rt 6422 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6423 Value |= (op & UINT64_C(7)) << 7; 6424 // op: addr 6425 op = getMemEncodingMMImm4Lsl2(MI, 1, Fixups, STI); 6426 Value |= op & UINT64_C(127); 6427 break; 6428 } 6429 case Mips::LWGP_MM: { 6430 // op: rt 6431 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6432 Value |= (op & UINT64_C(7)) << 7; 6433 // op: offset 6434 op = getMemEncodingMMGPImm7Lsl2(MI, 1, Fixups, STI); 6435 Value |= op & UINT64_C(127); 6436 break; 6437 } 6438 case Mips::NOT16_MMR6: { 6439 // op: rt 6440 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6441 Value |= (op & UINT64_C(7)) << 7; 6442 // op: rs 6443 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6444 Value |= (op & UINT64_C(7)) << 4; 6445 break; 6446 } 6447 case Mips::SC64_R6: 6448 case Mips::SCD_R6: 6449 case Mips::SC_R6: { 6450 // op: rt 6451 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6452 Value |= (op & UINT64_C(31)) << 16; 6453 // op: addr 6454 op = getMemEncoding(MI, 2, Fixups, STI); 6455 Value |= (op & UINT64_C(2031616)) << 5; 6456 Value |= (op & UINT64_C(511)) << 7; 6457 break; 6458 } 6459 case Mips::SC: 6460 case Mips::SC64: 6461 case Mips::SCD: { 6462 // op: rt 6463 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6464 Value |= (op & UINT64_C(31)) << 16; 6465 // op: addr 6466 op = getMemEncoding(MI, 2, Fixups, STI); 6467 Value |= (op & UINT64_C(2031616)) << 5; 6468 Value |= op & UINT64_C(65535); 6469 break; 6470 } 6471 case Mips::CTC1: 6472 case Mips::DMTC1: 6473 case Mips::MTC1: 6474 case Mips::MTC1_D64: { 6475 // op: rt 6476 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6477 Value |= (op & UINT64_C(31)) << 16; 6478 // op: fs 6479 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6480 Value |= (op & UINT64_C(31)) << 11; 6481 break; 6482 } 6483 case Mips::DMTC0: 6484 case Mips::DMTC2: 6485 case Mips::DMTGC0: 6486 case Mips::MTC0: 6487 case Mips::MTC2: 6488 case Mips::MTGC0: 6489 case Mips::MTHGC0: { 6490 // op: rt 6491 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6492 Value |= (op & UINT64_C(31)) << 16; 6493 // op: rd 6494 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6495 Value |= (op & UINT64_C(31)) << 11; 6496 // op: sel 6497 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6498 Value |= op & UINT64_C(7); 6499 break; 6500 } 6501 case Mips::MFTR: 6502 case Mips::MTTR: { 6503 // op: rt 6504 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6505 Value |= (op & UINT64_C(31)) << 16; 6506 // op: rd 6507 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6508 Value |= (op & UINT64_C(31)) << 11; 6509 // op: u 6510 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6511 Value |= (op & UINT64_C(1)) << 5; 6512 // op: h 6513 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 6514 Value |= (op & UINT64_C(1)) << 4; 6515 // op: sel 6516 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 6517 Value |= op & UINT64_C(7); 6518 break; 6519 } 6520 case Mips::SCE_MM: { 6521 // op: rt 6522 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6523 Value |= (op & UINT64_C(31)) << 21; 6524 // op: addr 6525 op = getMemEncoding(MI, 2, Fixups, STI); 6526 Value |= op & UINT64_C(2031616); 6527 Value |= op & UINT64_C(511); 6528 break; 6529 } 6530 case Mips::SC_MM: { 6531 // op: rt 6532 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6533 Value |= (op & UINT64_C(31)) << 21; 6534 // op: addr 6535 op = getMemEncodingMMImm12(MI, 2, Fixups, STI); 6536 Value |= op & UINT64_C(2031616); 6537 Value |= op & UINT64_C(4095); 6538 break; 6539 } 6540 case Mips::SC_MMR6: { 6541 // op: rt 6542 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6543 Value |= (op & UINT64_C(31)) << 21; 6544 // op: addr 6545 op = getMemEncodingMMImm9(MI, 2, Fixups, STI); 6546 Value |= op & UINT64_C(2031616); 6547 Value |= op & UINT64_C(511); 6548 break; 6549 } 6550 case Mips::CTC1_MM: 6551 case Mips::MTC1_MM: 6552 case Mips::MTC1_MMR6: { 6553 // op: rt 6554 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6555 Value |= (op & UINT64_C(31)) << 21; 6556 // op: fs 6557 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6558 Value |= (op & UINT64_C(31)) << 16; 6559 break; 6560 } 6561 case Mips::CTC2_MM: 6562 case Mips::MTC2_MMR6: 6563 case Mips::MTHC2_MMR6: { 6564 // op: rt 6565 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6566 Value |= (op & UINT64_C(31)) << 21; 6567 // op: impl 6568 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6569 Value |= (op & UINT64_C(31)) << 16; 6570 break; 6571 } 6572 case Mips::CMPU_EQ_QB_MM: 6573 case Mips::CMPU_LE_QB_MM: 6574 case Mips::CMPU_LT_QB_MM: 6575 case Mips::CMP_EQ_PH_MM: 6576 case Mips::CMP_LE_PH_MM: 6577 case Mips::CMP_LT_PH_MM: { 6578 // op: rt 6579 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6580 Value |= (op & UINT64_C(31)) << 21; 6581 // op: rs 6582 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6583 Value |= (op & UINT64_C(31)) << 16; 6584 break; 6585 } 6586 case Mips::BEQC_MMR6: 6587 case Mips::BGEC_MMR6: 6588 case Mips::BGEUC_MMR6: 6589 case Mips::BLTC_MMR6: 6590 case Mips::BLTUC_MMR6: 6591 case Mips::BNEC_MMR6: { 6592 // op: rt 6593 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6594 Value |= (op & UINT64_C(31)) << 21; 6595 // op: rs 6596 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6597 Value |= (op & UINT64_C(31)) << 16; 6598 // op: offset 6599 op = getBranchTargetOpValueLsl2MMR6(MI, 2, Fixups, STI); 6600 Value |= op & UINT64_C(65535); 6601 break; 6602 } 6603 case Mips::MTC0_MMR6: 6604 case Mips::MTGC0_MM: 6605 case Mips::MTHC0_MMR6: 6606 case Mips::MTHGC0_MM: { 6607 // op: rt 6608 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6609 Value |= (op & UINT64_C(31)) << 21; 6610 // op: rs 6611 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6612 Value |= (op & UINT64_C(31)) << 16; 6613 // op: sel 6614 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6615 Value |= (op & UINT64_C(7)) << 11; 6616 break; 6617 } 6618 case Mips::MTHC1_D32: 6619 case Mips::MTHC1_D64: { 6620 // op: rt 6621 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6622 Value |= (op & UINT64_C(31)) << 16; 6623 // op: fs 6624 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6625 Value |= (op & UINT64_C(31)) << 11; 6626 break; 6627 } 6628 case Mips::SPLAT_B: 6629 case Mips::SPLAT_D: 6630 case Mips::SPLAT_H: 6631 case Mips::SPLAT_W: { 6632 // op: rt 6633 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6634 Value |= (op & UINT64_C(31)) << 16; 6635 // op: ws 6636 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6637 Value |= (op & UINT64_C(31)) << 11; 6638 // op: wd 6639 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6640 Value |= (op & UINT64_C(31)) << 6; 6641 break; 6642 } 6643 case Mips::MTHC1_D32_MM: 6644 case Mips::MTHC1_D64_MM: { 6645 // op: rt 6646 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6647 Value |= (op & UINT64_C(31)) << 21; 6648 // op: fs 6649 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6650 Value |= (op & UINT64_C(31)) << 16; 6651 break; 6652 } 6653 case Mips::DPAQX_SA_W_PH_MMR2: 6654 case Mips::DPAQX_S_W_PH_MMR2: 6655 case Mips::DPAQ_SA_L_W_MM: 6656 case Mips::DPAQ_S_W_PH_MM: 6657 case Mips::DPAU_H_QBL_MM: 6658 case Mips::DPAU_H_QBR_MM: 6659 case Mips::DPAX_W_PH_MMR2: 6660 case Mips::DPA_W_PH_MMR2: 6661 case Mips::DPSQX_SA_W_PH_MMR2: 6662 case Mips::DPSQX_S_W_PH_MMR2: 6663 case Mips::DPSQ_SA_L_W_MM: 6664 case Mips::DPSQ_S_W_PH_MM: 6665 case Mips::DPSU_H_QBL_MM: 6666 case Mips::DPSU_H_QBR_MM: 6667 case Mips::DPSX_W_PH_MMR2: 6668 case Mips::DPS_W_PH_MMR2: 6669 case Mips::MADDU_DSP_MM: 6670 case Mips::MADD_DSP_MM: 6671 case Mips::MAQ_SA_W_PHL_MM: 6672 case Mips::MAQ_SA_W_PHR_MM: 6673 case Mips::MAQ_S_W_PHL_MM: 6674 case Mips::MAQ_S_W_PHR_MM: 6675 case Mips::MSUBU_DSP_MM: 6676 case Mips::MSUB_DSP_MM: 6677 case Mips::MULSAQ_S_W_PH_MM: 6678 case Mips::MULSA_W_PH_MMR2: 6679 case Mips::MULTU_DSP_MM: 6680 case Mips::MULT_DSP_MM: { 6681 // op: rt 6682 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6683 Value |= (op & UINT64_C(31)) << 21; 6684 // op: rs 6685 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6686 Value |= (op & UINT64_C(31)) << 16; 6687 // op: ac 6688 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6689 Value |= (op & UINT64_C(3)) << 14; 6690 break; 6691 } 6692 case Mips::ADD_MM: 6693 case Mips::ADDu_MM: 6694 case Mips::AND_MM: 6695 case Mips::CMPGU_EQ_QB_MM: 6696 case Mips::CMPGU_LE_QB_MM: 6697 case Mips::CMPGU_LT_QB_MM: 6698 case Mips::MOVN_I_MM: 6699 case Mips::MOVZ_I_MM: 6700 case Mips::MUL_MM: 6701 case Mips::NOR_MM: 6702 case Mips::OR_MM: 6703 case Mips::SLT_MM: 6704 case Mips::SLTu_MM: 6705 case Mips::SUB_MM: 6706 case Mips::SUBu_MM: 6707 case Mips::XOR_MM: { 6708 // op: rt 6709 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6710 Value |= (op & UINT64_C(31)) << 21; 6711 // op: rs 6712 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6713 Value |= (op & UINT64_C(31)) << 16; 6714 // op: rd 6715 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6716 Value |= (op & UINT64_C(31)) << 11; 6717 break; 6718 } 6719 case Mips::AND16_MM: 6720 case Mips::OR16_MM: 6721 case Mips::XOR16_MM: { 6722 // op: rt 6723 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6724 Value |= (op & UINT64_C(7)) << 3; 6725 // op: rs 6726 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6727 Value |= op & UINT64_C(7); 6728 break; 6729 } 6730 case Mips::AND16_MMR6: 6731 case Mips::OR16_MMR6: 6732 case Mips::XOR16_MMR6: { 6733 // op: rt 6734 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6735 Value |= (op & UINT64_C(7)) << 7; 6736 // op: rs 6737 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6738 Value |= (op & UINT64_C(7)) << 4; 6739 break; 6740 } 6741 case Mips::SLD_B: 6742 case Mips::SLD_D: 6743 case Mips::SLD_H: 6744 case Mips::SLD_W: { 6745 // op: rt 6746 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 6747 Value |= (op & UINT64_C(31)) << 16; 6748 // op: ws 6749 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6750 Value |= (op & UINT64_C(31)) << 11; 6751 // op: wd 6752 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6753 Value |= (op & UINT64_C(31)) << 6; 6754 break; 6755 } 6756 case Mips::LWM32_MM: 6757 case Mips::SWM32_MM: { 6758 // op: rt 6759 op = getRegisterListOpValue(MI, 0, Fixups, STI); 6760 Value |= (op & UINT64_C(31)) << 21; 6761 // op: addr 6762 op = getMemEncodingMMImm12(MI, 1, Fixups, STI); 6763 Value |= op & UINT64_C(2031616); 6764 Value |= op & UINT64_C(4095); 6765 break; 6766 } 6767 case Mips::LWM16_MM: 6768 case Mips::SWM16_MM: { 6769 // op: rt 6770 op = getRegisterListOpValue16(MI, 0, Fixups, STI); 6771 Value |= (op & UINT64_C(3)) << 4; 6772 // op: addr 6773 op = getMemEncodingMMImm4sp(MI, 1, Fixups, STI); 6774 Value |= op & UINT64_C(15); 6775 break; 6776 } 6777 case Mips::LWM16_MMR6: 6778 case Mips::SWM16_MMR6: { 6779 // op: rt 6780 op = getRegisterListOpValue16(MI, 0, Fixups, STI); 6781 Value |= (op & UINT64_C(3)) << 8; 6782 // op: addr 6783 op = getMemEncodingMMImm4sp(MI, 1, Fixups, STI); 6784 Value |= (op & UINT64_C(15)) << 4; 6785 break; 6786 } 6787 case Mips::JrcRx16: 6788 case Mips::JumpLinkReg16: 6789 case Mips::SebRx16: 6790 case Mips::SehRx16: { 6791 // op: rx 6792 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6793 Value |= (op & UINT64_C(7)) << 8; 6794 break; 6795 } 6796 case Mips::AddiuRxRxImm16: 6797 case Mips::BeqzRxImm16: 6798 case Mips::BnezRxImm16: 6799 case Mips::CmpiRxImm16: 6800 case Mips::LiRxImm16: 6801 case Mips::LwRxPcTcp16: 6802 case Mips::SltiRxImm16: 6803 case Mips::SltiuRxImm16: { 6804 // op: rx 6805 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6806 Value |= (op & UINT64_C(7)) << 8; 6807 // op: imm8 6808 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6809 Value |= op & UINT64_C(255); 6810 break; 6811 } 6812 case Mips::Mfhi16: 6813 case Mips::Mflo16: { 6814 // op: rx 6815 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6816 Value |= (op & UINT64_C(7)) << 8; 6817 // op: ry 6818 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6819 Value |= (op & UINT64_C(7)) << 5; 6820 break; 6821 } 6822 case Mips::CmpRxRy16: 6823 case Mips::DivRxRy16: 6824 case Mips::DivuRxRy16: 6825 case Mips::NegRxRy16: 6826 case Mips::NotRxRy16: 6827 case Mips::SltRxRy16: 6828 case Mips::SltuRxRy16: { 6829 // op: rx 6830 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6831 Value |= (op & UINT64_C(7)) << 8; 6832 // op: ry 6833 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6834 Value |= (op & UINT64_C(7)) << 5; 6835 break; 6836 } 6837 case Mips::AndRxRxRy16: 6838 case Mips::OrRxRxRy16: 6839 case Mips::SllvRxRy16: 6840 case Mips::SravRxRy16: 6841 case Mips::SrlvRxRy16: 6842 case Mips::XorRxRxRy16: { 6843 // op: rx 6844 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6845 Value |= (op & UINT64_C(7)) << 8; 6846 // op: ry 6847 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6848 Value |= (op & UINT64_C(7)) << 5; 6849 break; 6850 } 6851 case Mips::AdduRxRyRz16: 6852 case Mips::SubuRxRyRz16: { 6853 // op: rx 6854 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6855 Value |= (op & UINT64_C(7)) << 8; 6856 // op: ry 6857 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6858 Value |= (op & UINT64_C(7)) << 5; 6859 // op: rz 6860 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6861 Value |= (op & UINT64_C(7)) << 2; 6862 break; 6863 } 6864 case Mips::MoveR3216: { 6865 // op: ry 6866 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6867 Value |= (op & UINT64_C(15)) << 4; 6868 // op: r32 6869 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6870 Value |= op & UINT64_C(15); 6871 break; 6872 } 6873 case Mips::LDI_B: 6874 case Mips::LDI_D: 6875 case Mips::LDI_H: 6876 case Mips::LDI_W: { 6877 // op: s10 6878 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6879 Value |= (op & UINT64_C(1023)) << 11; 6880 // op: wd 6881 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6882 Value |= (op & UINT64_C(31)) << 6; 6883 break; 6884 } 6885 case Mips::SllX16: 6886 case Mips::SraX16: 6887 case Mips::SrlX16: { 6888 // op: sa6 6889 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6890 Value |= (op & UINT64_C(31)) << 22; 6891 Value |= (op & UINT64_C(32)) << 16; 6892 // op: rx 6893 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6894 Value |= (op & UINT64_C(7)) << 8; 6895 // op: ry 6896 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6897 Value |= (op & UINT64_C(7)) << 5; 6898 break; 6899 } 6900 case Mips::SHILO_MM: { 6901 // op: shift 6902 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6903 Value |= (op & UINT64_C(63)) << 16; 6904 // op: ac 6905 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6906 Value |= (op & UINT64_C(3)) << 14; 6907 break; 6908 } 6909 case Mips::SYNC_MM: 6910 case Mips::SYNC_MMR6: { 6911 // op: stype 6912 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6913 Value |= (op & UINT64_C(31)) << 16; 6914 break; 6915 } 6916 case Mips::SYNC: { 6917 // op: stype 6918 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6919 Value |= (op & UINT64_C(31)) << 6; 6920 break; 6921 } 6922 case Mips::J: 6923 case Mips::JAL: 6924 case Mips::JALX: 6925 case Mips::JALX_MM: { 6926 // op: target 6927 op = getJumpTargetOpValue(MI, 0, Fixups, STI); 6928 Value |= op & UINT64_C(67108863); 6929 break; 6930 } 6931 case Mips::JALS_MM: 6932 case Mips::JAL_MM: 6933 case Mips::J_MM: { 6934 // op: target 6935 op = getJumpTargetOpValueMM(MI, 0, Fixups, STI); 6936 Value |= op & UINT64_C(67108863); 6937 break; 6938 } 6939 case Mips::ANDI_B: 6940 case Mips::NORI_B: 6941 case Mips::ORI_B: 6942 case Mips::SHF_B: 6943 case Mips::SHF_H: 6944 case Mips::SHF_W: 6945 case Mips::XORI_B: { 6946 // op: u8 6947 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6948 Value |= (op & UINT64_C(255)) << 16; 6949 // op: ws 6950 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 6951 Value |= (op & UINT64_C(31)) << 11; 6952 // op: wd 6953 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6954 Value |= (op & UINT64_C(31)) << 6; 6955 break; 6956 } 6957 case Mips::BMNZI_B: 6958 case Mips::BMZI_B: 6959 case Mips::BSELI_B: { 6960 // op: u8 6961 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 6962 Value |= (op & UINT64_C(255)) << 16; 6963 // op: ws 6964 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 6965 Value |= (op & UINT64_C(31)) << 11; 6966 // op: wd 6967 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 6968 Value |= (op & UINT64_C(31)) << 6; 6969 break; 6970 } 6971 case Mips::FCLASS_D: 6972 case Mips::FCLASS_W: 6973 case Mips::FEXUPL_D: 6974 case Mips::FEXUPL_W: 6975 case Mips::FEXUPR_D: 6976 case Mips::FEXUPR_W: 6977 case Mips::FFINT_S_D: 6978 case Mips::FFINT_S_W: 6979 case Mips::FFINT_U_D: 6980 case Mips::FFINT_U_W: 6981 case Mips::FFQL_D: 6982 case Mips::FFQL_W: 6983 case Mips::FFQR_D: 6984 case Mips::FFQR_W: 6985 case Mips::FLOG2_D: 6986 case Mips::FLOG2_W: 6987 case Mips::FRCP_D: 6988 case Mips::FRCP_W: 6989 case Mips::FRINT_D: 6990 case Mips::FRINT_W: 6991 case Mips::FRSQRT_D: 6992 case Mips::FRSQRT_W: 6993 case Mips::FSQRT_D: 6994 case Mips::FSQRT_W: 6995 case Mips::FTINT_S_D: 6996 case Mips::FTINT_S_W: 6997 case Mips::FTINT_U_D: 6998 case Mips::FTINT_U_W: 6999 case Mips::FTRUNC_S_D: 7000 case Mips::FTRUNC_S_W: 7001 case Mips::FTRUNC_U_D: 7002 case Mips::FTRUNC_U_W: 7003 case Mips::MOVE_V: 7004 case Mips::NLOC_B: 7005 case Mips::NLOC_D: 7006 case Mips::NLOC_H: 7007 case Mips::NLOC_W: 7008 case Mips::NLZC_B: 7009 case Mips::NLZC_D: 7010 case Mips::NLZC_H: 7011 case Mips::NLZC_W: 7012 case Mips::PCNT_B: 7013 case Mips::PCNT_D: 7014 case Mips::PCNT_H: 7015 case Mips::PCNT_W: { 7016 // op: ws 7017 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 7018 Value |= (op & UINT64_C(31)) << 11; 7019 // op: wd 7020 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7021 Value |= (op & UINT64_C(31)) << 6; 7022 break; 7023 } 7024 case Mips::BCLRI_H: 7025 case Mips::BNEGI_H: 7026 case Mips::BSETI_H: 7027 case Mips::SAT_S_H: 7028 case Mips::SAT_U_H: 7029 case Mips::SLLI_H: 7030 case Mips::SRAI_H: 7031 case Mips::SRARI_H: 7032 case Mips::SRLI_H: 7033 case Mips::SRLRI_H: { 7034 // op: ws 7035 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 7036 Value |= (op & UINT64_C(31)) << 11; 7037 // op: wd 7038 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7039 Value |= (op & UINT64_C(31)) << 6; 7040 // op: m 7041 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 7042 Value |= (op & UINT64_C(15)) << 16; 7043 break; 7044 } 7045 case Mips::BCLRI_W: 7046 case Mips::BNEGI_W: 7047 case Mips::BSETI_W: 7048 case Mips::SAT_S_W: 7049 case Mips::SAT_U_W: 7050 case Mips::SLLI_W: 7051 case Mips::SRAI_W: 7052 case Mips::SRARI_W: 7053 case Mips::SRLI_W: 7054 case Mips::SRLRI_W: { 7055 // op: ws 7056 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 7057 Value |= (op & UINT64_C(31)) << 11; 7058 // op: wd 7059 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7060 Value |= (op & UINT64_C(31)) << 6; 7061 // op: m 7062 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 7063 Value |= (op & UINT64_C(31)) << 16; 7064 break; 7065 } 7066 case Mips::BCLRI_D: 7067 case Mips::BNEGI_D: 7068 case Mips::BSETI_D: 7069 case Mips::SAT_S_D: 7070 case Mips::SAT_U_D: 7071 case Mips::SLLI_D: 7072 case Mips::SRAI_D: 7073 case Mips::SRARI_D: 7074 case Mips::SRLI_D: 7075 case Mips::SRLRI_D: { 7076 // op: ws 7077 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 7078 Value |= (op & UINT64_C(31)) << 11; 7079 // op: wd 7080 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7081 Value |= (op & UINT64_C(31)) << 6; 7082 // op: m 7083 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 7084 Value |= (op & UINT64_C(63)) << 16; 7085 break; 7086 } 7087 case Mips::BCLRI_B: 7088 case Mips::BNEGI_B: 7089 case Mips::BSETI_B: 7090 case Mips::SAT_S_B: 7091 case Mips::SAT_U_B: 7092 case Mips::SLLI_B: 7093 case Mips::SRAI_B: 7094 case Mips::SRARI_B: 7095 case Mips::SRLI_B: 7096 case Mips::SRLRI_B: { 7097 // op: ws 7098 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 7099 Value |= (op & UINT64_C(31)) << 11; 7100 // op: wd 7101 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7102 Value |= (op & UINT64_C(31)) << 6; 7103 // op: m 7104 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 7105 Value |= (op & UINT64_C(7)) << 16; 7106 break; 7107 } 7108 case Mips::BINSLI_H: 7109 case Mips::BINSRI_H: { 7110 // op: ws 7111 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 7112 Value |= (op & UINT64_C(31)) << 11; 7113 // op: wd 7114 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7115 Value |= (op & UINT64_C(31)) << 6; 7116 // op: m 7117 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 7118 Value |= (op & UINT64_C(15)) << 16; 7119 break; 7120 } 7121 case Mips::BINSLI_W: 7122 case Mips::BINSRI_W: { 7123 // op: ws 7124 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 7125 Value |= (op & UINT64_C(31)) << 11; 7126 // op: wd 7127 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7128 Value |= (op & UINT64_C(31)) << 6; 7129 // op: m 7130 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 7131 Value |= (op & UINT64_C(31)) << 16; 7132 break; 7133 } 7134 case Mips::BINSLI_D: 7135 case Mips::BINSRI_D: { 7136 // op: ws 7137 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 7138 Value |= (op & UINT64_C(31)) << 11; 7139 // op: wd 7140 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7141 Value |= (op & UINT64_C(31)) << 6; 7142 // op: m 7143 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 7144 Value |= (op & UINT64_C(63)) << 16; 7145 break; 7146 } 7147 case Mips::BINSLI_B: 7148 case Mips::BINSRI_B: { 7149 // op: ws 7150 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 7151 Value |= (op & UINT64_C(31)) << 11; 7152 // op: wd 7153 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7154 Value |= (op & UINT64_C(31)) << 6; 7155 // op: m 7156 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 7157 Value |= (op & UINT64_C(7)) << 16; 7158 break; 7159 } 7160 case Mips::ADDS_A_B: 7161 case Mips::ADDS_A_D: 7162 case Mips::ADDS_A_H: 7163 case Mips::ADDS_A_W: 7164 case Mips::ADDS_S_B: 7165 case Mips::ADDS_S_D: 7166 case Mips::ADDS_S_H: 7167 case Mips::ADDS_S_W: 7168 case Mips::ADDS_U_B: 7169 case Mips::ADDS_U_D: 7170 case Mips::ADDS_U_H: 7171 case Mips::ADDS_U_W: 7172 case Mips::ADDV_B: 7173 case Mips::ADDV_D: 7174 case Mips::ADDV_H: 7175 case Mips::ADDV_W: 7176 case Mips::ADD_A_B: 7177 case Mips::ADD_A_D: 7178 case Mips::ADD_A_H: 7179 case Mips::ADD_A_W: 7180 case Mips::AND_V: 7181 case Mips::ASUB_S_B: 7182 case Mips::ASUB_S_D: 7183 case Mips::ASUB_S_H: 7184 case Mips::ASUB_S_W: 7185 case Mips::ASUB_U_B: 7186 case Mips::ASUB_U_D: 7187 case Mips::ASUB_U_H: 7188 case Mips::ASUB_U_W: 7189 case Mips::AVER_S_B: 7190 case Mips::AVER_S_D: 7191 case Mips::AVER_S_H: 7192 case Mips::AVER_S_W: 7193 case Mips::AVER_U_B: 7194 case Mips::AVER_U_D: 7195 case Mips::AVER_U_H: 7196 case Mips::AVER_U_W: 7197 case Mips::AVE_S_B: 7198 case Mips::AVE_S_D: 7199 case Mips::AVE_S_H: 7200 case Mips::AVE_S_W: 7201 case Mips::AVE_U_B: 7202 case Mips::AVE_U_D: 7203 case Mips::AVE_U_H: 7204 case Mips::AVE_U_W: 7205 case Mips::BCLR_B: 7206 case Mips::BCLR_D: 7207 case Mips::BCLR_H: 7208 case Mips::BCLR_W: 7209 case Mips::BNEG_B: 7210 case Mips::BNEG_D: 7211 case Mips::BNEG_H: 7212 case Mips::BNEG_W: 7213 case Mips::BSET_B: 7214 case Mips::BSET_D: 7215 case Mips::BSET_H: 7216 case Mips::BSET_W: 7217 case Mips::CEQ_B: 7218 case Mips::CEQ_D: 7219 case Mips::CEQ_H: 7220 case Mips::CEQ_W: 7221 case Mips::CLE_S_B: 7222 case Mips::CLE_S_D: 7223 case Mips::CLE_S_H: 7224 case Mips::CLE_S_W: 7225 case Mips::CLE_U_B: 7226 case Mips::CLE_U_D: 7227 case Mips::CLE_U_H: 7228 case Mips::CLE_U_W: 7229 case Mips::CLT_S_B: 7230 case Mips::CLT_S_D: 7231 case Mips::CLT_S_H: 7232 case Mips::CLT_S_W: 7233 case Mips::CLT_U_B: 7234 case Mips::CLT_U_D: 7235 case Mips::CLT_U_H: 7236 case Mips::CLT_U_W: 7237 case Mips::DIV_S_B: 7238 case Mips::DIV_S_D: 7239 case Mips::DIV_S_H: 7240 case Mips::DIV_S_W: 7241 case Mips::DIV_U_B: 7242 case Mips::DIV_U_D: 7243 case Mips::DIV_U_H: 7244 case Mips::DIV_U_W: 7245 case Mips::DOTP_S_D: 7246 case Mips::DOTP_S_H: 7247 case Mips::DOTP_S_W: 7248 case Mips::DOTP_U_D: 7249 case Mips::DOTP_U_H: 7250 case Mips::DOTP_U_W: 7251 case Mips::FADD_D: 7252 case Mips::FADD_W: 7253 case Mips::FCAF_D: 7254 case Mips::FCAF_W: 7255 case Mips::FCEQ_D: 7256 case Mips::FCEQ_W: 7257 case Mips::FCLE_D: 7258 case Mips::FCLE_W: 7259 case Mips::FCLT_D: 7260 case Mips::FCLT_W: 7261 case Mips::FCNE_D: 7262 case Mips::FCNE_W: 7263 case Mips::FCOR_D: 7264 case Mips::FCOR_W: 7265 case Mips::FCUEQ_D: 7266 case Mips::FCUEQ_W: 7267 case Mips::FCULE_D: 7268 case Mips::FCULE_W: 7269 case Mips::FCULT_D: 7270 case Mips::FCULT_W: 7271 case Mips::FCUNE_D: 7272 case Mips::FCUNE_W: 7273 case Mips::FCUN_D: 7274 case Mips::FCUN_W: 7275 case Mips::FDIV_D: 7276 case Mips::FDIV_W: 7277 case Mips::FEXDO_H: 7278 case Mips::FEXDO_W: 7279 case Mips::FEXP2_D: 7280 case Mips::FEXP2_W: 7281 case Mips::FMAX_A_D: 7282 case Mips::FMAX_A_W: 7283 case Mips::FMAX_D: 7284 case Mips::FMAX_W: 7285 case Mips::FMIN_A_D: 7286 case Mips::FMIN_A_W: 7287 case Mips::FMIN_D: 7288 case Mips::FMIN_W: 7289 case Mips::FMUL_D: 7290 case Mips::FMUL_W: 7291 case Mips::FSAF_D: 7292 case Mips::FSAF_W: 7293 case Mips::FSEQ_D: 7294 case Mips::FSEQ_W: 7295 case Mips::FSLE_D: 7296 case Mips::FSLE_W: 7297 case Mips::FSLT_D: 7298 case Mips::FSLT_W: 7299 case Mips::FSNE_D: 7300 case Mips::FSNE_W: 7301 case Mips::FSOR_D: 7302 case Mips::FSOR_W: 7303 case Mips::FSUB_D: 7304 case Mips::FSUB_W: 7305 case Mips::FSUEQ_D: 7306 case Mips::FSUEQ_W: 7307 case Mips::FSULE_D: 7308 case Mips::FSULE_W: 7309 case Mips::FSULT_D: 7310 case Mips::FSULT_W: 7311 case Mips::FSUNE_D: 7312 case Mips::FSUNE_W: 7313 case Mips::FSUN_D: 7314 case Mips::FSUN_W: 7315 case Mips::FTQ_H: 7316 case Mips::FTQ_W: 7317 case Mips::HADD_S_D: 7318 case Mips::HADD_S_H: 7319 case Mips::HADD_S_W: 7320 case Mips::HADD_U_D: 7321 case Mips::HADD_U_H: 7322 case Mips::HADD_U_W: 7323 case Mips::HSUB_S_D: 7324 case Mips::HSUB_S_H: 7325 case Mips::HSUB_S_W: 7326 case Mips::HSUB_U_D: 7327 case Mips::HSUB_U_H: 7328 case Mips::HSUB_U_W: 7329 case Mips::ILVEV_B: 7330 case Mips::ILVEV_D: 7331 case Mips::ILVEV_H: 7332 case Mips::ILVEV_W: 7333 case Mips::ILVL_B: 7334 case Mips::ILVL_D: 7335 case Mips::ILVL_H: 7336 case Mips::ILVL_W: 7337 case Mips::ILVOD_B: 7338 case Mips::ILVOD_D: 7339 case Mips::ILVOD_H: 7340 case Mips::ILVOD_W: 7341 case Mips::ILVR_B: 7342 case Mips::ILVR_D: 7343 case Mips::ILVR_H: 7344 case Mips::ILVR_W: 7345 case Mips::MAX_A_B: 7346 case Mips::MAX_A_D: 7347 case Mips::MAX_A_H: 7348 case Mips::MAX_A_W: 7349 case Mips::MAX_S_B: 7350 case Mips::MAX_S_D: 7351 case Mips::MAX_S_H: 7352 case Mips::MAX_S_W: 7353 case Mips::MAX_U_B: 7354 case Mips::MAX_U_D: 7355 case Mips::MAX_U_H: 7356 case Mips::MAX_U_W: 7357 case Mips::MIN_A_B: 7358 case Mips::MIN_A_D: 7359 case Mips::MIN_A_H: 7360 case Mips::MIN_A_W: 7361 case Mips::MIN_S_B: 7362 case Mips::MIN_S_D: 7363 case Mips::MIN_S_H: 7364 case Mips::MIN_S_W: 7365 case Mips::MIN_U_B: 7366 case Mips::MIN_U_D: 7367 case Mips::MIN_U_H: 7368 case Mips::MIN_U_W: 7369 case Mips::MOD_S_B: 7370 case Mips::MOD_S_D: 7371 case Mips::MOD_S_H: 7372 case Mips::MOD_S_W: 7373 case Mips::MOD_U_B: 7374 case Mips::MOD_U_D: 7375 case Mips::MOD_U_H: 7376 case Mips::MOD_U_W: 7377 case Mips::MULR_Q_H: 7378 case Mips::MULR_Q_W: 7379 case Mips::MULV_B: 7380 case Mips::MULV_D: 7381 case Mips::MULV_H: 7382 case Mips::MULV_W: 7383 case Mips::MUL_Q_H: 7384 case Mips::MUL_Q_W: 7385 case Mips::NOR_V: 7386 case Mips::OR_V: 7387 case Mips::PCKEV_B: 7388 case Mips::PCKEV_D: 7389 case Mips::PCKEV_H: 7390 case Mips::PCKEV_W: 7391 case Mips::PCKOD_B: 7392 case Mips::PCKOD_D: 7393 case Mips::PCKOD_H: 7394 case Mips::PCKOD_W: 7395 case Mips::SLL_B: 7396 case Mips::SLL_D: 7397 case Mips::SLL_H: 7398 case Mips::SLL_W: 7399 case Mips::SRAR_B: 7400 case Mips::SRAR_D: 7401 case Mips::SRAR_H: 7402 case Mips::SRAR_W: 7403 case Mips::SRA_B: 7404 case Mips::SRA_D: 7405 case Mips::SRA_H: 7406 case Mips::SRA_W: 7407 case Mips::SRLR_B: 7408 case Mips::SRLR_D: 7409 case Mips::SRLR_H: 7410 case Mips::SRLR_W: 7411 case Mips::SRL_B: 7412 case Mips::SRL_D: 7413 case Mips::SRL_H: 7414 case Mips::SRL_W: 7415 case Mips::SUBSUS_U_B: 7416 case Mips::SUBSUS_U_D: 7417 case Mips::SUBSUS_U_H: 7418 case Mips::SUBSUS_U_W: 7419 case Mips::SUBSUU_S_B: 7420 case Mips::SUBSUU_S_D: 7421 case Mips::SUBSUU_S_H: 7422 case Mips::SUBSUU_S_W: 7423 case Mips::SUBS_S_B: 7424 case Mips::SUBS_S_D: 7425 case Mips::SUBS_S_H: 7426 case Mips::SUBS_S_W: 7427 case Mips::SUBS_U_B: 7428 case Mips::SUBS_U_D: 7429 case Mips::SUBS_U_H: 7430 case Mips::SUBS_U_W: 7431 case Mips::SUBV_B: 7432 case Mips::SUBV_D: 7433 case Mips::SUBV_H: 7434 case Mips::SUBV_W: 7435 case Mips::XOR_V: { 7436 // op: wt 7437 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 7438 Value |= (op & UINT64_C(31)) << 16; 7439 // op: ws 7440 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 7441 Value |= (op & UINT64_C(31)) << 11; 7442 // op: wd 7443 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7444 Value |= (op & UINT64_C(31)) << 6; 7445 break; 7446 } 7447 case Mips::BINSL_B: 7448 case Mips::BINSL_D: 7449 case Mips::BINSL_H: 7450 case Mips::BINSL_W: 7451 case Mips::BINSR_B: 7452 case Mips::BINSR_D: 7453 case Mips::BINSR_H: 7454 case Mips::BINSR_W: 7455 case Mips::BMNZ_V: 7456 case Mips::BMZ_V: 7457 case Mips::BSEL_V: 7458 case Mips::DPADD_S_D: 7459 case Mips::DPADD_S_H: 7460 case Mips::DPADD_S_W: 7461 case Mips::DPADD_U_D: 7462 case Mips::DPADD_U_H: 7463 case Mips::DPADD_U_W: 7464 case Mips::DPSUB_S_D: 7465 case Mips::DPSUB_S_H: 7466 case Mips::DPSUB_S_W: 7467 case Mips::DPSUB_U_D: 7468 case Mips::DPSUB_U_H: 7469 case Mips::DPSUB_U_W: 7470 case Mips::FMADD_D: 7471 case Mips::FMADD_W: 7472 case Mips::FMSUB_D: 7473 case Mips::FMSUB_W: 7474 case Mips::MADDR_Q_H: 7475 case Mips::MADDR_Q_W: 7476 case Mips::MADDV_B: 7477 case Mips::MADDV_D: 7478 case Mips::MADDV_H: 7479 case Mips::MADDV_W: 7480 case Mips::MADD_Q_H: 7481 case Mips::MADD_Q_W: 7482 case Mips::MSUBR_Q_H: 7483 case Mips::MSUBR_Q_W: 7484 case Mips::MSUBV_B: 7485 case Mips::MSUBV_D: 7486 case Mips::MSUBV_H: 7487 case Mips::MSUBV_W: 7488 case Mips::MSUB_Q_H: 7489 case Mips::MSUB_Q_W: 7490 case Mips::VSHF_B: 7491 case Mips::VSHF_D: 7492 case Mips::VSHF_H: 7493 case Mips::VSHF_W: { 7494 // op: wt 7495 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 7496 Value |= (op & UINT64_C(31)) << 16; 7497 // op: ws 7498 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 7499 Value |= (op & UINT64_C(31)) << 11; 7500 // op: wd 7501 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7502 Value |= (op & UINT64_C(31)) << 6; 7503 break; 7504 } 7505 default: 7506 std::string msg; 7507 raw_string_ostream Msg(msg); 7508 Msg << "Not supported instr: " << MI; 7509 report_fatal_error(Msg.str()); 7510 } 7511 return Value; 7512} 7513 7514#ifdef ENABLE_INSTR_PREDICATE_VERIFIER 7515#undef ENABLE_INSTR_PREDICATE_VERIFIER 7516#include <sstream> 7517 7518// Flags for subtarget features that participate in instruction matching. 7519enum SubtargetFeatureFlag : uint64_t { 7520 Feature_HasMips2 = (1ULL << 10), 7521 Feature_HasMips3_32 = (1ULL << 16), 7522 Feature_HasMips3_32r2 = (1ULL << 17), 7523 Feature_HasMips3 = (1ULL << 11), 7524 Feature_NotMips3 = (1ULL << 44), 7525 Feature_HasMips4_32 = (1ULL << 18), 7526 Feature_NotMips4_32 = (1ULL << 46), 7527 Feature_HasMips4_32r2 = (1ULL << 19), 7528 Feature_HasMips5_32r2 = (1ULL << 20), 7529 Feature_HasMips32 = (1ULL << 12), 7530 Feature_HasMips32r2 = (1ULL << 13), 7531 Feature_HasMips32r5 = (1ULL << 14), 7532 Feature_HasMips32r6 = (1ULL << 15), 7533 Feature_NotMips32r6 = (1ULL << 45), 7534 Feature_IsGP64bit = (1ULL << 31), 7535 Feature_IsGP32bit = (1ULL << 30), 7536 Feature_IsPTR64bit = (1ULL << 35), 7537 Feature_IsPTR32bit = (1ULL << 34), 7538 Feature_HasMips64 = (1ULL << 21), 7539 Feature_NotMips64 = (1ULL << 47), 7540 Feature_HasMips64r2 = (1ULL << 22), 7541 Feature_HasMips64r5 = (1ULL << 23), 7542 Feature_HasMips64r6 = (1ULL << 24), 7543 Feature_NotMips64r6 = (1ULL << 48), 7544 Feature_InMips16Mode = (1ULL << 28), 7545 Feature_NotInMips16Mode = (1ULL << 43), 7546 Feature_HasCnMips = (1ULL << 1), 7547 Feature_NotCnMips = (1ULL << 40), 7548 Feature_IsSym32 = (1ULL << 37), 7549 Feature_IsSym64 = (1ULL << 38), 7550 Feature_HasStdEnc = (1ULL << 25), 7551 Feature_InMicroMips = (1ULL << 27), 7552 Feature_NotInMicroMips = (1ULL << 42), 7553 Feature_HasEVA = (1ULL << 5), 7554 Feature_HasMSA = (1ULL << 7), 7555 Feature_HasMadd4 = (1ULL << 9), 7556 Feature_HasMT = (1ULL << 8), 7557 Feature_UseIndirectJumpsHazard = (1ULL << 49), 7558 Feature_NoIndirectJumpGuards = (1ULL << 39), 7559 Feature_HasCRC = (1ULL << 0), 7560 Feature_HasVirt = (1ULL << 26), 7561 Feature_HasGINV = (1ULL << 6), 7562 Feature_IsFP64bit = (1ULL << 29), 7563 Feature_NotFP64bit = (1ULL << 41), 7564 Feature_IsSingleFloat = (1ULL << 36), 7565 Feature_IsNotSingleFloat = (1ULL << 32), 7566 Feature_IsNotSoftFloat = (1ULL << 33), 7567 Feature_HasDSP = (1ULL << 2), 7568 Feature_HasDSPR2 = (1ULL << 3), 7569 Feature_HasDSPR3 = (1ULL << 4), 7570 Feature_None = 0 7571}; 7572 7573#ifndef NDEBUG 7574static const char *SubtargetFeatureNames[] = { 7575 "Feature_HasCRC", 7576 "Feature_HasCnMips", 7577 "Feature_HasDSP", 7578 "Feature_HasDSPR2", 7579 "Feature_HasDSPR3", 7580 "Feature_HasEVA", 7581 "Feature_HasGINV", 7582 "Feature_HasMSA", 7583 "Feature_HasMT", 7584 "Feature_HasMadd4", 7585 "Feature_HasMips2", 7586 "Feature_HasMips3", 7587 "Feature_HasMips32", 7588 "Feature_HasMips32r2", 7589 "Feature_HasMips32r5", 7590 "Feature_HasMips32r6", 7591 "Feature_HasMips3_32", 7592 "Feature_HasMips3_32r2", 7593 "Feature_HasMips4_32", 7594 "Feature_HasMips4_32r2", 7595 "Feature_HasMips5_32r2", 7596 "Feature_HasMips64", 7597 "Feature_HasMips64r2", 7598 "Feature_HasMips64r5", 7599 "Feature_HasMips64r6", 7600 "Feature_HasStdEnc", 7601 "Feature_HasVirt", 7602 "Feature_InMicroMips", 7603 "Feature_InMips16Mode", 7604 "Feature_IsFP64bit", 7605 "Feature_IsGP32bit", 7606 "Feature_IsGP64bit", 7607 "Feature_IsNotSingleFloat", 7608 "Feature_IsNotSoftFloat", 7609 "Feature_IsPTR32bit", 7610 "Feature_IsPTR64bit", 7611 "Feature_IsSingleFloat", 7612 "Feature_IsSym32", 7613 "Feature_IsSym64", 7614 "Feature_NoIndirectJumpGuards", 7615 "Feature_NotCnMips", 7616 "Feature_NotFP64bit", 7617 "Feature_NotInMicroMips", 7618 "Feature_NotInMips16Mode", 7619 "Feature_NotMips3", 7620 "Feature_NotMips32r6", 7621 "Feature_NotMips4_32", 7622 "Feature_NotMips64", 7623 "Feature_NotMips64r6", 7624 "Feature_UseIndirectJumpsHazard", 7625 nullptr 7626}; 7627 7628#endif // NDEBUG 7629uint64_t MipsMCCodeEmitter:: 7630computeAvailableFeatures(const FeatureBitset& FB) const { 7631 uint64_t Features = 0; 7632 if ((FB[Mips::FeatureMips2])) 7633 Features |= Feature_HasMips2; 7634 if ((FB[Mips::FeatureMips3_32])) 7635 Features |= Feature_HasMips3_32; 7636 if ((FB[Mips::FeatureMips3_32r2])) 7637 Features |= Feature_HasMips3_32r2; 7638 if ((FB[Mips::FeatureMips3])) 7639 Features |= Feature_HasMips3; 7640 if ((!FB[Mips::FeatureMips3])) 7641 Features |= Feature_NotMips3; 7642 if ((FB[Mips::FeatureMips4_32])) 7643 Features |= Feature_HasMips4_32; 7644 if ((!FB[Mips::FeatureMips4_32])) 7645 Features |= Feature_NotMips4_32; 7646 if ((FB[Mips::FeatureMips4_32r2])) 7647 Features |= Feature_HasMips4_32r2; 7648 if ((FB[Mips::FeatureMips5_32r2])) 7649 Features |= Feature_HasMips5_32r2; 7650 if ((FB[Mips::FeatureMips32])) 7651 Features |= Feature_HasMips32; 7652 if ((FB[Mips::FeatureMips32r2])) 7653 Features |= Feature_HasMips32r2; 7654 if ((FB[Mips::FeatureMips32r5])) 7655 Features |= Feature_HasMips32r5; 7656 if ((FB[Mips::FeatureMips32r6])) 7657 Features |= Feature_HasMips32r6; 7658 if ((!FB[Mips::FeatureMips32r6])) 7659 Features |= Feature_NotMips32r6; 7660 if ((FB[Mips::FeatureGP64Bit])) 7661 Features |= Feature_IsGP64bit; 7662 if ((!FB[Mips::FeatureGP64Bit])) 7663 Features |= Feature_IsGP32bit; 7664 if ((FB[Mips::FeaturePTR64Bit])) 7665 Features |= Feature_IsPTR64bit; 7666 if ((!FB[Mips::FeaturePTR64Bit])) 7667 Features |= Feature_IsPTR32bit; 7668 if ((FB[Mips::FeatureMips64])) 7669 Features |= Feature_HasMips64; 7670 if ((!FB[Mips::FeatureMips64])) 7671 Features |= Feature_NotMips64; 7672 if ((FB[Mips::FeatureMips64r2])) 7673 Features |= Feature_HasMips64r2; 7674 if ((FB[Mips::FeatureMips64r5])) 7675 Features |= Feature_HasMips64r5; 7676 if ((FB[Mips::FeatureMips64r6])) 7677 Features |= Feature_HasMips64r6; 7678 if ((!FB[Mips::FeatureMips64r6])) 7679 Features |= Feature_NotMips64r6; 7680 if ((FB[Mips::FeatureMips16])) 7681 Features |= Feature_InMips16Mode; 7682 if ((!FB[Mips::FeatureMips16])) 7683 Features |= Feature_NotInMips16Mode; 7684 if ((FB[Mips::FeatureCnMips])) 7685 Features |= Feature_HasCnMips; 7686 if ((!FB[Mips::FeatureCnMips])) 7687 Features |= Feature_NotCnMips; 7688 if ((FB[Mips::FeatureSym32])) 7689 Features |= Feature_IsSym32; 7690 if ((!FB[Mips::FeatureSym32])) 7691 Features |= Feature_IsSym64; 7692 if ((!FB[Mips::FeatureMips16])) 7693 Features |= Feature_HasStdEnc; 7694 if ((FB[Mips::FeatureMicroMips])) 7695 Features |= Feature_InMicroMips; 7696 if ((!FB[Mips::FeatureMicroMips])) 7697 Features |= Feature_NotInMicroMips; 7698 if ((FB[Mips::FeatureEVA])) 7699 Features |= Feature_HasEVA; 7700 if ((FB[Mips::FeatureMSA])) 7701 Features |= Feature_HasMSA; 7702 if ((!FB[Mips::FeatureMadd4])) 7703 Features |= Feature_HasMadd4; 7704 if ((FB[Mips::FeatureMT])) 7705 Features |= Feature_HasMT; 7706 if ((FB[Mips::FeatureUseIndirectJumpsHazard])) 7707 Features |= Feature_UseIndirectJumpsHazard; 7708 if ((!FB[Mips::FeatureUseIndirectJumpsHazard])) 7709 Features |= Feature_NoIndirectJumpGuards; 7710 if ((FB[Mips::FeatureCRC])) 7711 Features |= Feature_HasCRC; 7712 if ((FB[Mips::FeatureVirt])) 7713 Features |= Feature_HasVirt; 7714 if ((FB[Mips::FeatureGINV])) 7715 Features |= Feature_HasGINV; 7716 if ((FB[Mips::FeatureFP64Bit])) 7717 Features |= Feature_IsFP64bit; 7718 if ((!FB[Mips::FeatureFP64Bit])) 7719 Features |= Feature_NotFP64bit; 7720 if ((FB[Mips::FeatureSingleFloat])) 7721 Features |= Feature_IsSingleFloat; 7722 if ((!FB[Mips::FeatureSingleFloat])) 7723 Features |= Feature_IsNotSingleFloat; 7724 if ((!FB[Mips::FeatureSoftFloat])) 7725 Features |= Feature_IsNotSoftFloat; 7726 if ((FB[Mips::FeatureDSP])) 7727 Features |= Feature_HasDSP; 7728 if ((FB[Mips::FeatureDSPR2])) 7729 Features |= Feature_HasDSPR2; 7730 if ((FB[Mips::FeatureDSPR3])) 7731 Features |= Feature_HasDSPR3; 7732 return Features; 7733} 7734 7735void MipsMCCodeEmitter::verifyInstructionPredicates( 7736 const MCInst &Inst, uint64_t AvailableFeatures) const { 7737#ifndef NDEBUG 7738 static uint64_t RequiredFeatures[] = { 7739 0, // PHI = 0 7740 0, // INLINEASM = 1 7741 0, // CFI_INSTRUCTION = 2 7742 0, // EH_LABEL = 3 7743 0, // GC_LABEL = 4 7744 0, // ANNOTATION_LABEL = 5 7745 0, // KILL = 6 7746 0, // EXTRACT_SUBREG = 7 7747 0, // INSERT_SUBREG = 8 7748 0, // IMPLICIT_DEF = 9 7749 0, // SUBREG_TO_REG = 10 7750 0, // COPY_TO_REGCLASS = 11 7751 0, // DBG_VALUE = 12 7752 0, // DBG_LABEL = 13 7753 0, // REG_SEQUENCE = 14 7754 0, // COPY = 15 7755 0, // BUNDLE = 16 7756 0, // LIFETIME_START = 17 7757 0, // LIFETIME_END = 18 7758 0, // STACKMAP = 19 7759 0, // FENTRY_CALL = 20 7760 0, // PATCHPOINT = 21 7761 0, // LOAD_STACK_GUARD = 22 7762 0, // STATEPOINT = 23 7763 0, // LOCAL_ESCAPE = 24 7764 0, // FAULTING_OP = 25 7765 0, // PATCHABLE_OP = 26 7766 0, // PATCHABLE_FUNCTION_ENTER = 27 7767 0, // PATCHABLE_RET = 28 7768 0, // PATCHABLE_FUNCTION_EXIT = 29 7769 0, // PATCHABLE_TAIL_CALL = 30 7770 0, // PATCHABLE_EVENT_CALL = 31 7771 0, // PATCHABLE_TYPED_EVENT_CALL = 32 7772 0, // ICALL_BRANCH_FUNNEL = 33 7773 0, // G_ADD = 34 7774 0, // G_SUB = 35 7775 0, // G_MUL = 36 7776 0, // G_SDIV = 37 7777 0, // G_UDIV = 38 7778 0, // G_SREM = 39 7779 0, // G_UREM = 40 7780 0, // G_AND = 41 7781 0, // G_OR = 42 7782 0, // G_XOR = 43 7783 0, // G_IMPLICIT_DEF = 44 7784 0, // G_PHI = 45 7785 0, // G_FRAME_INDEX = 46 7786 0, // G_GLOBAL_VALUE = 47 7787 0, // G_EXTRACT = 48 7788 0, // G_UNMERGE_VALUES = 49 7789 0, // G_INSERT = 50 7790 0, // G_MERGE_VALUES = 51 7791 0, // G_PTRTOINT = 52 7792 0, // G_INTTOPTR = 53 7793 0, // G_BITCAST = 54 7794 0, // G_LOAD = 55 7795 0, // G_SEXTLOAD = 56 7796 0, // G_ZEXTLOAD = 57 7797 0, // G_STORE = 58 7798 0, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 59 7799 0, // G_ATOMIC_CMPXCHG = 60 7800 0, // G_ATOMICRMW_XCHG = 61 7801 0, // G_ATOMICRMW_ADD = 62 7802 0, // G_ATOMICRMW_SUB = 63 7803 0, // G_ATOMICRMW_AND = 64 7804 0, // G_ATOMICRMW_NAND = 65 7805 0, // G_ATOMICRMW_OR = 66 7806 0, // G_ATOMICRMW_XOR = 67 7807 0, // G_ATOMICRMW_MAX = 68 7808 0, // G_ATOMICRMW_MIN = 69 7809 0, // G_ATOMICRMW_UMAX = 70 7810 0, // G_ATOMICRMW_UMIN = 71 7811 0, // G_BRCOND = 72 7812 0, // G_BRINDIRECT = 73 7813 0, // G_INTRINSIC = 74 7814 0, // G_INTRINSIC_W_SIDE_EFFECTS = 75 7815 0, // G_ANYEXT = 76 7816 0, // G_TRUNC = 77 7817 0, // G_CONSTANT = 78 7818 0, // G_FCONSTANT = 79 7819 0, // G_VASTART = 80 7820 0, // G_VAARG = 81 7821 0, // G_SEXT = 82 7822 0, // G_ZEXT = 83 7823 0, // G_SHL = 84 7824 0, // G_LSHR = 85 7825 0, // G_ASHR = 86 7826 0, // G_ICMP = 87 7827 0, // G_FCMP = 88 7828 0, // G_SELECT = 89 7829 0, // G_UADDE = 90 7830 0, // G_USUBE = 91 7831 0, // G_SADDO = 92 7832 0, // G_SSUBO = 93 7833 0, // G_UMULO = 94 7834 0, // G_SMULO = 95 7835 0, // G_UMULH = 96 7836 0, // G_SMULH = 97 7837 0, // G_FADD = 98 7838 0, // G_FSUB = 99 7839 0, // G_FMUL = 100 7840 0, // G_FMA = 101 7841 0, // G_FDIV = 102 7842 0, // G_FREM = 103 7843 0, // G_FPOW = 104 7844 0, // G_FEXP = 105 7845 0, // G_FEXP2 = 106 7846 0, // G_FLOG = 107 7847 0, // G_FLOG2 = 108 7848 0, // G_FNEG = 109 7849 0, // G_FPEXT = 110 7850 0, // G_FPTRUNC = 111 7851 0, // G_FPTOSI = 112 7852 0, // G_FPTOUI = 113 7853 0, // G_SITOFP = 114 7854 0, // G_UITOFP = 115 7855 0, // G_FABS = 116 7856 0, // G_GEP = 117 7857 0, // G_PTR_MASK = 118 7858 0, // G_BR = 119 7859 0, // G_INSERT_VECTOR_ELT = 120 7860 0, // G_EXTRACT_VECTOR_ELT = 121 7861 0, // G_SHUFFLE_VECTOR = 122 7862 0, // G_BSWAP = 123 7863 0, // G_ADDRSPACE_CAST = 124 7864 0, // G_BLOCK_ADDR = 125 7865 0, // ABSMacro = 126 7866 0, // ADJCALLSTACKDOWN = 127 7867 0, // ADJCALLSTACKUP = 128 7868 Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V_D_PSEUDO = 129 7869 Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V_H_PSEUDO = 130 7870 Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V_W_PSEUDO = 131 7871 Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I16 = 132 7872 Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I16_POSTRA = 133 7873 Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I32 = 134 7874 Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I32_POSTRA = 135 7875 Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I64 = 136 7876 Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I64_POSTRA = 137 7877 Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I8 = 138 7878 Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I8_POSTRA = 139 7879 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I16 = 140 7880 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I16_POSTRA = 141 7881 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I32 = 142 7882 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I32_POSTRA = 143 7883 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I64 = 144 7884 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I64_POSTRA = 145 7885 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I8 = 146 7886 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I8_POSTRA = 147 7887 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I16 = 148 7888 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I16_POSTRA = 149 7889 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I32 = 150 7890 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I32_POSTRA = 151 7891 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I64 = 152 7892 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I64_POSTRA = 153 7893 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I8 = 154 7894 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I8_POSTRA = 155 7895 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I16 = 156 7896 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I16_POSTRA = 157 7897 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I32 = 158 7898 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I32_POSTRA = 159 7899 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I64 = 160 7900 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I64_POSTRA = 161 7901 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I8 = 162 7902 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I8_POSTRA = 163 7903 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I16 = 164 7904 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I16_POSTRA = 165 7905 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I32 = 166 7906 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I32_POSTRA = 167 7907 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I64 = 168 7908 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I64_POSTRA = 169 7909 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I8 = 170 7910 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I8_POSTRA = 171 7911 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I16 = 172 7912 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I16_POSTRA = 173 7913 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I32 = 174 7914 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I32_POSTRA = 175 7915 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I64 = 176 7916 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I64_POSTRA = 177 7917 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I8 = 178 7918 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I8_POSTRA = 179 7919 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I16 = 180 7920 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I16_POSTRA = 181 7921 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I32 = 182 7922 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I32_POSTRA = 183 7923 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I64 = 184 7924 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I64_POSTRA = 185 7925 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I8 = 186 7926 Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I8_POSTRA = 187 7927 Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I16 = 188 7928 Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I16_POSTRA = 189 7929 Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I32 = 190 7930 Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I32_POSTRA = 191 7931 Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I64 = 192 7932 Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I64_POSTRA = 193 7933 Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I8 = 194 7934 Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I8_POSTRA = 195 7935 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // B = 196 7936 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BAL_BR = 197 7937 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BAL_BR_MM = 198 7938 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BEQLImmMacro = 199 7939 0, // BGE = 200 7940 0, // BGEImmMacro = 201 7941 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGEL = 202 7942 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGELImmMacro = 203 7943 0, // BGEU = 204 7944 0, // BGEUImmMacro = 205 7945 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGEUL = 206 7946 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGEULImmMacro = 207 7947 0, // BGT = 208 7948 0, // BGTImmMacro = 209 7949 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTL = 210 7950 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTLImmMacro = 211 7951 0, // BGTU = 212 7952 0, // BGTUImmMacro = 213 7953 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTUL = 214 7954 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTULImmMacro = 215 7955 0, // BLE = 216 7956 0, // BLEImmMacro = 217 7957 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLEL = 218 7958 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLELImmMacro = 219 7959 0, // BLEU = 220 7960 0, // BLEUImmMacro = 221 7961 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLEUL = 222 7962 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLEULImmMacro = 223 7963 0, // BLT = 224 7964 0, // BLTImmMacro = 225 7965 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTL = 226 7966 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTLImmMacro = 227 7967 0, // BLTU = 228 7968 0, // BLTUImmMacro = 229 7969 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTUL = 230 7970 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTULImmMacro = 231 7971 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BNELImmMacro = 232 7972 0, // BPOSGE32_PSEUDO = 233 7973 Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_D_PSEUDO = 234 7974 Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_FD_PSEUDO = 235 7975 Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_FW_PSEUDO = 236 7976 Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_H_PSEUDO = 237 7977 Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_W_PSEUDO = 238 7978 Feature_InMicroMips | Feature_NotMips32r6 | 0, // B_MM = 239 7979 0, // B_MMR6_Pseudo = 240 7980 Feature_InMicroMips | 0, // B_MM_Pseudo = 241 7981 0, // BeqImm = 242 7982 0, // BneImm = 243 7983 Feature_InMips16Mode | 0, // BteqzT8CmpX16 = 244 7984 Feature_InMips16Mode | 0, // BteqzT8CmpiX16 = 245 7985 Feature_InMips16Mode | 0, // BteqzT8SltX16 = 246 7986 Feature_InMips16Mode | 0, // BteqzT8SltiX16 = 247 7987 Feature_InMips16Mode | 0, // BteqzT8SltiuX16 = 248 7988 Feature_InMips16Mode | 0, // BteqzT8SltuX16 = 249 7989 Feature_InMips16Mode | 0, // BtnezT8CmpX16 = 250 7990 Feature_InMips16Mode | 0, // BtnezT8CmpiX16 = 251 7991 Feature_InMips16Mode | 0, // BtnezT8SltX16 = 252 7992 Feature_InMips16Mode | 0, // BtnezT8SltiX16 = 253 7993 Feature_InMips16Mode | 0, // BtnezT8SltiuX16 = 254 7994 Feature_InMips16Mode | 0, // BtnezT8SltuX16 = 255 7995 Feature_NotInMips16Mode | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // BuildPairF64 = 256 7996 Feature_NotInMips16Mode | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // BuildPairF64_64 = 257 7997 Feature_HasMT | 0, // CFTC1 = 258 7998 Feature_InMips16Mode | 0, // CONSTPOOL_ENTRY = 259 7999 Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_FD_PSEUDO = 260 8000 Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_FW_PSEUDO = 261 8001 Feature_HasMT | 0, // CTTC1 = 262 8002 Feature_InMips16Mode | 0, // Constant32 = 263 8003 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DMULImmMacro = 264 8004 Feature_HasMips3 | Feature_NotMips64r6 | Feature_NotCnMips | 0, // DMULMacro = 265 8005 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DMULOMacro = 266 8006 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DMULOUMacro = 267 8007 Feature_HasStdEnc | Feature_HasMips64 | 0, // DROL = 268 8008 Feature_HasStdEnc | Feature_HasMips64 | 0, // DROLImm = 269 8009 Feature_HasStdEnc | Feature_HasMips64 | 0, // DROR = 270 8010 Feature_HasStdEnc | Feature_HasMips64 | 0, // DRORImm = 271 8011 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSDivIMacro = 272 8012 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSDivMacro = 273 8013 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSRemIMacro = 274 8014 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSRemMacro = 275 8015 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DUDivIMacro = 276 8016 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DUDivMacro = 277 8017 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DURemIMacro = 278 8018 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DURemMacro = 279 8019 Feature_NotInMips16Mode | 0, // ERet = 280 8020 Feature_NotInMips16Mode | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // ExtractElementF64 = 281 8021 Feature_NotInMips16Mode | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // ExtractElementF64_64 = 282 8022 Feature_HasStdEnc | Feature_HasMSA | 0, // FABS_D = 283 8023 Feature_HasStdEnc | Feature_HasMSA | 0, // FABS_W = 284 8024 Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_D_1_PSEUDO = 285 8025 Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_W_1_PSEUDO = 286 8026 Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_FD_PSEUDO = 287 8027 Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_FW_PSEUDO = 288 8028 Feature_InMips16Mode | 0, // GotPrologue16 = 289 8029 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_B_VIDX64_PSEUDO = 290 8030 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_B_VIDX_PSEUDO = 291 8031 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_D_VIDX64_PSEUDO = 292 8032 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_D_VIDX_PSEUDO = 293 8033 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FD_PSEUDO = 294 8034 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FD_VIDX64_PSEUDO = 295 8035 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FD_VIDX_PSEUDO = 296 8036 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FW_PSEUDO = 297 8037 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FW_VIDX64_PSEUDO = 298 8038 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FW_VIDX_PSEUDO = 299 8039 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_H_VIDX64_PSEUDO = 300 8040 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_H_VIDX_PSEUDO = 301 8041 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_W_VIDX64_PSEUDO = 302 8042 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_W_VIDX_PSEUDO = 303 8043 Feature_NotInMips16Mode | Feature_NoIndirectJumpGuards | 0, // JALR64Pseudo = 304 8044 Feature_NotInMips16Mode | Feature_UseIndirectJumpsHazard | 0, // JALRHB64Pseudo = 305 8045 Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // JALRHBPseudo = 306 8046 Feature_HasStdEnc | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // JALRPseudo = 307 8047 0, // JalOneReg = 308 8048 0, // JalTwoReg = 309 8049 Feature_HasStdEnc | Feature_NotMips3 | 0, // LDMacro = 310 8050 Feature_HasMSA | 0, // LD_F16 = 311 8051 Feature_NotInMips16Mode | 0, // LOAD_ACC128 = 312 8052 Feature_NotInMips16Mode | 0, // LOAD_ACC64 = 313 8053 Feature_NotInMips16Mode | 0, // LOAD_ACC64DSP = 314 8054 Feature_NotInMips16Mode | 0, // LOAD_CCOND_DSP = 315 8055 Feature_NotInMips16Mode | 0, // LONG_BRANCH_ADDiu = 316 8056 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LONG_BRANCH_DADDiu = 317 8057 Feature_NotInMips16Mode | 0, // LONG_BRANCH_LUi = 318 8058 Feature_InMicroMips | 0, // LWM_MM = 319 8059 0, // LoadAddrImm32 = 320 8060 0, // LoadAddrImm64 = 321 8061 0, // LoadAddrReg32 = 322 8062 0, // LoadAddrReg64 = 323 8063 0, // LoadImm32 = 324 8064 0, // LoadImm64 = 325 8065 Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // LoadImmDoubleFGR = 326 8066 Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // LoadImmDoubleFGR_32 = 327 8067 0, // LoadImmDoubleGPR = 328 8068 Feature_IsNotSoftFloat | 0, // LoadImmSingleFGR = 329 8069 0, // LoadImmSingleGPR = 330 8070 Feature_InMips16Mode | 0, // LwConstant32 = 331 8071 Feature_HasMT | 0, // MFTACX = 332 8072 Feature_HasMT | 0, // MFTC0 = 333 8073 Feature_HasMT | 0, // MFTC1 = 334 8074 Feature_HasMT | 0, // MFTDSP = 335 8075 Feature_HasMT | 0, // MFTGPR = 336 8076 Feature_HasMT | 0, // MFTHC1 = 337 8077 Feature_HasMT | 0, // MFTHI = 338 8078 Feature_HasMT | 0, // MFTLO = 339 8079 0, // MIPSeh_return32 = 340 8080 0, // MIPSeh_return64 = 341 8081 Feature_HasMSA | 0, // MSA_FP_EXTEND_D_PSEUDO = 342 8082 Feature_HasMSA | 0, // MSA_FP_EXTEND_W_PSEUDO = 343 8083 Feature_HasMSA | 0, // MSA_FP_ROUND_D_PSEUDO = 344 8084 Feature_HasMSA | 0, // MSA_FP_ROUND_W_PSEUDO = 345 8085 Feature_HasMT | 0, // MTTACX = 346 8086 Feature_HasMT | 0, // MTTC0 = 347 8087 Feature_HasMT | 0, // MTTC1 = 348 8088 Feature_HasMT | 0, // MTTDSP = 349 8089 Feature_HasMT | 0, // MTTGPR = 350 8090 Feature_HasMT | 0, // MTTHC1 = 351 8091 Feature_HasMT | 0, // MTTHI = 352 8092 Feature_HasMT | 0, // MTTLO = 353 8093 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULImmMacro = 354 8094 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULOMacro = 355 8095 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULOUMacro = 356 8096 Feature_InMips16Mode | 0, // MultRxRy16 = 357 8097 Feature_InMips16Mode | 0, // MultRxRyRz16 = 358 8098 Feature_InMips16Mode | 0, // MultuRxRy16 = 359 8099 Feature_InMips16Mode | 0, // MultuRxRyRz16 = 360 8100 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // NOP = 361 8101 Feature_IsGP32bit | 0, // NORImm = 362 8102 Feature_IsGP64bit | 0, // NORImm64 = 363 8103 Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V_D_PSEUDO = 364 8104 Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V_H_PSEUDO = 365 8105 Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V_W_PSEUDO = 366 8106 Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V_D_PSEUDO = 367 8107 Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V_H_PSEUDO = 368 8108 Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V_W_PSEUDO = 369 8109 Feature_HasDSP | 0, // PseudoCMPU_EQ_QB = 370 8110 Feature_HasDSP | 0, // PseudoCMPU_LE_QB = 371 8111 Feature_HasDSP | 0, // PseudoCMPU_LT_QB = 372 8112 Feature_HasDSP | 0, // PseudoCMP_EQ_PH = 373 8113 Feature_HasDSP | 0, // PseudoCMP_LE_PH = 374 8114 Feature_HasDSP | 0, // PseudoCMP_LT_PH = 375 8115 Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_D32_W = 376 8116 Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_D64_L = 377 8117 Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_D64_W = 378 8118 Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_S_L = 379 8119 Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_S_W = 380 8120 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDMULT = 381 8121 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDMULTu = 382 8122 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDSDIV = 383 8123 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDUDIV = 384 8124 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranch = 385 8125 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranch64 = 386 8126 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranch64R6 = 387 8127 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranchR6 = 388 8128 Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoIndirectBranch_MM = 389 8129 Feature_InMicroMips | Feature_HasMips32r6 | 0, // PseudoIndirectBranch_MMR6 = 390 8130 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndirectHazardBranch = 391 8131 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndirectHazardBranch64 = 392 8132 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndrectHazardBranch64R6 = 393 8133 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndrectHazardBranchR6 = 394 8134 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMADD = 395 8135 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMADDU = 396 8136 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFHI = 397 8137 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFHI64 = 398 8138 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFLO = 399 8139 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFLO64 = 400 8140 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMSUB = 401 8141 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMSUBU = 402 8142 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMTLOHI = 403 8143 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMTLOHI64 = 404 8144 Feature_NotInMips16Mode | 0, // PseudoMTLOHI_DSP = 405 8145 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMULT = 406 8146 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMULTu = 407 8147 Feature_HasDSP | 0, // PseudoPICK_PH = 408 8148 Feature_HasDSP | 0, // PseudoPICK_QB = 409 8149 0, // PseudoReturn = 410 8150 0, // PseudoReturn64 = 411 8151 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // PseudoSDIV = 412 8152 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_D32 = 413 8153 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_D64 = 414 8154 Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_I = 415 8155 Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_I64 = 416 8156 Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_S = 417 8157 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_D32 = 418 8158 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_D64 = 419 8159 Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_I = 420 8160 Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_I64 = 421 8161 Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_S = 422 8162 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECT_D32 = 423 8163 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECT_D64 = 424 8164 Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECT_I = 425 8165 Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECT_I64 = 426 8166 Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECT_S = 427 8167 Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // PseudoTRUNC_W_D = 428 8168 Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // PseudoTRUNC_W_D32 = 429 8169 0, // PseudoTRUNC_W_S = 430 8170 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // PseudoUDIV = 431 8171 0, // ROL = 432 8172 0, // ROLImm = 433 8173 0, // ROR = 434 8174 0, // RORImm = 435 8175 Feature_NotInMips16Mode | 0, // RetRA = 436 8176 Feature_InMips16Mode | 0, // RetRA16 = 437 8177 Feature_InMicroMips | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDIV_MM_Pseudo = 438 8178 Feature_HasStdEnc | Feature_NotMips3 | 0, // SDMacro = 439 8179 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDivIMacro = 440 8180 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDivMacro = 441 8181 Feature_NotCnMips | 0, // SEQIMacro = 442 8182 Feature_NotCnMips | 0, // SEQMacro = 443 8183 Feature_IsGP64bit | 0, // SLTImm64 = 444 8184 Feature_IsGP64bit | 0, // SLTUImm64 = 445 8185 0, // SNZ_B_PSEUDO = 446 8186 0, // SNZ_D_PSEUDO = 447 8187 0, // SNZ_H_PSEUDO = 448 8188 0, // SNZ_V_PSEUDO = 449 8189 0, // SNZ_W_PSEUDO = 450 8190 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SRemIMacro = 451 8191 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SRemMacro = 452 8192 Feature_NotInMips16Mode | 0, // STORE_ACC128 = 453 8193 Feature_NotInMips16Mode | 0, // STORE_ACC64 = 454 8194 Feature_NotInMips16Mode | 0, // STORE_ACC64DSP = 455 8195 Feature_NotInMips16Mode | 0, // STORE_CCOND_DSP = 456 8196 Feature_HasMSA | 0, // ST_F16 = 457 8197 Feature_InMicroMips | 0, // SWM_MM = 458 8198 0, // SZ_B_PSEUDO = 459 8199 0, // SZ_D_PSEUDO = 460 8200 0, // SZ_H_PSEUDO = 461 8201 0, // SZ_V_PSEUDO = 462 8202 0, // SZ_W_PSEUDO = 463 8203 Feature_InMips16Mode | 0, // SelBeqZ = 464 8204 Feature_InMips16Mode | 0, // SelBneZ = 465 8205 Feature_InMips16Mode | 0, // SelTBteqZCmp = 466 8206 Feature_InMips16Mode | 0, // SelTBteqZCmpi = 467 8207 Feature_InMips16Mode | 0, // SelTBteqZSlt = 468 8208 Feature_InMips16Mode | 0, // SelTBteqZSlti = 469 8209 Feature_InMips16Mode | 0, // SelTBteqZSltiu = 470 8210 Feature_InMips16Mode | 0, // SelTBteqZSltu = 471 8211 Feature_InMips16Mode | 0, // SelTBtneZCmp = 472 8212 Feature_InMips16Mode | 0, // SelTBtneZCmpi = 473 8213 Feature_InMips16Mode | 0, // SelTBtneZSlt = 474 8214 Feature_InMips16Mode | 0, // SelTBtneZSlti = 475 8215 Feature_InMips16Mode | 0, // SelTBtneZSltiu = 476 8216 Feature_InMips16Mode | 0, // SelTBtneZSltu = 477 8217 Feature_InMips16Mode | 0, // SltCCRxRy16 = 478 8218 Feature_InMips16Mode | 0, // SltiCCRxImmX16 = 479 8219 Feature_InMips16Mode | 0, // SltiuCCRxImmX16 = 480 8220 Feature_InMips16Mode | 0, // SltuCCRxRy16 = 481 8221 Feature_InMips16Mode | 0, // SltuRxRyRz16 = 482 8222 Feature_HasStdEnc | Feature_NotInMips16Mode | Feature_NotInMicroMips | 0, // TAILCALL = 483 8223 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALL64R6REG = 484 8224 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLHB64R6REG = 485 8225 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLHBR6REG = 486 8226 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALLR6REG = 487 8227 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALLREG = 488 8228 Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALLREG64 = 489 8229 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLREGHB = 490 8230 Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLREGHB64 = 491 8231 Feature_InMicroMips | Feature_NotMips32r6 | 0, // TAILCALLREG_MM = 492 8232 Feature_InMicroMips | Feature_HasMips32r6 | 0, // TAILCALLREG_MMR6 = 493 8233 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // TAILCALL_MM = 494 8234 Feature_InMicroMips | Feature_HasMips32r6 | 0, // TAILCALL_MMR6 = 495 8235 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TRAP = 496 8236 Feature_InMicroMips | 0, // TRAP_MM = 497 8237 Feature_InMicroMips | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // UDIV_MM_Pseudo = 498 8238 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // UDivIMacro = 499 8239 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // UDivMacro = 500 8240 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // URemIMacro = 501 8241 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // URemMacro = 502 8242 0, // Ulh = 503 8243 0, // Ulhu = 504 8244 0, // Ulw = 505 8245 0, // Ush = 506 8246 0, // Usw = 507 8247 Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V_D_PSEUDO = 508 8248 Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V_H_PSEUDO = 509 8249 Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V_W_PSEUDO = 510 8250 Feature_HasDSP | 0, // ABSQ_S_PH = 511 8251 Feature_InMicroMips | Feature_HasDSP | 0, // ABSQ_S_PH_MM = 512 8252 Feature_HasDSPR2 | 0, // ABSQ_S_QB = 513 8253 Feature_InMicroMips | Feature_HasDSPR2 | 0, // ABSQ_S_QB_MMR2 = 514 8254 Feature_HasDSP | 0, // ABSQ_S_W = 515 8255 Feature_InMicroMips | Feature_HasDSP | 0, // ABSQ_S_W_MM = 516 8256 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ADD = 517 8257 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // ADDIUPC = 518 8258 Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDIUPC_MM = 519 8259 Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDIUPC_MMR6 = 520 8260 Feature_InMicroMips | 0, // ADDIUR1SP_MM = 521 8261 Feature_InMicroMips | 0, // ADDIUR2_MM = 522 8262 Feature_InMicroMips | 0, // ADDIUS5_MM = 523 8263 Feature_InMicroMips | 0, // ADDIUSP_MM = 524 8264 Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDIU_MMR6 = 525 8265 Feature_HasDSPR2 | 0, // ADDQH_PH = 526 8266 Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDQH_PH_MMR2 = 527 8267 Feature_HasDSPR2 | 0, // ADDQH_R_PH = 528 8268 Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDQH_R_PH_MMR2 = 529 8269 Feature_HasDSPR2 | 0, // ADDQH_R_W = 530 8270 Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDQH_R_W_MMR2 = 531 8271 Feature_HasDSPR2 | 0, // ADDQH_W = 532 8272 Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDQH_W_MMR2 = 533 8273 Feature_HasDSP | 0, // ADDQ_PH = 534 8274 Feature_InMicroMips | Feature_HasDSP | 0, // ADDQ_PH_MM = 535 8275 Feature_HasDSP | 0, // ADDQ_S_PH = 536 8276 Feature_InMicroMips | Feature_HasDSP | 0, // ADDQ_S_PH_MM = 537 8277 Feature_HasDSP | 0, // ADDQ_S_W = 538 8278 Feature_InMicroMips | Feature_HasDSP | 0, // ADDQ_S_W_MM = 539 8279 Feature_HasDSP | 0, // ADDSC = 540 8280 Feature_InMicroMips | Feature_HasDSP | 0, // ADDSC_MM = 541 8281 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_B = 542 8282 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_D = 543 8283 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_H = 544 8284 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_W = 545 8285 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_B = 546 8286 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_D = 547 8287 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_H = 548 8288 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_W = 549 8289 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_B = 550 8290 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_D = 551 8291 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_H = 552 8292 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_W = 553 8293 Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDU16_MM = 554 8294 Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDU16_MMR6 = 555 8295 Feature_HasDSPR2 | 0, // ADDUH_QB = 556 8296 Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDUH_QB_MMR2 = 557 8297 Feature_HasDSPR2 | 0, // ADDUH_R_QB = 558 8298 Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDUH_R_QB_MMR2 = 559 8299 Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDU_MMR6 = 560 8300 Feature_HasDSPR2 | 0, // ADDU_PH = 561 8301 Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDU_PH_MMR2 = 562 8302 Feature_HasDSP | 0, // ADDU_QB = 563 8303 Feature_InMicroMips | Feature_HasDSP | 0, // ADDU_QB_MM = 564 8304 Feature_HasDSPR2 | 0, // ADDU_S_PH = 565 8305 Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDU_S_PH_MMR2 = 566 8306 Feature_HasDSP | 0, // ADDU_S_QB = 567 8307 Feature_InMicroMips | Feature_HasDSP | 0, // ADDU_S_QB_MM = 568 8308 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_B = 569 8309 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_D = 570 8310 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_H = 571 8311 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_W = 572 8312 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_B = 573 8313 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_D = 574 8314 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_H = 575 8315 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_W = 576 8316 Feature_HasDSP | 0, // ADDWC = 577 8317 Feature_InMicroMips | Feature_HasDSP | 0, // ADDWC_MM = 578 8318 Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_B = 579 8319 Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_D = 580 8320 Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_H = 581 8321 Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_W = 582 8322 Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADD_MM = 583 8323 Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADD_MMR6 = 584 8324 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // ADDi = 585 8325 Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDi_MM = 586 8326 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ADDiu = 587 8327 Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDiu_MM = 588 8328 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ADDu = 589 8329 Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDu_MM = 590 8330 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // ALIGN = 591 8331 Feature_InMicroMips | Feature_HasMips32r6 | 0, // ALIGN_MMR6 = 592 8332 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // ALUIPC = 593 8333 Feature_InMicroMips | Feature_HasMips32r6 | 0, // ALUIPC_MMR6 = 594 8334 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // AND = 595 8335 Feature_InMicroMips | Feature_NotMips32r6 | 0, // AND16_MM = 596 8336 Feature_InMicroMips | Feature_HasMips32r6 | 0, // AND16_MMR6 = 597 8337 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // AND64 = 598 8338 Feature_InMicroMips | Feature_NotMips32r6 | 0, // ANDI16_MM = 599 8339 Feature_InMicroMips | Feature_HasMips32r6 | 0, // ANDI16_MMR6 = 600 8340 Feature_HasStdEnc | Feature_HasMSA | 0, // ANDI_B = 601 8341 Feature_InMicroMips | Feature_HasMips32r6 | 0, // ANDI_MMR6 = 602 8342 Feature_InMicroMips | Feature_NotMips32r6 | 0, // AND_MM = 603 8343 Feature_InMicroMips | Feature_HasMips32r6 | 0, // AND_MMR6 = 604 8344 Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V = 605 8345 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ANDi = 606 8346 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // ANDi64 = 607 8347 Feature_InMicroMips | Feature_NotMips32r6 | 0, // ANDi_MM = 608 8348 Feature_HasDSPR2 | 0, // APPEND = 609 8349 Feature_InMicroMips | Feature_HasDSPR2 | 0, // APPEND_MMR2 = 610 8350 Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_B = 611 8351 Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_D = 612 8352 Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_H = 613 8353 Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_W = 614 8354 Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_B = 615 8355 Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_D = 616 8356 Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_H = 617 8357 Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_W = 618 8358 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // AUI = 619 8359 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // AUIPC = 620 8360 Feature_InMicroMips | Feature_HasMips32r6 | 0, // AUIPC_MMR6 = 621 8361 Feature_InMicroMips | Feature_HasMips32r6 | 0, // AUI_MMR6 = 622 8362 Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_B = 623 8363 Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_D = 624 8364 Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_H = 625 8365 Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_W = 626 8366 Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_B = 627 8367 Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_D = 628 8368 Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_H = 629 8369 Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_W = 630 8370 Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_B = 631 8371 Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_D = 632 8372 Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_H = 633 8373 Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_W = 634 8374 Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_B = 635 8375 Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_D = 636 8376 Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_H = 637 8377 Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_W = 638 8378 Feature_InMips16Mode | 0, // AddiuRxImmX16 = 639 8379 Feature_InMips16Mode | 0, // AddiuRxPcImmX16 = 640 8380 Feature_InMips16Mode | 0, // AddiuRxRxImm16 = 641 8381 Feature_InMips16Mode | 0, // AddiuRxRxImmX16 = 642 8382 Feature_InMips16Mode | 0, // AddiuRxRyOffMemX16 = 643 8383 Feature_InMips16Mode | 0, // AddiuSpImm16 = 644 8384 Feature_InMips16Mode | 0, // AddiuSpImmX16 = 645 8385 Feature_InMips16Mode | 0, // AdduRxRyRz16 = 646 8386 Feature_InMips16Mode | 0, // AndRxRxRy16 = 647 8387 Feature_InMicroMips | 0, // B16_MM = 648 8388 Feature_HasCnMips | 0, // BADDu = 649 8389 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // BAL = 650 8390 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // BALC = 651 8391 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BALC_MMR6 = 652 8392 Feature_HasDSPR2 | 0, // BALIGN = 653 8393 Feature_InMicroMips | Feature_HasDSPR2 | 0, // BALIGN_MMR2 = 654 8394 Feature_HasCnMips | 0, // BBIT0 = 655 8395 Feature_HasCnMips | 0, // BBIT032 = 656 8396 Feature_HasCnMips | 0, // BBIT1 = 657 8397 Feature_HasCnMips | 0, // BBIT132 = 658 8398 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BC = 659 8399 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC16_MMR6 = 660 8400 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1EQZ = 661 8401 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // BC1EQZC_MMR6 = 662 8402 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1F = 663 8403 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1FL = 664 8404 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // BC1F_MM = 665 8405 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1NEZ = 666 8406 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // BC1NEZC_MMR6 = 667 8407 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1T = 668 8408 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1TL = 669 8409 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // BC1T_MM = 670 8410 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BC2EQZ = 671 8411 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC2EQZC_MMR6 = 672 8412 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BC2NEZ = 673 8413 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC2NEZC_MMR6 = 674 8414 Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_B = 675 8415 Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_D = 676 8416 Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_H = 677 8417 Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_W = 678 8418 Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_B = 679 8419 Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_D = 680 8420 Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_H = 681 8421 Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_W = 682 8422 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC_MMR6 = 683 8423 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BEQ = 684 8424 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BEQ64 = 685 8425 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BEQC = 686 8426 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BEQC64 = 687 8427 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQC_MMR6 = 688 8428 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BEQL = 689 8429 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BEQZ16_MM = 690 8430 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BEQZALC = 691 8431 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQZALC_MMR6 = 692 8432 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BEQZC = 693 8433 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQZC16_MMR6 = 694 8434 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BEQZC64 = 695 8435 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BEQZC_MM = 696 8436 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQZC_MMR6 = 697 8437 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BEQ_MM = 698 8438 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEC = 699 8439 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGEC64 = 700 8440 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEC_MMR6 = 701 8441 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEUC = 702 8442 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGEUC64 = 703 8443 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEUC_MMR6 = 704 8444 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BGEZ = 705 8445 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BGEZ64 = 706 8446 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGEZAL = 707 8447 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEZALC = 708 8448 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEZALC_MMR6 = 709 8449 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGEZALL = 710 8450 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGEZALS_MM = 711 8451 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGEZAL_MM = 712 8452 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEZC = 713 8453 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGEZC64 = 714 8454 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEZC_MMR6 = 715 8455 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGEZL = 716 8456 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGEZ_MM = 717 8457 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BGTZ = 718 8458 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BGTZ64 = 719 8459 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGTZALC = 720 8460 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGTZALC_MMR6 = 721 8461 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGTZC = 722 8462 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGTZC64 = 723 8463 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGTZC_MMR6 = 724 8464 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGTZL = 725 8465 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGTZ_MM = 726 8466 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_B = 727 8467 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_D = 728 8468 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_H = 729 8469 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_W = 730 8470 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_B = 731 8471 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_D = 732 8472 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_H = 733 8473 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_W = 734 8474 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_B = 735 8475 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_D = 736 8476 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_H = 737 8477 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_W = 738 8478 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_B = 739 8479 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_D = 740 8480 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_H = 741 8481 Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_W = 742 8482 Feature_HasDSP | 0, // BITREV = 743 8483 Feature_InMicroMips | Feature_HasDSP | 0, // BITREV_MM = 744 8484 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // BITSWAP = 745 8485 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BITSWAP_MMR6 = 746 8486 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BLEZ = 747 8487 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BLEZ64 = 748 8488 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLEZALC = 749 8489 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLEZALC_MMR6 = 750 8490 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLEZC = 751 8491 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLEZC64 = 752 8492 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLEZC_MMR6 = 753 8493 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLEZL = 754 8494 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLEZ_MM = 755 8495 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTC = 756 8496 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLTC64 = 757 8497 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTC_MMR6 = 758 8498 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTUC = 759 8499 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLTUC64 = 760 8500 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTUC_MMR6 = 761 8501 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BLTZ = 762 8502 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BLTZ64 = 763 8503 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZAL = 764 8504 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTZALC = 765 8505 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTZALC_MMR6 = 766 8506 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZALL = 767 8507 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLTZALS_MM = 768 8508 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLTZAL_MM = 769 8509 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTZC = 770 8510 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLTZC64 = 771 8511 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTZC_MMR6 = 772 8512 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZL = 773 8513 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLTZ_MM = 774 8514 Feature_HasStdEnc | Feature_HasMSA | 0, // BMNZI_B = 775 8515 Feature_HasStdEnc | Feature_HasMSA | 0, // BMNZ_V = 776 8516 Feature_HasStdEnc | Feature_HasMSA | 0, // BMZI_B = 777 8517 Feature_HasStdEnc | Feature_HasMSA | 0, // BMZ_V = 778 8518 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BNE = 779 8519 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BNE64 = 780 8520 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNEC = 781 8521 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BNEC64 = 782 8522 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEC_MMR6 = 783 8523 Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_B = 784 8524 Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_D = 785 8525 Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_H = 786 8526 Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_W = 787 8527 Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_B = 788 8528 Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_D = 789 8529 Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_H = 790 8530 Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_W = 791 8531 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BNEL = 792 8532 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BNEZ16_MM = 793 8533 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNEZALC = 794 8534 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEZALC_MMR6 = 795 8535 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNEZC = 796 8536 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEZC16_MMR6 = 797 8537 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BNEZC64 = 798 8538 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BNEZC_MM = 799 8539 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEZC_MMR6 = 800 8540 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BNE_MM = 801 8541 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNVC = 802 8542 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNVC_MMR6 = 803 8543 Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_B = 804 8544 Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_D = 805 8545 Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_H = 806 8546 Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_V = 807 8547 Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_W = 808 8548 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BOVC = 809 8549 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BOVC_MMR6 = 810 8550 Feature_HasDSP | Feature_NotInMicroMips | 0, // BPOSGE32 = 811 8551 Feature_InMicroMips | Feature_HasDSPR3 | 0, // BPOSGE32C_MMR3 = 812 8552 Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasDSP | 0, // BPOSGE32_MM = 813 8553 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BREAK = 814 8554 Feature_InMicroMips | Feature_NotMips32r6 | 0, // BREAK16_MM = 815 8555 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BREAK16_MMR6 = 816 8556 Feature_InMicroMips | 0, // BREAK_MM = 817 8557 Feature_InMicroMips | Feature_HasMips32r6 | 0, // BREAK_MMR6 = 818 8558 Feature_HasStdEnc | Feature_HasMSA | 0, // BSELI_B = 819 8559 Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_V = 820 8560 Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_B = 821 8561 Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_D = 822 8562 Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_H = 823 8563 Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_W = 824 8564 Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_B = 825 8565 Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_D = 826 8566 Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_H = 827 8567 Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_W = 828 8568 Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_B = 829 8569 Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_D = 830 8570 Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_H = 831 8571 Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_V = 832 8572 Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_W = 833 8573 Feature_InMips16Mode | 0, // BeqzRxImm16 = 834 8574 Feature_InMips16Mode | 0, // BeqzRxImmX16 = 835 8575 Feature_InMips16Mode | 0, // Bimm16 = 836 8576 Feature_InMips16Mode | 0, // BimmX16 = 837 8577 Feature_InMips16Mode | 0, // BnezRxImm16 = 838 8578 Feature_InMips16Mode | 0, // BnezRxImmX16 = 839 8579 Feature_InMips16Mode | 0, // Break16 = 840 8580 Feature_InMips16Mode | 0, // Bteqz16 = 841 8581 Feature_InMips16Mode | 0, // BteqzX16 = 842 8582 Feature_InMips16Mode | 0, // Btnez16 = 843 8583 Feature_InMips16Mode | 0, // BtnezX16 = 844 8584 Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // CACHE = 845 8585 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // CACHEE = 846 8586 Feature_InMicroMips | Feature_HasEVA | 0, // CACHEE_MM = 847 8587 Feature_InMicroMips | Feature_NotMips32r6 | 0, // CACHE_MM = 848 8588 Feature_InMicroMips | Feature_HasMips32r6 | 0, // CACHE_MMR6 = 849 8589 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // CACHE_R6 = 850 8590 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_L_D64 = 851 8591 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_L_D_MMR6 = 852 8592 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_L_S = 853 8593 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_L_S_MMR6 = 854 8594 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_D32 = 855 8595 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_D64 = 856 8596 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_W_D_MMR6 = 857 8597 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CEIL_W_MM = 858 8598 Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_S = 859 8599 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CEIL_W_S_MM = 860 8600 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_W_S_MMR6 = 861 8601 Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_B = 862 8602 Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_D = 863 8603 Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_H = 864 8604 Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_W = 865 8605 Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_B = 866 8606 Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_D = 867 8607 Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_H = 868 8608 Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_W = 869 8609 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CFC1 = 870 8610 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CFC1_MM = 871 8611 Feature_InMicroMips | 0, // CFC2_MM = 872 8612 Feature_HasStdEnc | Feature_HasMSA | 0, // CFCMSA = 873 8613 Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS = 874 8614 Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS32 = 875 8615 Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS64_32 = 876 8616 Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS_i32 = 877 8617 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CLASS_D = 878 8618 Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLASS_D_MMR6 = 879 8619 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CLASS_S = 880 8620 Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLASS_S_MMR6 = 881 8621 Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_B = 882 8622 Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_D = 883 8623 Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_H = 884 8624 Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_W = 885 8625 Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_B = 886 8626 Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_D = 887 8627 Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_H = 888 8628 Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_W = 889 8629 Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_B = 890 8630 Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_D = 891 8631 Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_H = 892 8632 Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_W = 893 8633 Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_B = 894 8634 Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_D = 895 8635 Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_H = 896 8636 Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_W = 897 8637 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // CLO = 898 8638 Feature_InMicroMips | 0, // CLO_MM = 899 8639 Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLO_MMR6 = 900 8640 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // CLO_R6 = 901 8641 Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_B = 902 8642 Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_D = 903 8643 Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_H = 904 8644 Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_W = 905 8645 Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_B = 906 8646 Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_D = 907 8647 Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_H = 908 8648 Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_W = 909 8649 Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_B = 910 8650 Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_D = 911 8651 Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_H = 912 8652 Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_W = 913 8653 Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_B = 914 8654 Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_D = 915 8655 Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_H = 916 8656 Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_W = 917 8657 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // CLZ = 918 8658 Feature_InMicroMips | 0, // CLZ_MM = 919 8659 Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLZ_MMR6 = 920 8660 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // CLZ_R6 = 921 8661 Feature_HasDSPR2 | 0, // CMPGDU_EQ_QB = 922 8662 Feature_InMicroMips | Feature_HasDSPR2 | 0, // CMPGDU_EQ_QB_MMR2 = 923 8663 Feature_HasDSPR2 | 0, // CMPGDU_LE_QB = 924 8664 Feature_InMicroMips | Feature_HasDSPR2 | 0, // CMPGDU_LE_QB_MMR2 = 925 8665 Feature_HasDSPR2 | 0, // CMPGDU_LT_QB = 926 8666 Feature_InMicroMips | Feature_HasDSPR2 | 0, // CMPGDU_LT_QB_MMR2 = 927 8667 Feature_HasDSP | 0, // CMPGU_EQ_QB = 928 8668 Feature_InMicroMips | Feature_HasDSP | 0, // CMPGU_EQ_QB_MM = 929 8669 Feature_HasDSP | 0, // CMPGU_LE_QB = 930 8670 Feature_InMicroMips | Feature_HasDSP | 0, // CMPGU_LE_QB_MM = 931 8671 Feature_HasDSP | 0, // CMPGU_LT_QB = 932 8672 Feature_InMicroMips | Feature_HasDSP | 0, // CMPGU_LT_QB_MM = 933 8673 Feature_HasDSP | 0, // CMPU_EQ_QB = 934 8674 Feature_InMicroMips | Feature_HasDSP | 0, // CMPU_EQ_QB_MM = 935 8675 Feature_HasDSP | 0, // CMPU_LE_QB = 936 8676 Feature_InMicroMips | Feature_HasDSP | 0, // CMPU_LE_QB_MM = 937 8677 Feature_HasDSP | 0, // CMPU_LT_QB = 938 8678 Feature_InMicroMips | Feature_HasDSP | 0, // CMPU_LT_QB_MM = 939 8679 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_AF_D_MMR6 = 940 8680 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_AF_S_MMR6 = 941 8681 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_EQ_D = 942 8682 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_EQ_D_MMR6 = 943 8683 Feature_HasDSP | 0, // CMP_EQ_PH = 944 8684 Feature_InMicroMips | Feature_HasDSP | 0, // CMP_EQ_PH_MM = 945 8685 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_EQ_S = 946 8686 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_EQ_S_MMR6 = 947 8687 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_F_D = 948 8688 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_F_S = 949 8689 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LE_D = 950 8690 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LE_D_MMR6 = 951 8691 Feature_HasDSP | 0, // CMP_LE_PH = 952 8692 Feature_InMicroMips | Feature_HasDSP | 0, // CMP_LE_PH_MM = 953 8693 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LE_S = 954 8694 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LE_S_MMR6 = 955 8695 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LT_D = 956 8696 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LT_D_MMR6 = 957 8697 Feature_HasDSP | 0, // CMP_LT_PH = 958 8698 Feature_InMicroMips | Feature_HasDSP | 0, // CMP_LT_PH_MM = 959 8699 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LT_S = 960 8700 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LT_S_MMR6 = 961 8701 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SAF_D = 962 8702 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SAF_D_MMR6 = 963 8703 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SAF_S = 964 8704 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SAF_S_MMR6 = 965 8705 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SEQ_D = 966 8706 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SEQ_D_MMR6 = 967 8707 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SEQ_S = 968 8708 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SEQ_S_MMR6 = 969 8709 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLE_D = 970 8710 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLE_D_MMR6 = 971 8711 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLE_S = 972 8712 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLE_S_MMR6 = 973 8713 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLT_D = 974 8714 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLT_D_MMR6 = 975 8715 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLT_S = 976 8716 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLT_S_MMR6 = 977 8717 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUEQ_D = 978 8718 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUEQ_D_MMR6 = 979 8719 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUEQ_S = 980 8720 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUEQ_S_MMR6 = 981 8721 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULE_D = 982 8722 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULE_D_MMR6 = 983 8723 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULE_S = 984 8724 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULE_S_MMR6 = 985 8725 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULT_D = 986 8726 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULT_D_MMR6 = 987 8727 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULT_S = 988 8728 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULT_S_MMR6 = 989 8729 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUN_D = 990 8730 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUN_D_MMR6 = 991 8731 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUN_S = 992 8732 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUN_S_MMR6 = 993 8733 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UEQ_D = 994 8734 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UEQ_D_MMR6 = 995 8735 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UEQ_S = 996 8736 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UEQ_S_MMR6 = 997 8737 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULE_D = 998 8738 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULE_D_MMR6 = 999 8739 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULE_S = 1000 8740 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULE_S_MMR6 = 1001 8741 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULT_D = 1002 8742 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULT_D_MMR6 = 1003 8743 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULT_S = 1004 8744 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULT_S_MMR6 = 1005 8745 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UN_D = 1006 8746 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UN_D_MMR6 = 1007 8747 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UN_S = 1008 8748 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UN_S_MMR6 = 1009 8749 Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_S_B = 1010 8750 Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // COPY_S_D = 1011 8751 Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_S_H = 1012 8752 Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_S_W = 1013 8753 Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_U_B = 1014 8754 Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_U_H = 1015 8755 Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // COPY_U_W = 1016 8756 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32B = 1017 8757 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CB = 1018 8758 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CD = 1019 8759 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CH = 1020 8760 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CW = 1021 8761 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32D = 1022 8762 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32H = 1023 8763 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32W = 1024 8764 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CTC1 = 1025 8765 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CTC1_MM = 1026 8766 Feature_InMicroMips | 0, // CTC2_MM = 1027 8767 Feature_HasStdEnc | Feature_HasMSA | 0, // CTCMSA = 1028 8768 Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D32_S = 1029 8769 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D32_S_MM = 1030 8770 Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D32_W = 1031 8771 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D32_W_MM = 1032 8772 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D64_L = 1033 8773 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D64_S = 1034 8774 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D64_S_MM = 1035 8775 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D64_W = 1036 8776 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D64_W_MM = 1037 8777 Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_D_L_MMR6 = 1038 8778 Feature_HasStdEnc | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_L_D64 = 1039 8779 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_L_D64_MM = 1040 8780 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_L_D_MMR6 = 1041 8781 Feature_HasStdEnc | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_L_S = 1042 8782 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_L_S_MM = 1043 8783 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_L_S_MMR6 = 1044 8784 Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_D32 = 1045 8785 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_S_D32_MM = 1046 8786 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_D64 = 1047 8787 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_S_D64_MM = 1048 8788 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_L = 1049 8789 Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_S_L_MMR6 = 1050 8790 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_W = 1051 8791 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CVT_S_W_MM = 1052 8792 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_S_W_MMR6 = 1053 8793 Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_W_D32 = 1054 8794 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_W_D32_MM = 1055 8795 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_W_D64 = 1056 8796 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_W_D64_MM = 1057 8797 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_W_S = 1058 8798 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CVT_W_S_MM = 1059 8799 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_W_S_MMR6 = 1060 8800 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_EQ_D32 = 1061 8801 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_EQ_D32_MM = 1062 8802 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_EQ_D64 = 1063 8803 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_EQ_D64_MM = 1064 8804 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_EQ_S = 1065 8805 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_EQ_S_MM = 1066 8806 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_F_D32 = 1067 8807 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_F_D32_MM = 1068 8808 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_F_D64 = 1069 8809 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_F_D64_MM = 1070 8810 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_F_S = 1071 8811 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_F_S_MM = 1072 8812 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LE_D32 = 1073 8813 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LE_D32_MM = 1074 8814 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LE_D64 = 1075 8815 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LE_D64_MM = 1076 8816 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LE_S = 1077 8817 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LE_S_MM = 1078 8818 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LT_D32 = 1079 8819 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LT_D32_MM = 1080 8820 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LT_D64 = 1081 8821 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LT_D64_MM = 1082 8822 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LT_S = 1083 8823 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LT_S_MM = 1084 8824 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGE_D32 = 1085 8825 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGE_D32_MM = 1086 8826 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGE_D64 = 1087 8827 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGE_D64_MM = 1088 8828 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGE_S = 1089 8829 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGE_S_MM = 1090 8830 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGLE_D32 = 1091 8831 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGLE_D32_MM = 1092 8832 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGLE_D64 = 1093 8833 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGLE_D64_MM = 1094 8834 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGLE_S = 1095 8835 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGLE_S_MM = 1096 8836 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGL_D32 = 1097 8837 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGL_D32_MM = 1098 8838 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGL_D64 = 1099 8839 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGL_D64_MM = 1100 8840 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGL_S = 1101 8841 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGL_S_MM = 1102 8842 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGT_D32 = 1103 8843 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGT_D32_MM = 1104 8844 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGT_D64 = 1105 8845 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGT_D64_MM = 1106 8846 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGT_S = 1107 8847 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGT_S_MM = 1108 8848 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLE_D32 = 1109 8849 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLE_D32_MM = 1110 8850 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLE_D64 = 1111 8851 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLE_D64_MM = 1112 8852 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLE_S = 1113 8853 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLE_S_MM = 1114 8854 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLT_D32 = 1115 8855 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLT_D32_MM = 1116 8856 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLT_D64 = 1117 8857 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLT_D64_MM = 1118 8858 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLT_S = 1119 8859 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLT_S_MM = 1120 8860 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SEQ_D32 = 1121 8861 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SEQ_D32_MM = 1122 8862 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SEQ_D64 = 1123 8863 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SEQ_D64_MM = 1124 8864 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SEQ_S = 1125 8865 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SEQ_S_MM = 1126 8866 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SF_D32 = 1127 8867 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SF_D32_MM = 1128 8868 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SF_D64 = 1129 8869 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SF_D64_MM = 1130 8870 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SF_S = 1131 8871 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SF_S_MM = 1132 8872 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UEQ_D32 = 1133 8873 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UEQ_D32_MM = 1134 8874 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UEQ_D64 = 1135 8875 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UEQ_D64_MM = 1136 8876 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UEQ_S = 1137 8877 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UEQ_S_MM = 1138 8878 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULE_D32 = 1139 8879 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULE_D32_MM = 1140 8880 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULE_D64 = 1141 8881 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULE_D64_MM = 1142 8882 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULE_S = 1143 8883 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULE_S_MM = 1144 8884 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULT_D32 = 1145 8885 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULT_D32_MM = 1146 8886 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULT_D64 = 1147 8887 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULT_D64_MM = 1148 8888 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULT_S = 1149 8889 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULT_S_MM = 1150 8890 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UN_D32 = 1151 8891 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UN_D32_MM = 1152 8892 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UN_D64 = 1153 8893 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UN_D64_MM = 1154 8894 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UN_S = 1155 8895 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UN_S_MM = 1156 8896 Feature_InMips16Mode | 0, // CmpRxRy16 = 1157 8897 Feature_InMips16Mode | 0, // CmpiRxImm16 = 1158 8898 Feature_InMips16Mode | 0, // CmpiRxImmX16 = 1159 8899 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DADD = 1160 8900 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DADDi = 1161 8901 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DADDiu = 1162 8902 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DADDu = 1163 8903 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DAHI = 1164 8904 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DALIGN = 1165 8905 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DATI = 1166 8906 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DAUI = 1167 8907 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DBITSWAP = 1168 8908 Feature_HasStdEnc | Feature_HasMips64 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DCLO = 1169 8909 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DCLO_R6 = 1170 8910 Feature_HasStdEnc | Feature_HasMips64 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DCLZ = 1171 8911 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DCLZ_R6 = 1172 8912 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DDIV = 1173 8913 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DDIVU = 1174 8914 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotInMicroMips | 0, // DERET = 1175 8915 Feature_InMicroMips | 0, // DERET_MM = 1176 8916 Feature_InMicroMips | Feature_HasMips32r6 | 0, // DERET_MMR6 = 1177 8917 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXT = 1178 8918 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXT64_32 = 1179 8919 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXTM = 1180 8920 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXTU = 1181 8921 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // DI = 1182 8922 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DINS = 1183 8923 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DINSM = 1184 8924 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DINSU = 1185 8925 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // DIV = 1186 8926 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // DIVU = 1187 8927 Feature_InMicroMips | Feature_HasMips32r6 | 0, // DIVU_MMR6 = 1188 8928 Feature_InMicroMips | Feature_HasMips32r6 | 0, // DIV_MMR6 = 1189 8929 Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_B = 1190 8930 Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_D = 1191 8931 Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_H = 1192 8932 Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_W = 1193 8933 Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_B = 1194 8934 Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_D = 1195 8935 Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_H = 1196 8936 Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_W = 1197 8937 Feature_InMicroMips | 0, // DI_MM = 1198 8938 Feature_InMicroMips | Feature_HasMips32r6 | 0, // DI_MMR6 = 1199 8939 Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // DLSA = 1200 8940 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DLSA_R6 = 1201 8941 Feature_HasMips64 | 0, // DMFC0 = 1202 8942 Feature_HasStdEnc | Feature_HasMips3 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // DMFC1 = 1203 8943 Feature_HasMips64 | 0, // DMFC2 = 1204 8944 Feature_HasCnMips | 0, // DMFC2_OCTEON = 1205 8945 Feature_HasStdEnc | Feature_HasMips64r5 | Feature_HasVirt | 0, // DMFGC0 = 1206 8946 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMOD = 1207 8947 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMODU = 1208 8948 Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // DMT = 1209 8949 Feature_HasMips64 | 0, // DMTC0 = 1210 8950 Feature_HasStdEnc | Feature_HasMips3 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // DMTC1 = 1211 8951 Feature_HasMips64 | 0, // DMTC2 = 1212 8952 Feature_HasCnMips | 0, // DMTC2_OCTEON = 1213 8953 Feature_HasStdEnc | Feature_HasMips64r5 | Feature_HasVirt | 0, // DMTGC0 = 1214 8954 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMUH = 1215 8955 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMUHU = 1216 8956 Feature_HasCnMips | 0, // DMUL = 1217 8957 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DMULT = 1218 8958 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DMULTu = 1219 8959 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMULU = 1220 8960 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMUL_R6 = 1221 8961 Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_S_D = 1222 8962 Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_S_H = 1223 8963 Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_S_W = 1224 8964 Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_U_D = 1225 8965 Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_U_H = 1226 8966 Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_U_W = 1227 8967 Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_S_D = 1228 8968 Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_S_H = 1229 8969 Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_S_W = 1230 8970 Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_U_D = 1231 8971 Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_U_H = 1232 8972 Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_U_W = 1233 8973 Feature_HasDSPR2 | 0, // DPAQX_SA_W_PH = 1234 8974 Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPAQX_SA_W_PH_MMR2 = 1235 8975 Feature_HasDSPR2 | 0, // DPAQX_S_W_PH = 1236 8976 Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPAQX_S_W_PH_MMR2 = 1237 8977 Feature_HasDSP | 0, // DPAQ_SA_L_W = 1238 8978 Feature_InMicroMips | Feature_HasDSP | 0, // DPAQ_SA_L_W_MM = 1239 8979 Feature_HasDSP | 0, // DPAQ_S_W_PH = 1240 8980 Feature_InMicroMips | Feature_HasDSP | 0, // DPAQ_S_W_PH_MM = 1241 8981 Feature_HasDSP | 0, // DPAU_H_QBL = 1242 8982 Feature_InMicroMips | Feature_HasDSP | 0, // DPAU_H_QBL_MM = 1243 8983 Feature_HasDSP | 0, // DPAU_H_QBR = 1244 8984 Feature_InMicroMips | Feature_HasDSP | 0, // DPAU_H_QBR_MM = 1245 8985 Feature_HasDSPR2 | 0, // DPAX_W_PH = 1246 8986 Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPAX_W_PH_MMR2 = 1247 8987 Feature_HasDSPR2 | 0, // DPA_W_PH = 1248 8988 Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPA_W_PH_MMR2 = 1249 8989 Feature_HasCnMips | 0, // DPOP = 1250 8990 Feature_HasDSPR2 | 0, // DPSQX_SA_W_PH = 1251 8991 Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPSQX_SA_W_PH_MMR2 = 1252 8992 Feature_HasDSPR2 | 0, // DPSQX_S_W_PH = 1253 8993 Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPSQX_S_W_PH_MMR2 = 1254 8994 Feature_HasDSP | 0, // DPSQ_SA_L_W = 1255 8995 Feature_InMicroMips | Feature_HasDSP | 0, // DPSQ_SA_L_W_MM = 1256 8996 Feature_HasDSP | 0, // DPSQ_S_W_PH = 1257 8997 Feature_InMicroMips | Feature_HasDSP | 0, // DPSQ_S_W_PH_MM = 1258 8998 Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_S_D = 1259 8999 Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_S_H = 1260 9000 Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_S_W = 1261 9001 Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_U_D = 1262 9002 Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_U_H = 1263 9003 Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_U_W = 1264 9004 Feature_HasDSP | 0, // DPSU_H_QBL = 1265 9005 Feature_InMicroMips | Feature_HasDSP | 0, // DPSU_H_QBL_MM = 1266 9006 Feature_HasDSP | 0, // DPSU_H_QBR = 1267 9007 Feature_InMicroMips | Feature_HasDSP | 0, // DPSU_H_QBR_MM = 1268 9008 Feature_HasDSPR2 | 0, // DPSX_W_PH = 1269 9009 Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPSX_W_PH_MMR2 = 1270 9010 Feature_HasDSPR2 | 0, // DPS_W_PH = 1271 9011 Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPS_W_PH_MMR2 = 1272 9012 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DROTR = 1273 9013 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DROTR32 = 1274 9014 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DROTRV = 1275 9015 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DSBH = 1276 9016 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSDIV = 1277 9017 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DSHD = 1278 9018 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSLL = 1279 9019 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSLL32 = 1280 9020 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // DSLL64_32 = 1281 9021 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSLLV = 1282 9022 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRA = 1283 9023 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRA32 = 1284 9024 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRAV = 1285 9025 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRL = 1286 9026 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRL32 = 1287 9027 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRLV = 1288 9028 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSUB = 1289 9029 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSUBu = 1290 9030 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DUDIV = 1291 9031 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // DVP = 1292 9032 Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // DVPE = 1293 9033 Feature_InMicroMips | Feature_HasMips32r6 | 0, // DVP_MMR6 = 1294 9034 Feature_InMips16Mode | 0, // DivRxRy16 = 1295 9035 Feature_InMips16Mode | 0, // DivuRxRy16 = 1296 9036 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // EHB = 1297 9037 Feature_InMicroMips | 0, // EHB_MM = 1298 9038 Feature_InMicroMips | Feature_HasMips32r6 | 0, // EHB_MMR6 = 1299 9039 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // EI = 1300 9040 Feature_InMicroMips | 0, // EI_MM = 1301 9041 Feature_InMicroMips | Feature_HasMips32r6 | 0, // EI_MMR6 = 1302 9042 Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // EMT = 1303 9043 Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotInMicroMips | 0, // ERET = 1304 9044 Feature_HasStdEnc | Feature_HasMips32r5 | Feature_NotInMicroMips | 0, // ERETNC = 1305 9045 Feature_InMicroMips | Feature_HasMips32r6 | 0, // ERETNC_MMR6 = 1306 9046 Feature_InMicroMips | 0, // ERET_MM = 1307 9047 Feature_InMicroMips | Feature_HasMips32r6 | 0, // ERET_MMR6 = 1308 9048 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // EVP = 1309 9049 Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // EVPE = 1310 9050 Feature_InMicroMips | Feature_HasMips32r6 | 0, // EVP_MMR6 = 1311 9051 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // EXT = 1312 9052 Feature_HasDSP | 0, // EXTP = 1313 9053 Feature_HasDSP | 0, // EXTPDP = 1314 9054 Feature_HasDSP | 0, // EXTPDPV = 1315 9055 Feature_InMicroMips | Feature_HasDSP | 0, // EXTPDPV_MM = 1316 9056 Feature_InMicroMips | Feature_HasDSP | 0, // EXTPDP_MM = 1317 9057 Feature_HasDSP | 0, // EXTPV = 1318 9058 Feature_InMicroMips | Feature_HasDSP | 0, // EXTPV_MM = 1319 9059 Feature_InMicroMips | Feature_HasDSP | 0, // EXTP_MM = 1320 9060 Feature_HasDSP | 0, // EXTRV_RS_W = 1321 9061 Feature_InMicroMips | Feature_HasDSP | 0, // EXTRV_RS_W_MM = 1322 9062 Feature_HasDSP | 0, // EXTRV_R_W = 1323 9063 Feature_InMicroMips | Feature_HasDSP | 0, // EXTRV_R_W_MM = 1324 9064 Feature_HasDSP | 0, // EXTRV_S_H = 1325 9065 Feature_InMicroMips | Feature_HasDSP | 0, // EXTRV_S_H_MM = 1326 9066 Feature_HasDSP | 0, // EXTRV_W = 1327 9067 Feature_InMicroMips | Feature_HasDSP | 0, // EXTRV_W_MM = 1328 9068 Feature_HasDSP | 0, // EXTR_RS_W = 1329 9069 Feature_InMicroMips | Feature_HasDSP | 0, // EXTR_RS_W_MM = 1330 9070 Feature_HasDSP | 0, // EXTR_R_W = 1331 9071 Feature_InMicroMips | Feature_HasDSP | 0, // EXTR_R_W_MM = 1332 9072 Feature_HasDSP | 0, // EXTR_S_H = 1333 9073 Feature_InMicroMips | Feature_HasDSP | 0, // EXTR_S_H_MM = 1334 9074 Feature_HasDSP | 0, // EXTR_W = 1335 9075 Feature_InMicroMips | Feature_HasDSP | 0, // EXTR_W_MM = 1336 9076 Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // EXTS = 1337 9077 Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // EXTS32 = 1338 9078 Feature_InMicroMips | Feature_NotMips32r6 | 0, // EXT_MM = 1339 9079 Feature_InMicroMips | Feature_HasMips32r6 | 0, // EXT_MMR6 = 1340 9080 Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FABS_D32 = 1341 9081 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FABS_D32_MM = 1342 9082 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FABS_D64 = 1343 9083 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FABS_D64_MM = 1344 9084 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FABS_S = 1345 9085 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FABS_S_MM = 1346 9086 Feature_HasStdEnc | Feature_HasMSA | 0, // FADD_D = 1347 9087 Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_D32 = 1348 9088 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FADD_D32_MM = 1349 9089 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_D64 = 1350 9090 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FADD_D64_MM = 1351 9091 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_S = 1352 9092 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FADD_S_MM = 1353 9093 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FADD_S_MMR6 = 1354 9094 Feature_HasStdEnc | Feature_HasMSA | 0, // FADD_W = 1355 9095 Feature_HasStdEnc | Feature_HasMSA | 0, // FCAF_D = 1356 9096 Feature_HasStdEnc | Feature_HasMSA | 0, // FCAF_W = 1357 9097 Feature_HasStdEnc | Feature_HasMSA | 0, // FCEQ_D = 1358 9098 Feature_HasStdEnc | Feature_HasMSA | 0, // FCEQ_W = 1359 9099 Feature_HasStdEnc | Feature_HasMSA | 0, // FCLASS_D = 1360 9100 Feature_HasStdEnc | Feature_HasMSA | 0, // FCLASS_W = 1361 9101 Feature_HasStdEnc | Feature_HasMSA | 0, // FCLE_D = 1362 9102 Feature_HasStdEnc | Feature_HasMSA | 0, // FCLE_W = 1363 9103 Feature_HasStdEnc | Feature_HasMSA | 0, // FCLT_D = 1364 9104 Feature_HasStdEnc | Feature_HasMSA | 0, // FCLT_W = 1365 9105 Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FCMP_D32 = 1366 9106 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // FCMP_D32_MM = 1367 9107 Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // FCMP_D64 = 1368 9108 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FCMP_S32 = 1369 9109 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // FCMP_S32_MM = 1370 9110 Feature_HasStdEnc | Feature_HasMSA | 0, // FCNE_D = 1371 9111 Feature_HasStdEnc | Feature_HasMSA | 0, // FCNE_W = 1372 9112 Feature_HasStdEnc | Feature_HasMSA | 0, // FCOR_D = 1373 9113 Feature_HasStdEnc | Feature_HasMSA | 0, // FCOR_W = 1374 9114 Feature_HasStdEnc | Feature_HasMSA | 0, // FCUEQ_D = 1375 9115 Feature_HasStdEnc | Feature_HasMSA | 0, // FCUEQ_W = 1376 9116 Feature_HasStdEnc | Feature_HasMSA | 0, // FCULE_D = 1377 9117 Feature_HasStdEnc | Feature_HasMSA | 0, // FCULE_W = 1378 9118 Feature_HasStdEnc | Feature_HasMSA | 0, // FCULT_D = 1379 9119 Feature_HasStdEnc | Feature_HasMSA | 0, // FCULT_W = 1380 9120 Feature_HasStdEnc | Feature_HasMSA | 0, // FCUNE_D = 1381 9121 Feature_HasStdEnc | Feature_HasMSA | 0, // FCUNE_W = 1382 9122 Feature_HasStdEnc | Feature_HasMSA | 0, // FCUN_D = 1383 9123 Feature_HasStdEnc | Feature_HasMSA | 0, // FCUN_W = 1384 9124 Feature_HasStdEnc | Feature_HasMSA | 0, // FDIV_D = 1385 9125 Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FDIV_D32 = 1386 9126 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FDIV_D32_MM = 1387 9127 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FDIV_D64 = 1388 9128 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FDIV_D64_MM = 1389 9129 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FDIV_S = 1390 9130 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FDIV_S_MM = 1391 9131 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FDIV_S_MMR6 = 1392 9132 Feature_HasStdEnc | Feature_HasMSA | 0, // FDIV_W = 1393 9133 Feature_HasStdEnc | Feature_HasMSA | 0, // FEXDO_H = 1394 9134 Feature_HasStdEnc | Feature_HasMSA | 0, // FEXDO_W = 1395 9135 Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_D = 1396 9136 Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_W = 1397 9137 Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPL_D = 1398 9138 Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPL_W = 1399 9139 Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPR_D = 1400 9140 Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPR_W = 1401 9141 Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_S_D = 1402 9142 Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_S_W = 1403 9143 Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_U_D = 1404 9144 Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_U_W = 1405 9145 Feature_HasStdEnc | Feature_HasMSA | 0, // FFQL_D = 1406 9146 Feature_HasStdEnc | Feature_HasMSA | 0, // FFQL_W = 1407 9147 Feature_HasStdEnc | Feature_HasMSA | 0, // FFQR_D = 1408 9148 Feature_HasStdEnc | Feature_HasMSA | 0, // FFQR_W = 1409 9149 Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_B = 1410 9150 Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // FILL_D = 1411 9151 Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_H = 1412 9152 Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_W = 1413 9153 Feature_HasStdEnc | Feature_HasMSA | 0, // FLOG2_D = 1414 9154 Feature_HasStdEnc | Feature_HasMSA | 0, // FLOG2_W = 1415 9155 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_L_D64 = 1416 9156 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_L_D_MMR6 = 1417 9157 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_L_S = 1418 9158 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_L_S_MMR6 = 1419 9159 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_D32 = 1420 9160 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_D64 = 1421 9161 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_W_D_MMR6 = 1422 9162 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FLOOR_W_MM = 1423 9163 Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_S = 1424 9164 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FLOOR_W_S_MM = 1425 9165 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_W_S_MMR6 = 1426 9166 Feature_HasStdEnc | Feature_HasMSA | 0, // FMADD_D = 1427 9167 Feature_HasStdEnc | Feature_HasMSA | 0, // FMADD_W = 1428 9168 Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_A_D = 1429 9169 Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_A_W = 1430 9170 Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_D = 1431 9171 Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_W = 1432 9172 Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_A_D = 1433 9173 Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_A_W = 1434 9174 Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_D = 1435 9175 Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_W = 1436 9176 Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMOV_D32 = 1437 9177 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FMOV_D32_MM = 1438 9178 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMOV_D64 = 1439 9179 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FMOV_D64_MM = 1440 9180 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMOV_S = 1441 9181 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FMOV_S_MM = 1442 9182 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FMOV_S_MMR6 = 1443 9183 Feature_HasStdEnc | Feature_HasMSA | 0, // FMSUB_D = 1444 9184 Feature_HasStdEnc | Feature_HasMSA | 0, // FMSUB_W = 1445 9185 Feature_HasStdEnc | Feature_HasMSA | 0, // FMUL_D = 1446 9186 Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMUL_D32 = 1447 9187 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FMUL_D32_MM = 1448 9188 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMUL_D64 = 1449 9189 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FMUL_D64_MM = 1450 9190 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMUL_S = 1451 9191 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FMUL_S_MM = 1452 9192 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FMUL_S_MMR6 = 1453 9193 Feature_HasStdEnc | Feature_HasMSA | 0, // FMUL_W = 1454 9194 Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FNEG_D32 = 1455 9195 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FNEG_D32_MM = 1456 9196 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FNEG_D64 = 1457 9197 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FNEG_D64_MM = 1458 9198 Feature_HasStdEnc | Feature_IsNotSoftFloat | 0, // FNEG_S = 1459 9199 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FNEG_S_MM = 1460 9200 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FNEG_S_MMR6 = 1461 9201 Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // FORK = 1462 9202 Feature_HasStdEnc | Feature_HasMSA | 0, // FRCP_D = 1463 9203 Feature_HasStdEnc | Feature_HasMSA | 0, // FRCP_W = 1464 9204 Feature_HasStdEnc | Feature_HasMSA | 0, // FRINT_D = 1465 9205 Feature_HasStdEnc | Feature_HasMSA | 0, // FRINT_W = 1466 9206 Feature_HasStdEnc | Feature_HasMSA | 0, // FRSQRT_D = 1467 9207 Feature_HasStdEnc | Feature_HasMSA | 0, // FRSQRT_W = 1468 9208 Feature_HasStdEnc | Feature_HasMSA | 0, // FSAF_D = 1469 9209 Feature_HasStdEnc | Feature_HasMSA | 0, // FSAF_W = 1470 9210 Feature_HasStdEnc | Feature_HasMSA | 0, // FSEQ_D = 1471 9211 Feature_HasStdEnc | Feature_HasMSA | 0, // FSEQ_W = 1472 9212 Feature_HasStdEnc | Feature_HasMSA | 0, // FSLE_D = 1473 9213 Feature_HasStdEnc | Feature_HasMSA | 0, // FSLE_W = 1474 9214 Feature_HasStdEnc | Feature_HasMSA | 0, // FSLT_D = 1475 9215 Feature_HasStdEnc | Feature_HasMSA | 0, // FSLT_W = 1476 9216 Feature_HasStdEnc | Feature_HasMSA | 0, // FSNE_D = 1477 9217 Feature_HasStdEnc | Feature_HasMSA | 0, // FSNE_W = 1478 9218 Feature_HasStdEnc | Feature_HasMSA | 0, // FSOR_D = 1479 9219 Feature_HasStdEnc | Feature_HasMSA | 0, // FSOR_W = 1480 9220 Feature_HasStdEnc | Feature_HasMSA | 0, // FSQRT_D = 1481 9221 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSQRT_D32 = 1482 9222 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FSQRT_D32_MM = 1483 9223 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSQRT_D64 = 1484 9224 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FSQRT_D64_MM = 1485 9225 Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSQRT_S = 1486 9226 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FSQRT_S_MM = 1487 9227 Feature_HasStdEnc | Feature_HasMSA | 0, // FSQRT_W = 1488 9228 Feature_HasStdEnc | Feature_HasMSA | 0, // FSUB_D = 1489 9229 Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSUB_D32 = 1490 9230 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FSUB_D32_MM = 1491 9231 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSUB_D64 = 1492 9232 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FSUB_D64_MM = 1493 9233 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSUB_S = 1494 9234 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FSUB_S_MM = 1495 9235 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FSUB_S_MMR6 = 1496 9236 Feature_HasStdEnc | Feature_HasMSA | 0, // FSUB_W = 1497 9237 Feature_HasStdEnc | Feature_HasMSA | 0, // FSUEQ_D = 1498 9238 Feature_HasStdEnc | Feature_HasMSA | 0, // FSUEQ_W = 1499 9239 Feature_HasStdEnc | Feature_HasMSA | 0, // FSULE_D = 1500 9240 Feature_HasStdEnc | Feature_HasMSA | 0, // FSULE_W = 1501 9241 Feature_HasStdEnc | Feature_HasMSA | 0, // FSULT_D = 1502 9242 Feature_HasStdEnc | Feature_HasMSA | 0, // FSULT_W = 1503 9243 Feature_HasStdEnc | Feature_HasMSA | 0, // FSUNE_D = 1504 9244 Feature_HasStdEnc | Feature_HasMSA | 0, // FSUNE_W = 1505 9245 Feature_HasStdEnc | Feature_HasMSA | 0, // FSUN_D = 1506 9246 Feature_HasStdEnc | Feature_HasMSA | 0, // FSUN_W = 1507 9247 Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_S_D = 1508 9248 Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_S_W = 1509 9249 Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_U_D = 1510 9250 Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_U_W = 1511 9251 Feature_HasStdEnc | Feature_HasMSA | 0, // FTQ_H = 1512 9252 Feature_HasStdEnc | Feature_HasMSA | 0, // FTQ_W = 1513 9253 Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_S_D = 1514 9254 Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_S_W = 1515 9255 Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_U_D = 1516 9256 Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_U_W = 1517 9257 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasGINV | Feature_NotInMicroMips | 0, // GINVI = 1518 9258 Feature_InMicroMips | Feature_HasMips32r6 | Feature_HasGINV | 0, // GINVI_MMR6 = 1519 9259 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasGINV | Feature_NotInMicroMips | 0, // GINVT = 1520 9260 Feature_InMicroMips | Feature_HasMips32r6 | Feature_HasGINV | 0, // GINVT_MMR6 = 1521 9261 Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_S_D = 1522 9262 Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_S_H = 1523 9263 Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_S_W = 1524 9264 Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_U_D = 1525 9265 Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_U_H = 1526 9266 Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_U_W = 1527 9267 Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_S_D = 1528 9268 Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_S_H = 1529 9269 Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_S_W = 1530 9270 Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_U_D = 1531 9271 Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_U_H = 1532 9272 Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_U_W = 1533 9273 Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // HYPCALL = 1534 9274 Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // HYPCALL_MM = 1535 9275 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_B = 1536 9276 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_D = 1537 9277 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_H = 1538 9278 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_W = 1539 9279 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_B = 1540 9280 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_D = 1541 9281 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_H = 1542 9282 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_W = 1543 9283 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_B = 1544 9284 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_D = 1545 9285 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_H = 1546 9286 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_W = 1547 9287 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_B = 1548 9288 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_D = 1549 9289 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_H = 1550 9290 Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_W = 1551 9291 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // INS = 1552 9292 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_B = 1553 9293 Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // INSERT_D = 1554 9294 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_H = 1555 9295 Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_W = 1556 9296 Feature_HasDSP | 0, // INSV = 1557 9297 Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_B = 1558 9298 Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_D = 1559 9299 Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_H = 1560 9300 Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_W = 1561 9301 Feature_InMicroMips | Feature_HasDSP | 0, // INSV_MM = 1562 9302 Feature_InMicroMips | Feature_NotMips32r6 | 0, // INS_MM = 1563 9303 Feature_InMicroMips | Feature_HasMips32r6 | 0, // INS_MMR6 = 1564 9304 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // J = 1565 9305 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // JAL = 1566 9306 Feature_HasStdEnc | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // JALR = 1567 9307 Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALR16_MM = 1568 9308 Feature_NotInMips16Mode | 0, // JALR64 = 1569 9309 Feature_InMicroMips | Feature_HasMips32r6 | 0, // JALRC16_MMR6 = 1570 9310 Feature_InMicroMips | Feature_HasMips32r6 | 0, // JALRC_HB_MMR6 = 1571 9311 Feature_InMicroMips | Feature_HasMips32r6 | 0, // JALRC_MMR6 = 1572 9312 Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALRS16_MM = 1573 9313 Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALRS_MM = 1574 9314 Feature_HasStdEnc | Feature_HasMips32 | 0, // JALR_HB = 1575 9315 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // JALR_HB64 = 1576 9316 Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALR_MM = 1577 9317 Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALS_MM = 1578 9318 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // JALX = 1579 9319 Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALX_MM = 1580 9320 Feature_InMicroMips | Feature_NotMips32r6 | 0, // JAL_MM = 1581 9321 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JIALC = 1582 9322 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // JIALC64 = 1583 9323 Feature_InMicroMips | Feature_HasMips32r6 | 0, // JIALC_MMR6 = 1584 9324 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JIC = 1585 9325 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // JIC64 = 1586 9326 Feature_InMicroMips | Feature_HasMips32r6 | 0, // JIC_MMR6 = 1587 9327 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // JR = 1588 9328 Feature_InMicroMips | Feature_NotMips32r6 | 0, // JR16_MM = 1589 9329 Feature_NotInMips16Mode | Feature_IsPTR64bit | Feature_NotInMicroMips | 0, // JR64 = 1590 9330 Feature_InMicroMips | Feature_NotMips32r6 | 0, // JRADDIUSP = 1591 9331 Feature_InMicroMips | Feature_NotMips32r6 | 0, // JRC16_MM = 1592 9332 Feature_InMicroMips | Feature_HasMips32r6 | 0, // JRC16_MMR6 = 1593 9333 Feature_InMicroMips | Feature_HasMips32r6 | 0, // JRCADDIUSP_MMR6 = 1594 9334 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // JR_HB = 1595 9335 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // JR_HB64 = 1596 9336 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JR_HB64_R6 = 1597 9337 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JR_HB_R6 = 1598 9338 Feature_InMicroMips | Feature_NotMips32r6 | 0, // JR_MM = 1599 9339 Feature_InMicroMips | Feature_NotMips32r6 | 0, // J_MM = 1600 9340 Feature_InMips16Mode | 0, // Jal16 = 1601 9341 Feature_InMips16Mode | 0, // JalB16 = 1602 9342 Feature_InMips16Mode | 0, // JrRa16 = 1603 9343 Feature_InMips16Mode | 0, // JrcRa16 = 1604 9344 Feature_InMips16Mode | 0, // JrcRx16 = 1605 9345 Feature_InMips16Mode | 0, // JumpLinkReg16 = 1606 9346 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LB = 1607 9347 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LB64 = 1608 9348 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LBE = 1609 9349 Feature_InMicroMips | Feature_HasEVA | 0, // LBE_MM = 1610 9350 Feature_InMicroMips | 0, // LBU16_MM = 1611 9351 Feature_HasDSP | 0, // LBUX = 1612 9352 Feature_InMicroMips | Feature_HasDSP | 0, // LBUX_MM = 1613 9353 Feature_InMicroMips | Feature_HasMips32r6 | 0, // LBU_MMR6 = 1614 9354 Feature_InMicroMips | 0, // LB_MM = 1615 9355 Feature_InMicroMips | Feature_HasMips32r6 | 0, // LB_MMR6 = 1616 9356 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LBu = 1617 9357 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LBu64 = 1618 9358 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LBuE = 1619 9359 Feature_InMicroMips | Feature_HasEVA | 0, // LBuE_MM = 1620 9360 Feature_InMicroMips | 0, // LBu_MM = 1621 9361 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // LD = 1622 9362 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LDC1 = 1623 9363 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LDC164 = 1624 9364 Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // LDC1_D64_MMR6 = 1625 9365 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // LDC1_MM = 1626 9366 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LDC2 = 1627 9367 Feature_InMicroMips | Feature_HasMips32r6 | 0, // LDC2_MMR6 = 1628 9368 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LDC2_R6 = 1629 9369 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // LDC3 = 1630 9370 Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_B = 1631 9371 Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_D = 1632 9372 Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_H = 1633 9373 Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_W = 1634 9374 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // LDL = 1635 9375 Feature_HasStdEnc | Feature_HasMips64r6 | 0, // LDPC = 1636 9376 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // LDR = 1637 9377 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LDXC1 = 1638 9378 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // LDXC164 = 1639 9379 Feature_HasStdEnc | Feature_HasMSA | 0, // LD_B = 1640 9380 Feature_HasStdEnc | Feature_HasMSA | 0, // LD_D = 1641 9381 Feature_HasStdEnc | Feature_HasMSA | 0, // LD_H = 1642 9382 Feature_HasStdEnc | Feature_HasMSA | 0, // LD_W = 1643 9383 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LEA_ADDiu = 1644 9384 Feature_NotInMips16Mode | Feature_IsGP64bit | Feature_NotInMicroMips | 0, // LEA_ADDiu64 = 1645 9385 Feature_InMicroMips | 0, // LEA_ADDiu_MM = 1646 9386 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LH = 1647 9387 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LH64 = 1648 9388 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LHE = 1649 9389 Feature_InMicroMips | Feature_HasEVA | 0, // LHE_MM = 1650 9390 Feature_InMicroMips | 0, // LHU16_MM = 1651 9391 Feature_HasDSP | 0, // LHX = 1652 9392 Feature_InMicroMips | Feature_HasDSP | 0, // LHX_MM = 1653 9393 Feature_InMicroMips | 0, // LH_MM = 1654 9394 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LHu = 1655 9395 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LHu64 = 1656 9396 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LHuE = 1657 9397 Feature_InMicroMips | Feature_HasEVA | 0, // LHuE_MM = 1658 9398 Feature_InMicroMips | 0, // LHu_MM = 1659 9399 Feature_InMicroMips | Feature_NotMips32r6 | 0, // LI16_MM = 1660 9400 Feature_InMicroMips | Feature_HasMips32r6 | 0, // LI16_MMR6 = 1661 9401 Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LL = 1662 9402 Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LL64 = 1663 9403 Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // LL64_R6 = 1664 9404 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LLD = 1665 9405 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // LLD_R6 = 1666 9406 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LLE = 1667 9407 Feature_InMicroMips | Feature_HasEVA | 0, // LLE_MM = 1668 9408 Feature_InMicroMips | Feature_NotMips32r6 | 0, // LL_MM = 1669 9409 Feature_InMicroMips | Feature_HasMips32r6 | 0, // LL_MMR6 = 1670 9410 Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LL_R6 = 1671 9411 Feature_HasStdEnc | Feature_HasMSA | 0, // LSA = 1672 9412 Feature_InMicroMips | Feature_HasMips32r6 | 0, // LSA_MMR6 = 1673 9413 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // LSA_R6 = 1674 9414 Feature_InMicroMips | Feature_HasMips32r6 | 0, // LUI_MMR6 = 1675 9415 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LUXC1 = 1676 9416 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LUXC164 = 1677 9417 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // LUXC1_MM = 1678 9418 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LUi = 1679 9419 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LUi64 = 1680 9420 Feature_InMicroMips | Feature_NotMips32r6 | 0, // LUi_MM = 1681 9421 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LW = 1682 9422 Feature_InMicroMips | 0, // LW16_MM = 1683 9423 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LW64 = 1684 9424 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LWC1 = 1685 9425 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // LWC1_MM = 1686 9426 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LWC2 = 1687 9427 Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWC2_MMR6 = 1688 9428 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LWC2_R6 = 1689 9429 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // LWC3 = 1690 9430 Feature_NotInMips16Mode | Feature_HasDSP | 0, // LWDSP = 1691 9431 Feature_InMicroMips | Feature_HasDSP | 0, // LWDSP_MM = 1692 9432 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LWE = 1693 9433 Feature_InMicroMips | Feature_HasEVA | 0, // LWE_MM = 1694 9434 Feature_InMicroMips | 0, // LWGP_MM = 1695 9435 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LWL = 1696 9436 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LWL64 = 1697 9437 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LWLE = 1698 9438 Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // LWLE_MM = 1699 9439 Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWL_MM = 1700 9440 Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWM16_MM = 1701 9441 Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWM16_MMR6 = 1702 9442 Feature_InMicroMips | 0, // LWM32_MM = 1703 9443 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // LWPC = 1704 9444 Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWPC_MMR6 = 1705 9445 Feature_InMicroMips | 0, // LWP_MM = 1706 9446 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LWR = 1707 9447 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LWR64 = 1708 9448 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LWRE = 1709 9449 Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // LWRE_MM = 1710 9450 Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWR_MM = 1711 9451 Feature_InMicroMips | 0, // LWSP_MM = 1712 9452 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LWUPC = 1713 9453 Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWU_MM = 1714 9454 Feature_HasDSP | 0, // LWX = 1715 9455 Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // LWXC1 = 1716 9456 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // LWXC1_MM = 1717 9457 Feature_InMicroMips | 0, // LWXS_MM = 1718 9458 Feature_InMicroMips | Feature_HasDSP | 0, // LWX_MM = 1719 9459 Feature_InMicroMips | 0, // LW_MM = 1720 9460 Feature_InMicroMips | Feature_HasMips32r6 | 0, // LW_MMR6 = 1721 9461 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // LWu = 1722 9462 Feature_InMips16Mode | 0, // LbRxRyOffMemX16 = 1723 9463 Feature_InMips16Mode | 0, // LbuRxRyOffMemX16 = 1724 9464 Feature_InMips16Mode | 0, // LhRxRyOffMemX16 = 1725 9465 Feature_InMips16Mode | 0, // LhuRxRyOffMemX16 = 1726 9466 Feature_InMips16Mode | 0, // LiRxImm16 = 1727 9467 Feature_InMips16Mode | 0, // LiRxImmAlignX16 = 1728 9468 Feature_InMips16Mode | 0, // LiRxImmX16 = 1729 9469 Feature_InMips16Mode | 0, // LwRxPcTcp16 = 1730 9470 Feature_InMips16Mode | 0, // LwRxPcTcpX16 = 1731 9471 Feature_InMips16Mode | 0, // LwRxRyOffMemX16 = 1732 9472 Feature_InMips16Mode | 0, // LwRxSpImmX16 = 1733 9473 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MADD = 1734 9474 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MADDF_D = 1735 9475 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MADDF_D_MMR6 = 1736 9476 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MADDF_S = 1737 9477 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MADDF_S_MMR6 = 1738 9478 Feature_HasStdEnc | Feature_HasMSA | 0, // MADDR_Q_H = 1739 9479 Feature_HasStdEnc | Feature_HasMSA | 0, // MADDR_Q_W = 1740 9480 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MADDU = 1741 9481 Feature_HasDSP | 0, // MADDU_DSP = 1742 9482 Feature_InMicroMips | Feature_HasDSP | 0, // MADDU_DSP_MM = 1743 9483 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MADDU_MM = 1744 9484 Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_B = 1745 9485 Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_D = 1746 9486 Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_H = 1747 9487 Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_W = 1748 9488 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MADD_D32 = 1749 9489 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MADD_D32_MM = 1750 9490 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MADD_D64 = 1751 9491 Feature_HasDSP | 0, // MADD_DSP = 1752 9492 Feature_InMicroMips | Feature_HasDSP | 0, // MADD_DSP_MM = 1753 9493 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MADD_MM = 1754 9494 Feature_HasStdEnc | Feature_HasMSA | 0, // MADD_Q_H = 1755 9495 Feature_HasStdEnc | Feature_HasMSA | 0, // MADD_Q_W = 1756 9496 Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MADD_S = 1757 9497 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MADD_S_MM = 1758 9498 Feature_HasDSP | 0, // MAQ_SA_W_PHL = 1759 9499 Feature_InMicroMips | Feature_HasDSP | 0, // MAQ_SA_W_PHL_MM = 1760 9500 Feature_HasDSP | 0, // MAQ_SA_W_PHR = 1761 9501 Feature_InMicroMips | Feature_HasDSP | 0, // MAQ_SA_W_PHR_MM = 1762 9502 Feature_HasDSP | 0, // MAQ_S_W_PHL = 1763 9503 Feature_InMicroMips | Feature_HasDSP | 0, // MAQ_S_W_PHL_MM = 1764 9504 Feature_HasDSP | 0, // MAQ_S_W_PHR = 1765 9505 Feature_InMicroMips | Feature_HasDSP | 0, // MAQ_S_W_PHR_MM = 1766 9506 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAXA_D = 1767 9507 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAXA_D_MMR6 = 1768 9508 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAXA_S = 1769 9509 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAXA_S_MMR6 = 1770 9510 Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_B = 1771 9511 Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_D = 1772 9512 Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_H = 1773 9513 Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_W = 1774 9514 Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_B = 1775 9515 Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_D = 1776 9516 Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_H = 1777 9517 Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_W = 1778 9518 Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_B = 1779 9519 Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_D = 1780 9520 Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_H = 1781 9521 Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_W = 1782 9522 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAX_D = 1783 9523 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAX_D_MMR6 = 1784 9524 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAX_S = 1785 9525 Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_B = 1786 9526 Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_D = 1787 9527 Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_H = 1788 9528 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAX_S_MMR6 = 1789 9529 Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_W = 1790 9530 Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_B = 1791 9531 Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_D = 1792 9532 Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_H = 1793 9533 Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_W = 1794 9534 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MFC0 = 1795 9535 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFC0_MMR6 = 1796 9536 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFC1 = 1797 9537 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFC1_D64 = 1798 9538 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // MFC1_MM = 1799 9539 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MFC1_MMR6 = 1800 9540 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MFC2 = 1801 9541 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFC2_MMR6 = 1802 9542 Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MFGC0 = 1803 9543 Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MFGC0_MM = 1804 9544 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFHC0_MMR6 = 1805 9545 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFHC1_D32 = 1806 9546 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // MFHC1_D32_MM = 1807 9547 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFHC1_D64 = 1808 9548 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // MFHC1_D64_MM = 1809 9549 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFHC2_MMR6 = 1810 9550 Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MFHGC0 = 1811 9551 Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MFHGC0_MM = 1812 9552 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MFHI = 1813 9553 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MFHI16_MM = 1814 9554 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MFHI64 = 1815 9555 Feature_HasDSP | 0, // MFHI_DSP = 1816 9556 Feature_InMicroMips | Feature_HasDSP | 0, // MFHI_DSP_MM = 1817 9557 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MFHI_MM = 1818 9558 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MFLO = 1819 9559 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MFLO16_MM = 1820 9560 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MFLO64 = 1821 9561 Feature_HasDSP | 0, // MFLO_DSP = 1822 9562 Feature_InMicroMips | Feature_HasDSP | 0, // MFLO_DSP_MM = 1823 9563 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MFLO_MM = 1824 9564 Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // MFTR = 1825 9565 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MINA_D = 1826 9566 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MINA_D_MMR6 = 1827 9567 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MINA_S = 1828 9568 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MINA_S_MMR6 = 1829 9569 Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_B = 1830 9570 Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_D = 1831 9571 Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_H = 1832 9572 Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_W = 1833 9573 Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_B = 1834 9574 Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_D = 1835 9575 Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_H = 1836 9576 Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_W = 1837 9577 Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_B = 1838 9578 Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_D = 1839 9579 Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_H = 1840 9580 Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_W = 1841 9581 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MIN_D = 1842 9582 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MIN_D_MMR6 = 1843 9583 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MIN_S = 1844 9584 Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_B = 1845 9585 Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_D = 1846 9586 Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_H = 1847 9587 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MIN_S_MMR6 = 1848 9588 Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_W = 1849 9589 Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_B = 1850 9590 Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_D = 1851 9591 Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_H = 1852 9592 Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_W = 1853 9593 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MOD = 1854 9594 Feature_HasDSP | 0, // MODSUB = 1855 9595 Feature_InMicroMips | Feature_HasDSP | 0, // MODSUB_MM = 1856 9596 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MODU = 1857 9597 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MODU_MMR6 = 1858 9598 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MOD_MMR6 = 1859 9599 Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_B = 1860 9600 Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_D = 1861 9601 Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_H = 1862 9602 Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_W = 1863 9603 Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_B = 1864 9604 Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_D = 1865 9605 Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_H = 1866 9606 Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_W = 1867 9607 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVE16_MM = 1868 9608 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MOVE16_MMR6 = 1869 9609 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVEP_MM = 1870 9610 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MOVEP_MMR6 = 1871 9611 Feature_HasStdEnc | Feature_HasMSA | 0, // MOVE_V = 1872 9612 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_D32 = 1873 9613 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVF_D32_MM = 1874 9614 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_D64 = 1875 9615 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_I = 1876 9616 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_I64 = 1877 9617 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVF_I_MM = 1878 9618 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_S = 1879 9619 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVF_S_MM = 1880 9620 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I64_D64 = 1881 9621 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I64_I = 1882 9622 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I64_I64 = 1883 9623 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I64_S = 1884 9624 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I_D32 = 1885 9625 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVN_I_D32_MM = 1886 9626 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I_D64 = 1887 9627 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I_I = 1888 9628 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I_I64 = 1889 9629 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVN_I_MM = 1890 9630 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I_S = 1891 9631 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVN_I_S_MM = 1892 9632 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_D32 = 1893 9633 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVT_D32_MM = 1894 9634 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_D64 = 1895 9635 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_I = 1896 9636 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_I64 = 1897 9637 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVT_I_MM = 1898 9638 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_S = 1899 9639 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVT_S_MM = 1900 9640 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I64_D64 = 1901 9641 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I64_I = 1902 9642 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I64_I64 = 1903 9643 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I64_S = 1904 9644 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I_D32 = 1905 9645 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVZ_I_D32_MM = 1906 9646 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I_D64 = 1907 9647 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I_I = 1908 9648 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I_I64 = 1909 9649 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVZ_I_MM = 1910 9650 Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I_S = 1911 9651 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVZ_I_S_MM = 1912 9652 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MSUB = 1913 9653 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MSUBF_D = 1914 9654 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MSUBF_D_MMR6 = 1915 9655 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MSUBF_S = 1916 9656 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MSUBF_S_MMR6 = 1917 9657 Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBR_Q_H = 1918 9658 Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBR_Q_W = 1919 9659 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MSUBU = 1920 9660 Feature_HasDSP | 0, // MSUBU_DSP = 1921 9661 Feature_InMicroMips | Feature_HasDSP | 0, // MSUBU_DSP_MM = 1922 9662 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MSUBU_MM = 1923 9663 Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_B = 1924 9664 Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_D = 1925 9665 Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_H = 1926 9666 Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_W = 1927 9667 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MSUB_D32 = 1928 9668 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MSUB_D32_MM = 1929 9669 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MSUB_D64 = 1930 9670 Feature_HasDSP | 0, // MSUB_DSP = 1931 9671 Feature_InMicroMips | Feature_HasDSP | 0, // MSUB_DSP_MM = 1932 9672 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MSUB_MM = 1933 9673 Feature_HasStdEnc | Feature_HasMSA | 0, // MSUB_Q_H = 1934 9674 Feature_HasStdEnc | Feature_HasMSA | 0, // MSUB_Q_W = 1935 9675 Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MSUB_S = 1936 9676 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MSUB_S_MM = 1937 9677 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MTC0 = 1938 9678 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTC0_MMR6 = 1939 9679 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTC1 = 1940 9680 Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTC1_D64 = 1941 9681 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // MTC1_MM = 1942 9682 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MTC1_MMR6 = 1943 9683 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MTC2 = 1944 9684 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTC2_MMR6 = 1945 9685 Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MTGC0 = 1946 9686 Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MTGC0_MM = 1947 9687 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTHC0_MMR6 = 1948 9688 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTHC1_D32 = 1949 9689 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // MTHC1_D32_MM = 1950 9690 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTHC1_D64 = 1951 9691 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // MTHC1_D64_MM = 1952 9692 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTHC2_MMR6 = 1953 9693 Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MTHGC0 = 1954 9694 Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MTHGC0_MM = 1955 9695 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MTHI = 1956 9696 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MTHI64 = 1957 9697 Feature_HasDSP | 0, // MTHI_DSP = 1958 9698 Feature_InMicroMips | Feature_HasDSP | 0, // MTHI_DSP_MM = 1959 9699 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MTHI_MM = 1960 9700 Feature_HasDSP | 0, // MTHLIP = 1961 9701 Feature_InMicroMips | Feature_HasDSP | 0, // MTHLIP_MM = 1962 9702 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MTLO = 1963 9703 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MTLO64 = 1964 9704 Feature_HasDSP | 0, // MTLO_DSP = 1965 9705 Feature_InMicroMips | Feature_HasDSP | 0, // MTLO_DSP_MM = 1966 9706 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MTLO_MM = 1967 9707 Feature_HasCnMips | 0, // MTM0 = 1968 9708 Feature_HasCnMips | 0, // MTM1 = 1969 9709 Feature_HasCnMips | 0, // MTM2 = 1970 9710 Feature_HasCnMips | 0, // MTP0 = 1971 9711 Feature_HasCnMips | 0, // MTP1 = 1972 9712 Feature_HasCnMips | 0, // MTP2 = 1973 9713 Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // MTTR = 1974 9714 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MUH = 1975 9715 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MUHU = 1976 9716 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MUHU_MMR6 = 1977 9717 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MUH_MMR6 = 1978 9718 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MUL = 1979 9719 Feature_HasDSP | 0, // MULEQ_S_W_PHL = 1980 9720 Feature_InMicroMips | Feature_HasDSP | 0, // MULEQ_S_W_PHL_MM = 1981 9721 Feature_HasDSP | 0, // MULEQ_S_W_PHR = 1982 9722 Feature_InMicroMips | Feature_HasDSP | 0, // MULEQ_S_W_PHR_MM = 1983 9723 Feature_HasDSP | 0, // MULEU_S_PH_QBL = 1984 9724 Feature_InMicroMips | Feature_HasDSP | 0, // MULEU_S_PH_QBL_MM = 1985 9725 Feature_HasDSP | 0, // MULEU_S_PH_QBR = 1986 9726 Feature_InMicroMips | Feature_HasDSP | 0, // MULEU_S_PH_QBR_MM = 1987 9727 Feature_HasDSP | 0, // MULQ_RS_PH = 1988 9728 Feature_InMicroMips | Feature_HasDSP | 0, // MULQ_RS_PH_MM = 1989 9729 Feature_HasDSPR2 | 0, // MULQ_RS_W = 1990 9730 Feature_InMicroMips | Feature_HasDSPR2 | 0, // MULQ_RS_W_MMR2 = 1991 9731 Feature_HasDSPR2 | 0, // MULQ_S_PH = 1992 9732 Feature_InMicroMips | Feature_HasDSPR2 | 0, // MULQ_S_PH_MMR2 = 1993 9733 Feature_HasDSPR2 | 0, // MULQ_S_W = 1994 9734 Feature_InMicroMips | Feature_HasDSPR2 | 0, // MULQ_S_W_MMR2 = 1995 9735 Feature_HasStdEnc | Feature_HasMSA | 0, // MULR_Q_H = 1996 9736 Feature_HasStdEnc | Feature_HasMSA | 0, // MULR_Q_W = 1997 9737 Feature_HasDSP | 0, // MULSAQ_S_W_PH = 1998 9738 Feature_InMicroMips | Feature_HasDSP | 0, // MULSAQ_S_W_PH_MM = 1999 9739 Feature_HasDSPR2 | 0, // MULSA_W_PH = 2000 9740 Feature_InMicroMips | Feature_HasDSPR2 | 0, // MULSA_W_PH_MMR2 = 2001 9741 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MULT = 2002 9742 Feature_HasDSP | 0, // MULTU_DSP = 2003 9743 Feature_InMicroMips | Feature_HasDSP | 0, // MULTU_DSP_MM = 2004 9744 Feature_HasDSP | 0, // MULT_DSP = 2005 9745 Feature_InMicroMips | Feature_HasDSP | 0, // MULT_DSP_MM = 2006 9746 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MULT_MM = 2007 9747 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MULTu = 2008 9748 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MULTu_MM = 2009 9749 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MULU = 2010 9750 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MULU_MMR6 = 2011 9751 Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_B = 2012 9752 Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_D = 2013 9753 Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_H = 2014 9754 Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_W = 2015 9755 Feature_InMicroMips | Feature_NotMips32r6 | 0, // MUL_MM = 2016 9756 Feature_InMicroMips | Feature_HasMips32r6 | 0, // MUL_MMR6 = 2017 9757 Feature_HasDSPR2 | 0, // MUL_PH = 2018 9758 Feature_InMicroMips | Feature_HasDSPR2 | 0, // MUL_PH_MMR2 = 2019 9759 Feature_HasStdEnc | Feature_HasMSA | 0, // MUL_Q_H = 2020 9760 Feature_HasStdEnc | Feature_HasMSA | 0, // MUL_Q_W = 2021 9761 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MUL_R6 = 2022 9762 Feature_HasDSPR2 | 0, // MUL_S_PH = 2023 9763 Feature_InMicroMips | Feature_HasDSPR2 | 0, // MUL_S_PH_MMR2 = 2024 9764 Feature_InMips16Mode | 0, // Mfhi16 = 2025 9765 Feature_InMips16Mode | 0, // Mflo16 = 2026 9766 Feature_InMips16Mode | 0, // Move32R16 = 2027 9767 Feature_InMips16Mode | 0, // MoveR3216 = 2028 9768 Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_B = 2029 9769 Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_D = 2030 9770 Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_H = 2031 9771 Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_W = 2032 9772 Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_B = 2033 9773 Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_D = 2034 9774 Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_H = 2035 9775 Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_W = 2036 9776 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMADD_D32 = 2037 9777 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMADD_D32_MM = 2038 9778 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMADD_D64 = 2039 9779 Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMADD_S = 2040 9780 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMADD_S_MM = 2041 9781 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMSUB_D32 = 2042 9782 Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMSUB_D32_MM = 2043 9783 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMSUB_D64 = 2044 9784 Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMSUB_S = 2045 9785 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMSUB_S_MM = 2046 9786 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // NOR = 2047 9787 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // NOR64 = 2048 9788 Feature_HasStdEnc | Feature_HasMSA | 0, // NORI_B = 2049 9789 Feature_InMicroMips | Feature_NotMips32r6 | 0, // NOR_MM = 2050 9790 Feature_InMicroMips | Feature_HasMips32r6 | 0, // NOR_MMR6 = 2051 9791 Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V = 2052 9792 Feature_InMicroMips | Feature_NotMips32r6 | 0, // NOT16_MM = 2053 9793 Feature_InMicroMips | Feature_HasMips32r6 | 0, // NOT16_MMR6 = 2054 9794 Feature_InMips16Mode | 0, // NegRxRy16 = 2055 9795 Feature_InMips16Mode | 0, // NotRxRy16 = 2056 9796 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // OR = 2057 9797 Feature_InMicroMips | Feature_NotMips32r6 | 0, // OR16_MM = 2058 9798 Feature_InMicroMips | Feature_HasMips32r6 | 0, // OR16_MMR6 = 2059 9799 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // OR64 = 2060 9800 Feature_HasStdEnc | Feature_HasMSA | 0, // ORI_B = 2061 9801 Feature_InMicroMips | Feature_HasMips32r6 | 0, // ORI_MMR6 = 2062 9802 Feature_InMicroMips | Feature_NotMips32r6 | 0, // OR_MM = 2063 9803 Feature_InMicroMips | Feature_HasMips32r6 | 0, // OR_MMR6 = 2064 9804 Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V = 2065 9805 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ORi = 2066 9806 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // ORi64 = 2067 9807 Feature_InMicroMips | Feature_NotMips32r6 | 0, // ORi_MM = 2068 9808 Feature_InMips16Mode | 0, // OrRxRxRy16 = 2069 9809 Feature_HasDSP | 0, // PACKRL_PH = 2070 9810 Feature_InMicroMips | Feature_HasDSP | 0, // PACKRL_PH_MM = 2071 9811 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // PAUSE = 2072 9812 Feature_InMicroMips | 0, // PAUSE_MM = 2073 9813 Feature_InMicroMips | Feature_HasMips32r6 | 0, // PAUSE_MMR6 = 2074 9814 Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_B = 2075 9815 Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_D = 2076 9816 Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_H = 2077 9817 Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_W = 2078 9818 Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_B = 2079 9819 Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_D = 2080 9820 Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_H = 2081 9821 Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_W = 2082 9822 Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_B = 2083 9823 Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_D = 2084 9824 Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_H = 2085 9825 Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_W = 2086 9826 Feature_HasDSP | 0, // PICK_PH = 2087 9827 Feature_InMicroMips | Feature_HasDSP | 0, // PICK_PH_MM = 2088 9828 Feature_HasDSP | 0, // PICK_QB = 2089 9829 Feature_InMicroMips | Feature_HasDSP | 0, // PICK_QB_MM = 2090 9830 Feature_HasCnMips | 0, // POP = 2091 9831 Feature_HasDSP | 0, // PRECEQU_PH_QBL = 2092 9832 Feature_HasDSP | 0, // PRECEQU_PH_QBLA = 2093 9833 Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQU_PH_QBLA_MM = 2094 9834 Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQU_PH_QBL_MM = 2095 9835 Feature_HasDSP | 0, // PRECEQU_PH_QBR = 2096 9836 Feature_HasDSP | 0, // PRECEQU_PH_QBRA = 2097 9837 Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQU_PH_QBRA_MM = 2098 9838 Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQU_PH_QBR_MM = 2099 9839 Feature_HasDSP | 0, // PRECEQ_W_PHL = 2100 9840 Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQ_W_PHL_MM = 2101 9841 Feature_HasDSP | 0, // PRECEQ_W_PHR = 2102 9842 Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQ_W_PHR_MM = 2103 9843 Feature_HasDSP | 0, // PRECEU_PH_QBL = 2104 9844 Feature_HasDSP | 0, // PRECEU_PH_QBLA = 2105 9845 Feature_InMicroMips | Feature_HasDSP | 0, // PRECEU_PH_QBLA_MM = 2106 9846 Feature_InMicroMips | Feature_HasDSP | 0, // PRECEU_PH_QBL_MM = 2107 9847 Feature_HasDSP | 0, // PRECEU_PH_QBR = 2108 9848 Feature_HasDSP | 0, // PRECEU_PH_QBRA = 2109 9849 Feature_InMicroMips | Feature_HasDSP | 0, // PRECEU_PH_QBRA_MM = 2110 9850 Feature_InMicroMips | Feature_HasDSP | 0, // PRECEU_PH_QBR_MM = 2111 9851 Feature_HasDSP | 0, // PRECRQU_S_QB_PH = 2112 9852 Feature_InMicroMips | Feature_HasDSP | 0, // PRECRQU_S_QB_PH_MM = 2113 9853 Feature_HasDSP | 0, // PRECRQ_PH_W = 2114 9854 Feature_InMicroMips | Feature_HasDSP | 0, // PRECRQ_PH_W_MM = 2115 9855 Feature_HasDSP | 0, // PRECRQ_QB_PH = 2116 9856 Feature_InMicroMips | Feature_HasDSP | 0, // PRECRQ_QB_PH_MM = 2117 9857 Feature_HasDSP | 0, // PRECRQ_RS_PH_W = 2118 9858 Feature_InMicroMips | Feature_HasDSP | 0, // PRECRQ_RS_PH_W_MM = 2119 9859 Feature_HasDSPR2 | 0, // PRECR_QB_PH = 2120 9860 Feature_InMicroMips | Feature_HasDSPR2 | 0, // PRECR_QB_PH_MMR2 = 2121 9861 Feature_HasDSPR2 | 0, // PRECR_SRA_PH_W = 2122 9862 Feature_InMicroMips | Feature_HasDSPR2 | 0, // PRECR_SRA_PH_W_MMR2 = 2123 9863 Feature_HasDSPR2 | 0, // PRECR_SRA_R_PH_W = 2124 9864 Feature_InMicroMips | Feature_HasDSPR2 | 0, // PRECR_SRA_R_PH_W_MMR2 = 2125 9865 Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // PREF = 2126 9866 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // PREFE = 2127 9867 Feature_InMicroMips | Feature_HasEVA | 0, // PREFE_MM = 2128 9868 Feature_InMicroMips | Feature_NotMips32r6 | 0, // PREFX_MM = 2129 9869 Feature_InMicroMips | Feature_NotMips32r6 | 0, // PREF_MM = 2130 9870 Feature_InMicroMips | Feature_HasMips32r6 | 0, // PREF_MMR6 = 2131 9871 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // PREF_R6 = 2132 9872 Feature_HasDSPR2 | 0, // PREPEND = 2133 9873 Feature_InMicroMips | Feature_HasDSPR2 | 0, // PREPEND_MMR2 = 2134 9874 Feature_HasDSP | 0, // RADDU_W_QB = 2135 9875 Feature_InMicroMips | Feature_HasDSP | 0, // RADDU_W_QB_MM = 2136 9876 Feature_HasDSP | 0, // RDDSP = 2137 9877 Feature_InMicroMips | Feature_HasDSP | 0, // RDDSP_MM = 2138 9878 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // RDHWR = 2139 9879 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // RDHWR64 = 2140 9880 Feature_InMicroMips | Feature_NotMips32r6 | 0, // RDHWR_MM = 2141 9881 Feature_InMicroMips | Feature_HasMips32r6 | 0, // RDHWR_MMR6 = 2142 9882 Feature_InMicroMips | Feature_HasMips32r6 | 0, // RDPGPR_MMR6 = 2143 9883 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RECIP_D32 = 2144 9884 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // RECIP_D32_MM = 2145 9885 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RECIP_D64 = 2146 9886 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // RECIP_D64_MM = 2147 9887 Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RECIP_S = 2148 9888 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // RECIP_S_MM = 2149 9889 Feature_HasDSP | 0, // REPLV_PH = 2150 9890 Feature_InMicroMips | Feature_HasDSP | 0, // REPLV_PH_MM = 2151 9891 Feature_HasDSP | 0, // REPLV_QB = 2152 9892 Feature_InMicroMips | Feature_HasDSP | 0, // REPLV_QB_MM = 2153 9893 Feature_HasDSP | 0, // REPL_PH = 2154 9894 Feature_InMicroMips | Feature_HasDSP | 0, // REPL_PH_MM = 2155 9895 Feature_HasDSP | 0, // REPL_QB = 2156 9896 Feature_InMicroMips | Feature_HasDSP | 0, // REPL_QB_MM = 2157 9897 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RINT_D = 2158 9898 Feature_InMicroMips | Feature_HasMips32r6 | 0, // RINT_D_MMR6 = 2159 9899 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RINT_S = 2160 9900 Feature_InMicroMips | Feature_HasMips32r6 | 0, // RINT_S_MMR6 = 2161 9901 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // ROTR = 2162 9902 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // ROTRV = 2163 9903 Feature_InMicroMips | 0, // ROTRV_MM = 2164 9904 Feature_InMicroMips | 0, // ROTR_MM = 2165 9905 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_L_D64 = 2166 9906 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_L_D_MMR6 = 2167 9907 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_L_S = 2168 9908 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_L_S_MMR6 = 2169 9909 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_D32 = 2170 9910 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_D64 = 2171 9911 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_W_D_MMR6 = 2172 9912 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // ROUND_W_MM = 2173 9913 Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_S = 2174 9914 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // ROUND_W_S_MM = 2175 9915 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_W_S_MMR6 = 2176 9916 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RSQRT_D32 = 2177 9917 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // RSQRT_D32_MM = 2178 9918 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RSQRT_D64 = 2179 9919 Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // RSQRT_D64_MM = 2180 9920 Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RSQRT_S = 2181 9921 Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // RSQRT_S_MM = 2182 9922 Feature_InMips16Mode | 0, // Restore16 = 2183 9923 Feature_InMips16Mode | 0, // RestoreX16 = 2184 9924 Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_B = 2185 9925 Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_D = 2186 9926 Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_H = 2187 9927 Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_W = 2188 9928 Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_B = 2189 9929 Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_D = 2190 9930 Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_H = 2191 9931 Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_W = 2192 9932 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SB = 2193 9933 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SB16_MM = 2194 9934 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SB16_MMR6 = 2195 9935 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SB64 = 2196 9936 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SBE = 2197 9937 Feature_InMicroMips | Feature_HasEVA | 0, // SBE_MM = 2198 9938 Feature_InMicroMips | 0, // SB_MM = 2199 9939 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SB_MMR6 = 2200 9940 Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SC = 2201 9941 Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SC64 = 2202 9942 Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // SC64_R6 = 2203 9943 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SCD = 2204 9944 Feature_HasStdEnc | Feature_HasMips32r6 | 0, // SCD_R6 = 2205 9945 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SCE = 2206 9946 Feature_InMicroMips | Feature_HasEVA | 0, // SCE_MM = 2207 9947 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SC_MM = 2208 9948 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SC_MMR6 = 2209 9949 Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SC_R6 = 2210 9950 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // SD = 2211 9951 Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SDBBP = 2212 9952 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SDBBP16_MM = 2213 9953 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SDBBP16_MMR6 = 2214 9954 Feature_InMicroMips | 0, // SDBBP_MM = 2215 9955 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SDBBP_MMR6 = 2216 9956 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SDBBP_R6 = 2217 9957 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SDC1 = 2218 9958 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SDC164 = 2219 9959 Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // SDC1_D64_MMR6 = 2220 9960 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // SDC1_MM = 2221 9961 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SDC2 = 2222 9962 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SDC2_MMR6 = 2223 9963 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SDC2_R6 = 2224 9964 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // SDC3 = 2225 9965 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SDIV = 2226 9966 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SDIV_MM = 2227 9967 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDL = 2228 9968 Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDR = 2229 9969 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SDXC1 = 2230 9970 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // SDXC164 = 2231 9971 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // SEB = 2232 9972 Feature_HasStdEnc | Feature_HasMips32r2 | 0, // SEB64 = 2233 9973 Feature_InMicroMips | 0, // SEB_MM = 2234 9974 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // SEH = 2235 9975 Feature_HasStdEnc | Feature_HasMips32r2 | 0, // SEH64 = 2236 9976 Feature_InMicroMips | 0, // SEH_MM = 2237 9977 Feature_HasStdEnc | Feature_IsGP32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SELEQZ = 2238 9978 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips32r6 | 0, // SELEQZ64 = 2239 9979 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELEQZ_D = 2240 9980 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELEQZ_D_MMR6 = 2241 9981 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELEQZ_MMR6 = 2242 9982 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELEQZ_S = 2243 9983 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELEQZ_S_MMR6 = 2244 9984 Feature_HasStdEnc | Feature_IsGP32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SELNEZ = 2245 9985 Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips32r6 | 0, // SELNEZ64 = 2246 9986 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELNEZ_D = 2247 9987 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELNEZ_D_MMR6 = 2248 9988 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELNEZ_MMR6 = 2249 9989 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELNEZ_S = 2250 9990 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELNEZ_S_MMR6 = 2251 9991 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SEL_D = 2252 9992 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SEL_D_MMR6 = 2253 9993 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SEL_S = 2254 9994 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SEL_S_MMR6 = 2255 9995 Feature_HasCnMips | 0, // SEQ = 2256 9996 Feature_HasCnMips | 0, // SEQi = 2257 9997 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SH = 2258 9998 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SH16_MM = 2259 9999 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SH16_MMR6 = 2260 10000 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SH64 = 2261 10001 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SHE = 2262 10002 Feature_InMicroMips | Feature_HasEVA | 0, // SHE_MM = 2263 10003 Feature_HasStdEnc | Feature_HasMSA | 0, // SHF_B = 2264 10004 Feature_HasStdEnc | Feature_HasMSA | 0, // SHF_H = 2265 10005 Feature_HasStdEnc | Feature_HasMSA | 0, // SHF_W = 2266 10006 Feature_HasDSP | 0, // SHILO = 2267 10007 Feature_HasDSP | 0, // SHILOV = 2268 10008 Feature_InMicroMips | Feature_HasDSP | 0, // SHILOV_MM = 2269 10009 Feature_InMicroMips | Feature_HasDSP | 0, // SHILO_MM = 2270 10010 Feature_HasDSP | 0, // SHLLV_PH = 2271 10011 Feature_InMicroMips | Feature_HasDSP | 0, // SHLLV_PH_MM = 2272 10012 Feature_HasDSP | 0, // SHLLV_QB = 2273 10013 Feature_InMicroMips | Feature_HasDSP | 0, // SHLLV_QB_MM = 2274 10014 Feature_HasDSP | 0, // SHLLV_S_PH = 2275 10015 Feature_InMicroMips | Feature_HasDSP | 0, // SHLLV_S_PH_MM = 2276 10016 Feature_HasDSP | 0, // SHLLV_S_W = 2277 10017 Feature_InMicroMips | Feature_HasDSP | 0, // SHLLV_S_W_MM = 2278 10018 Feature_HasDSP | 0, // SHLL_PH = 2279 10019 Feature_InMicroMips | Feature_HasDSP | 0, // SHLL_PH_MM = 2280 10020 Feature_HasDSP | 0, // SHLL_QB = 2281 10021 Feature_InMicroMips | Feature_HasDSP | 0, // SHLL_QB_MM = 2282 10022 Feature_HasDSP | 0, // SHLL_S_PH = 2283 10023 Feature_InMicroMips | Feature_HasDSP | 0, // SHLL_S_PH_MM = 2284 10024 Feature_HasDSP | 0, // SHLL_S_W = 2285 10025 Feature_InMicroMips | Feature_HasDSP | 0, // SHLL_S_W_MM = 2286 10026 Feature_HasDSP | 0, // SHRAV_PH = 2287 10027 Feature_InMicroMips | Feature_HasDSP | 0, // SHRAV_PH_MM = 2288 10028 Feature_HasDSPR2 | 0, // SHRAV_QB = 2289 10029 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRAV_QB_MMR2 = 2290 10030 Feature_HasDSP | 0, // SHRAV_R_PH = 2291 10031 Feature_InMicroMips | Feature_HasDSP | 0, // SHRAV_R_PH_MM = 2292 10032 Feature_HasDSPR2 | 0, // SHRAV_R_QB = 2293 10033 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRAV_R_QB_MMR2 = 2294 10034 Feature_HasDSP | 0, // SHRAV_R_W = 2295 10035 Feature_InMicroMips | Feature_HasDSP | 0, // SHRAV_R_W_MM = 2296 10036 Feature_HasDSP | 0, // SHRA_PH = 2297 10037 Feature_InMicroMips | Feature_HasDSP | 0, // SHRA_PH_MM = 2298 10038 Feature_HasDSPR2 | 0, // SHRA_QB = 2299 10039 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRA_QB_MMR2 = 2300 10040 Feature_HasDSP | 0, // SHRA_R_PH = 2301 10041 Feature_InMicroMips | Feature_HasDSP | 0, // SHRA_R_PH_MM = 2302 10042 Feature_HasDSPR2 | 0, // SHRA_R_QB = 2303 10043 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRA_R_QB_MMR2 = 2304 10044 Feature_HasDSP | 0, // SHRA_R_W = 2305 10045 Feature_InMicroMips | Feature_HasDSP | 0, // SHRA_R_W_MM = 2306 10046 Feature_HasDSPR2 | 0, // SHRLV_PH = 2307 10047 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRLV_PH_MMR2 = 2308 10048 Feature_HasDSP | 0, // SHRLV_QB = 2309 10049 Feature_InMicroMips | Feature_HasDSP | 0, // SHRLV_QB_MM = 2310 10050 Feature_HasDSPR2 | 0, // SHRL_PH = 2311 10051 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRL_PH_MMR2 = 2312 10052 Feature_HasDSP | 0, // SHRL_QB = 2313 10053 Feature_InMicroMips | Feature_HasDSP | 0, // SHRL_QB_MM = 2314 10054 Feature_InMicroMips | 0, // SH_MM = 2315 10055 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SH_MMR6 = 2316 10056 Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_B = 2317 10057 Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_D = 2318 10058 Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_H = 2319 10059 Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_W = 2320 10060 Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_B = 2321 10061 Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_D = 2322 10062 Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_H = 2323 10063 Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_W = 2324 10064 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLL = 2325 10065 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SLL16_MM = 2326 10066 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SLL16_MMR6 = 2327 10067 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLL64_32 = 2328 10068 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLL64_64 = 2329 10069 Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_B = 2330 10070 Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_D = 2331 10071 Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_H = 2332 10072 Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_W = 2333 10073 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLLV = 2334 10074 Feature_InMicroMips | 0, // SLLV_MM = 2335 10075 Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_B = 2336 10076 Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_D = 2337 10077 Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_H = 2338 10078 Feature_InMicroMips | 0, // SLL_MM = 2339 10079 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SLL_MMR6 = 2340 10080 Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_W = 2341 10081 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLT = 2342 10082 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLT64 = 2343 10083 Feature_InMicroMips | 0, // SLT_MM = 2344 10084 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLTi = 2345 10085 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLTi64 = 2346 10086 Feature_InMicroMips | 0, // SLTi_MM = 2347 10087 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLTiu = 2348 10088 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLTiu64 = 2349 10089 Feature_InMicroMips | 0, // SLTiu_MM = 2350 10090 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLTu = 2351 10091 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLTu64 = 2352 10092 Feature_InMicroMips | 0, // SLTu_MM = 2353 10093 Feature_HasCnMips | 0, // SNE = 2354 10094 Feature_HasCnMips | 0, // SNEi = 2355 10095 Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_B = 2356 10096 Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_D = 2357 10097 Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_H = 2358 10098 Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_W = 2359 10099 Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_B = 2360 10100 Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_D = 2361 10101 Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_H = 2362 10102 Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_W = 2363 10103 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRA = 2364 10104 Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_B = 2365 10105 Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_D = 2366 10106 Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_H = 2367 10107 Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_W = 2368 10108 Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_B = 2369 10109 Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_D = 2370 10110 Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_H = 2371 10111 Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_W = 2372 10112 Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_B = 2373 10113 Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_D = 2374 10114 Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_H = 2375 10115 Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_W = 2376 10116 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRAV = 2377 10117 Feature_InMicroMips | 0, // SRAV_MM = 2378 10118 Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_B = 2379 10119 Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_D = 2380 10120 Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_H = 2381 10121 Feature_InMicroMips | 0, // SRA_MM = 2382 10122 Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_W = 2383 10123 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRL = 2384 10124 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SRL16_MM = 2385 10125 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SRL16_MMR6 = 2386 10126 Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_B = 2387 10127 Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_D = 2388 10128 Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_H = 2389 10129 Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_W = 2390 10130 Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_B = 2391 10131 Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_D = 2392 10132 Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_H = 2393 10133 Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_W = 2394 10134 Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_B = 2395 10135 Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_D = 2396 10136 Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_H = 2397 10137 Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_W = 2398 10138 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRLV = 2399 10139 Feature_InMicroMips | 0, // SRLV_MM = 2400 10140 Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_B = 2401 10141 Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_D = 2402 10142 Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_H = 2403 10143 Feature_InMicroMips | 0, // SRL_MM = 2404 10144 Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_W = 2405 10145 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SSNOP = 2406 10146 Feature_InMicroMips | 0, // SSNOP_MM = 2407 10147 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SSNOP_MMR6 = 2408 10148 Feature_HasStdEnc | Feature_HasMSA | 0, // ST_B = 2409 10149 Feature_HasStdEnc | Feature_HasMSA | 0, // ST_D = 2410 10150 Feature_HasStdEnc | Feature_HasMSA | 0, // ST_H = 2411 10151 Feature_HasStdEnc | Feature_HasMSA | 0, // ST_W = 2412 10152 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SUB = 2413 10153 Feature_HasDSPR2 | 0, // SUBQH_PH = 2414 10154 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBQH_PH_MMR2 = 2415 10155 Feature_HasDSPR2 | 0, // SUBQH_R_PH = 2416 10156 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBQH_R_PH_MMR2 = 2417 10157 Feature_HasDSPR2 | 0, // SUBQH_R_W = 2418 10158 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBQH_R_W_MMR2 = 2419 10159 Feature_HasDSPR2 | 0, // SUBQH_W = 2420 10160 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBQH_W_MMR2 = 2421 10161 Feature_HasDSP | 0, // SUBQ_PH = 2422 10162 Feature_InMicroMips | Feature_HasDSP | 0, // SUBQ_PH_MM = 2423 10163 Feature_HasDSP | 0, // SUBQ_S_PH = 2424 10164 Feature_InMicroMips | Feature_HasDSP | 0, // SUBQ_S_PH_MM = 2425 10165 Feature_HasDSP | 0, // SUBQ_S_W = 2426 10166 Feature_InMicroMips | Feature_HasDSP | 0, // SUBQ_S_W_MM = 2427 10167 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_B = 2428 10168 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_D = 2429 10169 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_H = 2430 10170 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_W = 2431 10171 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_B = 2432 10172 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_D = 2433 10173 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_H = 2434 10174 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_W = 2435 10175 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_B = 2436 10176 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_D = 2437 10177 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_H = 2438 10178 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_W = 2439 10179 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_B = 2440 10180 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_D = 2441 10181 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_H = 2442 10182 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_W = 2443 10183 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SUBU16_MM = 2444 10184 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SUBU16_MMR6 = 2445 10185 Feature_HasDSPR2 | 0, // SUBUH_QB = 2446 10186 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBUH_QB_MMR2 = 2447 10187 Feature_HasDSPR2 | 0, // SUBUH_R_QB = 2448 10188 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBUH_R_QB_MMR2 = 2449 10189 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SUBU_MMR6 = 2450 10190 Feature_HasDSPR2 | 0, // SUBU_PH = 2451 10191 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBU_PH_MMR2 = 2452 10192 Feature_HasDSP | 0, // SUBU_QB = 2453 10193 Feature_InMicroMips | Feature_HasDSP | 0, // SUBU_QB_MM = 2454 10194 Feature_HasDSPR2 | 0, // SUBU_S_PH = 2455 10195 Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBU_S_PH_MMR2 = 2456 10196 Feature_HasDSP | 0, // SUBU_S_QB = 2457 10197 Feature_InMicroMips | Feature_HasDSP | 0, // SUBU_S_QB_MM = 2458 10198 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_B = 2459 10199 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_D = 2460 10200 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_H = 2461 10201 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_W = 2462 10202 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_B = 2463 10203 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_D = 2464 10204 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_H = 2465 10205 Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_W = 2466 10206 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SUB_MM = 2467 10207 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SUB_MMR6 = 2468 10208 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SUBu = 2469 10209 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SUBu_MM = 2470 10210 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SUXC1 = 2471 10211 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SUXC164 = 2472 10212 Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // SUXC1_MM = 2473 10213 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SW = 2474 10214 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SW16_MM = 2475 10215 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SW16_MMR6 = 2476 10216 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SW64 = 2477 10217 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SWC1 = 2478 10218 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // SWC1_MM = 2479 10219 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SWC2 = 2480 10220 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWC2_MMR6 = 2481 10221 Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SWC2_R6 = 2482 10222 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // SWC3 = 2483 10223 Feature_NotInMips16Mode | Feature_HasDSP | 0, // SWDSP = 2484 10224 Feature_InMicroMips | Feature_HasDSP | 0, // SWDSP_MM = 2485 10225 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SWE = 2486 10226 Feature_InMicroMips | Feature_HasEVA | 0, // SWE_MM = 2487 10227 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SWL = 2488 10228 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SWL64 = 2489 10229 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SWLE = 2490 10230 Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // SWLE_MM = 2491 10231 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWL_MM = 2492 10232 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWM16_MM = 2493 10233 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWM16_MMR6 = 2494 10234 Feature_InMicroMips | 0, // SWM32_MM = 2495 10235 Feature_InMicroMips | 0, // SWP_MM = 2496 10236 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SWR = 2497 10237 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SWR64 = 2498 10238 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SWRE = 2499 10239 Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // SWRE_MM = 2500 10240 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWR_MM = 2501 10241 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWSP_MM = 2502 10242 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWSP_MMR6 = 2503 10243 Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // SWXC1 = 2504 10244 Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // SWXC1_MM = 2505 10245 Feature_InMicroMips | 0, // SW_MM = 2506 10246 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SW_MMR6 = 2507 10247 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // SYNC = 2508 10248 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // SYNCI = 2509 10249 Feature_InMicroMips | Feature_NotMips32r6 | 0, // SYNCI_MM = 2510 10250 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SYNCI_MMR6 = 2511 10251 Feature_InMicroMips | 0, // SYNC_MM = 2512 10252 Feature_InMicroMips | Feature_HasMips32r6 | 0, // SYNC_MMR6 = 2513 10253 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SYSCALL = 2514 10254 Feature_InMicroMips | 0, // SYSCALL_MM = 2515 10255 Feature_InMips16Mode | 0, // Save16 = 2516 10256 Feature_InMips16Mode | 0, // SaveX16 = 2517 10257 Feature_InMips16Mode | 0, // SbRxRyOffMemX16 = 2518 10258 Feature_InMips16Mode | 0, // SebRx16 = 2519 10259 Feature_InMips16Mode | 0, // SehRx16 = 2520 10260 Feature_InMips16Mode | 0, // ShRxRyOffMemX16 = 2521 10261 Feature_InMips16Mode | 0, // SllX16 = 2522 10262 Feature_InMips16Mode | 0, // SllvRxRy16 = 2523 10263 Feature_InMips16Mode | 0, // SltRxRy16 = 2524 10264 Feature_InMips16Mode | 0, // SltiRxImm16 = 2525 10265 Feature_InMips16Mode | 0, // SltiRxImmX16 = 2526 10266 Feature_InMips16Mode | 0, // SltiuRxImm16 = 2527 10267 Feature_InMips16Mode | 0, // SltiuRxImmX16 = 2528 10268 Feature_InMips16Mode | 0, // SltuRxRy16 = 2529 10269 Feature_InMips16Mode | 0, // SraX16 = 2530 10270 Feature_InMips16Mode | 0, // SravRxRy16 = 2531 10271 Feature_InMips16Mode | 0, // SrlX16 = 2532 10272 Feature_InMips16Mode | 0, // SrlvRxRy16 = 2533 10273 Feature_InMips16Mode | 0, // SubuRxRyRz16 = 2534 10274 Feature_InMips16Mode | 0, // SwRxRyOffMemX16 = 2535 10275 Feature_InMips16Mode | 0, // SwRxSpImmX16 = 2536 10276 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TEQ = 2537 10277 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TEQI = 2538 10278 Feature_InMicroMips | Feature_NotMips32r6 | 0, // TEQI_MM = 2539 10279 Feature_InMicroMips | 0, // TEQ_MM = 2540 10280 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TGE = 2541 10281 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TGEI = 2542 10282 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TGEIU = 2543 10283 Feature_InMicroMips | Feature_NotMips32r6 | 0, // TGEIU_MM = 2544 10284 Feature_InMicroMips | Feature_NotMips32r6 | 0, // TGEI_MM = 2545 10285 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TGEU = 2546 10286 Feature_InMicroMips | 0, // TGEU_MM = 2547 10287 Feature_InMicroMips | 0, // TGE_MM = 2548 10288 Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGINV = 2549 10289 Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGINVF = 2550 10290 Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGINVF_MM = 2551 10291 Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGINV_MM = 2552 10292 Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGP = 2553 10293 Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGP_MM = 2554 10294 Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGR = 2555 10295 Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGR_MM = 2556 10296 Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGWI = 2557 10297 Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGWI_MM = 2558 10298 Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGWR = 2559 10299 Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGWR_MM = 2560 10300 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // TLBINV = 2561 10301 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // TLBINVF = 2562 10302 Feature_InMicroMips | Feature_HasMips32r6 | 0, // TLBINVF_MMR6 = 2563 10303 Feature_InMicroMips | Feature_HasMips32r6 | 0, // TLBINV_MMR6 = 2564 10304 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBP = 2565 10305 Feature_InMicroMips | 0, // TLBP_MM = 2566 10306 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBR = 2567 10307 Feature_InMicroMips | 0, // TLBR_MM = 2568 10308 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBWI = 2569 10309 Feature_InMicroMips | 0, // TLBWI_MM = 2570 10310 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBWR = 2571 10311 Feature_InMicroMips | 0, // TLBWR_MM = 2572 10312 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TLT = 2573 10313 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TLTI = 2574 10314 Feature_InMicroMips | Feature_NotMips32r6 | 0, // TLTIU_MM = 2575 10315 Feature_InMicroMips | Feature_NotMips32r6 | 0, // TLTI_MM = 2576 10316 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TLTU = 2577 10317 Feature_InMicroMips | 0, // TLTU_MM = 2578 10318 Feature_InMicroMips | 0, // TLT_MM = 2579 10319 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TNE = 2580 10320 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TNEI = 2581 10321 Feature_InMicroMips | Feature_NotMips32r6 | 0, // TNEI_MM = 2582 10322 Feature_InMicroMips | 0, // TNE_MM = 2583 10323 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_L_D64 = 2584 10324 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_L_D_MMR6 = 2585 10325 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_L_S = 2586 10326 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_L_S_MMR6 = 2587 10327 Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_W_D32 = 2588 10328 Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_W_D64 = 2589 10329 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_W_D_MMR6 = 2590 10330 Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // TRUNC_W_MM = 2591 10331 Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_W_S = 2592 10332 Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // TRUNC_W_S_MM = 2593 10333 Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_W_S_MMR6 = 2594 10334 Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TTLTIU = 2595 10335 Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // UDIV = 2596 10336 Feature_InMicroMips | Feature_NotMips32r6 | 0, // UDIV_MM = 2597 10337 Feature_HasCnMips | 0, // V3MULU = 2598 10338 Feature_HasCnMips | 0, // VMM0 = 2599 10339 Feature_HasCnMips | 0, // VMULU = 2600 10340 Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_B = 2601 10341 Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_D = 2602 10342 Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_H = 2603 10343 Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_W = 2604 10344 Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotInMicroMips | 0, // WAIT = 2605 10345 Feature_InMicroMips | 0, // WAIT_MM = 2606 10346 Feature_InMicroMips | Feature_HasMips32r6 | 0, // WAIT_MMR6 = 2607 10347 Feature_HasDSP | Feature_NotInMicroMips | 0, // WRDSP = 2608 10348 Feature_InMicroMips | Feature_HasDSP | 0, // WRDSP_MM = 2609 10349 Feature_InMicroMips | Feature_HasMips32r6 | 0, // WRPGPR_MMR6 = 2610 10350 Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // WSBH = 2611 10351 Feature_InMicroMips | 0, // WSBH_MM = 2612 10352 Feature_InMicroMips | Feature_HasMips32r6 | 0, // WSBH_MMR6 = 2613 10353 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // XOR = 2614 10354 Feature_InMicroMips | Feature_NotMips32r6 | 0, // XOR16_MM = 2615 10355 Feature_InMicroMips | Feature_HasMips32r6 | 0, // XOR16_MMR6 = 2616 10356 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // XOR64 = 2617 10357 Feature_HasStdEnc | Feature_HasMSA | 0, // XORI_B = 2618 10358 Feature_InMicroMips | Feature_HasMips32r6 | 0, // XORI_MMR6 = 2619 10359 Feature_InMicroMips | Feature_NotMips32r6 | 0, // XOR_MM = 2620 10360 Feature_InMicroMips | Feature_HasMips32r6 | 0, // XOR_MMR6 = 2621 10361 Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V = 2622 10362 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // XORi = 2623 10363 Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // XORi64 = 2624 10364 Feature_InMicroMips | Feature_NotMips32r6 | 0, // XORi_MM = 2625 10365 Feature_InMips16Mode | 0, // XorRxRxRy16 = 2626 10366 Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // YIELD = 2627 10367 }; 10368 10369 assert(Inst.getOpcode() < 2628); 10370 uint64_t MissingFeatures = 10371 (AvailableFeatures & RequiredFeatures[Inst.getOpcode()]) ^ 10372 RequiredFeatures[Inst.getOpcode()]; 10373 if (MissingFeatures) { 10374 std::ostringstream Msg; 10375 Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str() 10376 << " instruction but the "; 10377 for (unsigned i = 0; i < 8 * sizeof(MissingFeatures); ++i) 10378 if (MissingFeatures & (1ULL << i)) 10379 Msg << SubtargetFeatureNames[i] << " "; 10380 Msg << "predicate(s) are not met"; 10381 report_fatal_error(Msg.str()); 10382 } 10383#else 10384// Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF). 10385(void)MCII; 10386#endif // NDEBUG 10387} 10388#endif 10389