Searched refs:BaseReg1 (Results 1 – 8 of 8) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.h | 131 bool shouldClusterMemOps(MachineInstr &FirstLdSt, unsigned BaseReg1,
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| D | AArch64InstrInfo.cpp | 2360 unsigned BaseReg1, in shouldClusterMemOps() argument
2364 if (BaseReg1 != BaseReg2) in shouldClusterMemOps()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 376 static bool memOpsHaveSameBasePtr(const MachineInstr &MI1, unsigned BaseReg1, in memOpsHaveSameBasePtr() argument
378 if (BaseReg1 == BaseReg2) in memOpsHaveSameBasePtr()
405 unsigned BaseReg1, in shouldClusterMemOps() argument
409 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseReg1, SecondLdSt, BaseReg2)) in shouldClusterMemOps()
2120 unsigned BaseReg0, BaseReg1; in checkInstOffsetsDoNotOverlap() local
2124 getMemOpBaseRegImmOfs(MIb, BaseReg1, Offset1, &RI)) { in checkInstOffsetsDoNotOverlap()
2132 if (BaseReg0 == BaseReg1 && in checkInstOffsetsDoNotOverlap()
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| D | SIInstrInfo.h | 167 bool shouldClusterMemOps(MachineInstr &FirstLdSt, unsigned BaseReg1,
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 1149 virtual bool shouldClusterMemOps(MachineInstr &FirstLdSt, unsigned BaseReg1, in shouldClusterMemOps() argument
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 1343 unsigned BaseReg0, BaseReg1; in checkInstOffsetsDoNotOverlap() local
1347 getMemOpBaseRegImmOfs(MIb, BaseReg1, Offset1, &RI)) { in checkInstOffsetsDoNotOverlap()
1355 if (BaseReg0 == BaseReg1 && in checkInstOffsetsDoNotOverlap()
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| /external/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 1024 unsigned BaseReg1, BaseReg2; in addLoopCarriedDependences() local
1026 if (!TII->getMemOpBaseRegImmOfs(LdMI, BaseReg1, Offset1, TRI) || in addLoopCarriedDependences()
1031 if (BaseReg1 == BaseReg2 && (int)Offset1 < (int)Offset2) { in addLoopCarriedDependences()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 1104 unsigned BaseReg1, BaseReg2; in addLoopCarriedDependences() local
1106 if (TII->getMemOpBaseRegImmOfs(LdMI, BaseReg1, Offset1, TRI) && in addLoopCarriedDependences()
1108 if (BaseReg1 == BaseReg2 && (int)Offset1 < (int)Offset2) { in addLoopCarriedDependences()
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