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/external/swiftshader/third_party/LLVM/include/llvm/ADT/
DBitVector.h26 class BitVector {
38 friend class BitVector; variable
46 reference(BitVector &b, unsigned Idx) { in reference()
73 BitVector() : Size(0), Capacity(0) { in BitVector() function
79 explicit BitVector(unsigned s, bool t = false) : Size(s) { in Size()
88 BitVector(const BitVector &RHS) : Size(RHS.size()) { in BitVector() function
100 ~BitVector() { in ~BitVector()
224 BitVector &set() { in set()
230 BitVector &set(unsigned Idx) { in set()
235 BitVector &reset() { in reset()
[all …]
DSmallBitVector.h87 BitVector *getPointer() const { in getPointer()
89 return reinterpret_cast<BitVector *>(X); in getPointer()
98 void switchToLarge(BitVector *BV) { in switchToLarge()
144 switchToLarge(new BitVector(s, t));
152 switchToLarge(new BitVector(*RHS.getPointer())); in SmallBitVector()
254 BitVector *BV = new BitVector(N, t);
267 BitVector *BV = new BitVector(SmallSize); in reserve()
413 switchToLarge(new BitVector(*RHS.getPointer()));
/external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-exegesis/lib/
DRegisterAliasing.h28 llvm::BitVector getAliasedBits(const llvm::MCRegisterInfo &RegInfo,
29 const llvm::BitVector &SourceBits);
44 const llvm::BitVector &ReservedReg,
51 const llvm::BitVector &sourceBits() const { return SourceBits; } in sourceBits()
54 const llvm::BitVector &aliasedBits() const { return AliasedBits; } in aliasedBits()
67 const llvm::BitVector &OriginalBits);
69 llvm::BitVector SourceBits;
70 llvm::BitVector AliasedBits;
78 const llvm::BitVector &ReservedReg);
81 const llvm::BitVector &emptyRegisters() const { return EmptyRegisters; } in emptyRegisters()
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DRegisterAliasing.cpp14 llvm::BitVector getAliasedBits(const llvm::MCRegisterInfo &RegInfo, in getAliasedBits()
15 const llvm::BitVector &SourceBits) { in getAliasedBits()
16 llvm::BitVector AliasedBits(RegInfo.getNumRegs()); in getAliasedBits()
33 const llvm::MCRegisterInfo &RegInfo, const llvm::BitVector &ReservedReg, in RegisterAliasingTracker()
50 const llvm::MCRegisterInfo &RegInfo, const llvm::BitVector &SourceBits) { in FillOriginAndAliasedBits()
62 const llvm::MCRegisterInfo &RegInfo, const llvm::BitVector &ReservedReg) in RegisterAliasingTrackerCache()
/external/swiftshader/third_party/llvm-subzero/include/llvm/ADT/
DBitVector.h28 class BitVector {
44 friend class BitVector; variable
50 reference(BitVector &b, unsigned Idx) { in reference()
78 BitVector() : Size(0), Capacity(0) { in BitVector() function
84 explicit BitVector(unsigned s, bool t = false) : Size(s) { in Size()
93 BitVector(const BitVector &RHS) : Size(RHS.size()) { in BitVector() function
105 BitVector(BitVector &&RHS) in BitVector() function
111 ~BitVector() { in ~BitVector()
219 BitVector &set() { in set()
225 BitVector &set(unsigned Idx) { in set()
[all …]
/external/llvm/include/llvm/ADT/
DBitVector.h27 class BitVector {
43 friend class BitVector; variable
51 reference(BitVector &b, unsigned Idx) { in reference()
78 BitVector() : Size(0), Capacity(0) { in BitVector() function
84 explicit BitVector(unsigned s, bool t = false) : Size(s) { in Size()
93 BitVector(const BitVector &RHS) : Size(RHS.size()) { in BitVector() function
105 BitVector(BitVector &&RHS) in BitVector() function
111 ~BitVector() { in ~BitVector()
219 BitVector &set() { in set()
225 BitVector &set(unsigned Idx) { in set()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ADT/
DBitVector.h74 class BitVector {
89 friend class BitVector; variable
95 reference(BitVector &b, unsigned Idx) { in reference()
121 typedef const_set_bits_iterator_impl<BitVector> const_set_bits_iterator;
135 BitVector() : Size(0) {} in BitVector() function
139 explicit BitVector(unsigned s, bool t = false) : Size(s) { in Size()
148 BitVector(const BitVector &RHS) : Size(RHS.size()) { in BitVector() function
159 BitVector(BitVector &&RHS) : Bits(RHS.Bits), Size(RHS.Size) { in BitVector() function
164 ~BitVector() { std::free(Bits.data()); } in ~BitVector()
398 BitVector &set() { in set()
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DRegisterScavenging.h60 BitVector CalleeSavedRegs;
64 BitVector ReservedRegs;
69 BitVector RegsAvailable;
99 void getRegsUsed(BitVector &used, bool includeReserved);
103 BitVector getRegsAvailable(const TargetRegisterClass *RC);
141 void setUsed(BitVector &Regs) { in setUsed()
144 void setUnused(BitVector &Regs) { in setUnused()
149 void addRegWithSubRegs(BitVector &BV, unsigned Reg);
152 void addRegWithAliases(BitVector &BV, unsigned Reg);
160 BitVector &Candidates,
/external/tensorflow/tensorflow/compiler/xla/service/
Dhlo_reachability.h109 class BitVector {
111 BitVector() = default;
112 BitVector(size_t size) in BitVector() function
128 void OrWith(const BitVector& other) { in OrWith()
137 bool operator==(const BitVector& other) const {
140 bool operator!=(const BitVector& other) const {
155 const BitVector& GetBitVector(const HloInstruction* instruction) const { in GetBitVector()
158 BitVector& GetBitVector(const HloInstruction* instruction) { in GetBitVector()
165 const HloInstruction* instruction, BitVector* bit_vector);
188 std::vector<BitVector> bit_vectors_;
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/external/deqp-deps/SPIRV-Tools/test/util/
Dbit_vector_test.cpp28 BitVector bvec; in TEST()
38 BitVector bvec; in TEST()
58 BitVector bvec; in TEST()
72 BitVector bvec; in TEST()
97 BitVector bvec; in TEST()
114 BitVector bvec1; in TEST()
118 BitVector bvec2; in TEST()
134 BitVector bvec1; in TEST()
138 BitVector bvec2; in TEST()
151 BitVector bvec1; in TEST()
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/external/swiftshader/third_party/SPIRV-Tools/test/util/
Dbit_vector_test.cpp28 BitVector bvec; in TEST()
38 BitVector bvec; in TEST()
58 BitVector bvec; in TEST()
72 BitVector bvec; in TEST()
97 BitVector bvec; in TEST()
114 BitVector bvec1; in TEST()
118 BitVector bvec2; in TEST()
134 BitVector bvec1; in TEST()
138 BitVector bvec2; in TEST()
151 BitVector bvec1; in TEST()
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/external/v8/src/
Dbit-vector.h14 class BitVector : public ZoneObject {
26 explicit Iterator(BitVector* target) in Iterator()
60 BitVector* target_;
65 friend class BitVector; variable
73 BitVector() : length_(0), data_length_(kDataLengthForInline), data_(0) {} in BitVector() function
75 BitVector(int length, Zone* zone) in BitVector() function
85 BitVector(const BitVector& other, Zone* zone) in BitVector() function
107 void CopyFrom(const BitVector& other) { in CopyFrom()
163 void Union(const BitVector& other) { in Union()
175 bool UnionIsChanged(const BitVector& other) { in UnionIsChanged()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Support/
DGlobPattern.cpp28 static Expected<BitVector> expand(StringRef S, StringRef Original) { in expand()
29 BitVector BV(256, false); in expand()
67 static Expected<BitVector> scan(StringRef &S, StringRef Original) { in scan()
73 return BitVector(); in scan()
76 return BitVector(256, true); in scan()
86 Expected<BitVector> BV = expand(Chars.substr(1), Original); in scan()
94 BitVector BV(256, false); in scan()
127 Expected<BitVector> BV = scan(S, Original); in create()
146 bool GlobPattern::matchOne(ArrayRef<BitVector> Pats, StringRef S) const { in matchOne()
/external/llvm/include/llvm/CodeGen/
DRegisterScavenging.h64 BitVector RegUnitsAvailable;
68 BitVector KillRegUnits, DefRegUnits;
69 BitVector TmpRegUnits;
110 BitVector getRegsAvailable(const TargetRegisterClass *RC);
157 void setUsed(BitVector &RegUnits) { in setUsed()
160 void setUnused(BitVector &RegUnits) { in setUnused()
169 void addRegUnits(BitVector &BV, unsigned Reg);
176 BitVector &Candidates,
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DRegisterScavenging.h68 BitVector KillRegUnits, DefRegUnits;
69 BitVector TmpRegUnits;
126 BitVector getRegsAvailable(const TargetRegisterClass *RC);
186 void setUsed(const BitVector &RegUnits) { in setUsed()
189 void setUnused(const BitVector &RegUnits) { in setUnused()
198 void addRegUnits(BitVector &BV, unsigned Reg);
201 void removeRegUnits(BitVector &BV, unsigned Reg);
208 BitVector &Candidates,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DSafeStackColoring.h44 BitVector Begin;
47 BitVector End;
50 BitVector LiveIn;
53 BitVector LiveOut;
60 BitVector bv;
98 BitVector InterestingAllocas;
141 static inline raw_ostream &operator<<(raw_ostream &OS, const BitVector &V) {
/external/llvm/lib/CodeGen/
DSafeStackColoring.h37 BitVector Begin;
39 BitVector End;
41 BitVector LiveIn;
43 BitVector LiveOut;
50 BitVector bv;
82 BitVector InterestingAllocas;
125 static inline raw_ostream &operator<<(raw_ostream &OS, const BitVector &V) {
/external/deqp-deps/SPIRV-Tools/source/util/
Dbit_vector.cpp23 void BitVector::ReportDensity(std::ostream& out) { in ReportDensity()
41 bool BitVector::Or(const BitVector& other) { in Or()
64 std::ostream& operator<<(std::ostream& out, const BitVector& bv) { in operator <<()
67 BitVector::BitContainer b = bv.bits_[i]; in operator <<()
71 out << ' ' << i * BitVector::kBitContainerSize + j; in operator <<()
/external/swiftshader/third_party/SPIRV-Tools/source/util/
Dbit_vector.cpp23 void BitVector::ReportDensity(std::ostream& out) { in ReportDensity()
41 bool BitVector::Or(const BitVector& other) { in Or()
64 std::ostream& operator<<(std::ostream& out, const BitVector& bv) { in operator <<()
67 BitVector::BitContainer b = bv.bits_[i]; in operator <<()
71 out << ' ' << i * BitVector::kBitContainerSize + j; in operator <<()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DRegisterScavenging.cpp74 BitVector PR = MBB->getParent()->getFrameInfo()->getPristineRegs(MBB); in initRegState()
111 void RegScavenger::addRegWithSubRegs(BitVector &BV, unsigned Reg) { in addRegWithSubRegs()
117 void RegScavenger::addRegWithAliases(BitVector &BV, unsigned Reg) { in addRegWithAliases()
151 BitVector EarlyClobberRegs(NumPhysRegs); in forward()
152 BitVector KillRegs(NumPhysRegs); in forward()
153 BitVector DefRegs(NumPhysRegs); in forward()
154 BitVector DeadRegs(NumPhysRegs); in forward()
231 void RegScavenger::getRegsUsed(BitVector &used, bool includeReserved) { in getRegsUsed()
251 BitVector RegScavenger::getRegsAvailable(const TargetRegisterClass *RC) { in getRegsAvailable()
252 BitVector Mask(TRI->getNumRegs()); in getRegsAvailable()
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/external/swiftshader/third_party/SPIRV-Tools/source/opt/
Dvector_dce.h29 using LiveComponentMap = std::unordered_map<uint32_t, utils::BitVector>;
39 utils::BitVector components;
86 const utils::BitVector& live_components);
108 const utils::BitVector& live_elements,
132 const utils::BitVector& live_elements,
145 utils::BitVector all_components_live_;
/external/llvm/lib/Target/Hexagon/
DHexagonGenMux.cpp67 BitVector Defs, Uses;
69 DefUseInfo(const BitVector &D, const BitVector &U) : Defs(D), Uses(U) {} in DefUseInfo()
89 void getSubRegs(unsigned Reg, BitVector &SRs) const;
90 void expandReg(unsigned Reg, BitVector &Set) const;
91 void getDefsUses(const MachineInstr *MI, BitVector &Defs,
92 BitVector &Uses) const;
108 void HexagonGenMux::getSubRegs(unsigned Reg, BitVector &SRs) const { in getSubRegs()
114 void HexagonGenMux::expandReg(unsigned Reg, BitVector &Set) const { in expandReg()
122 void HexagonGenMux::getDefsUses(const MachineInstr *MI, BitVector &Defs, in getDefsUses()
123 BitVector &Uses) const { in getDefsUses()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonGenMux.cpp101 BitVector Defs, Uses;
104 DefUseInfo(const BitVector &D, const BitVector &U) : Defs(D), Uses(U) {} in DefUseInfo()
128 void getSubRegs(unsigned Reg, BitVector &SRs) const;
129 void expandReg(unsigned Reg, BitVector &Set) const;
130 void getDefsUses(const MachineInstr *MI, BitVector &Defs,
131 BitVector &Uses) const;
147 void HexagonGenMux::getSubRegs(unsigned Reg, BitVector &SRs) const { in getSubRegs()
152 void HexagonGenMux::expandReg(unsigned Reg, BitVector &Set) const { in expandReg()
159 void HexagonGenMux::getDefsUses(const MachineInstr *MI, BitVector &Defs, in getDefsUses()
160 BitVector &Uses) const { in getDefsUses()
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/external/swiftshader/third_party/LLVM/unittests/ADT/
DBitVectorTest.cpp21 BitVector Vec; in TEST()
45 BitVector Inv = ~Vec; in TEST()
79 BitVector Copy = Vec; in TEST()
80 BitVector Alt(3, false); in TEST()
134 Inv = ~BitVector(); in TEST()
152 BitVector A; in TEST()
157 BitVector B; in TEST()
191 BitVector Vec(3); in TEST()
/external/deqp-deps/SPIRV-Tools/source/opt/
Dvector_dce.h29 using LiveComponentMap = std::unordered_map<uint32_t, utils::BitVector>;
39 utils::BitVector components;
85 const utils::BitVector& live_components);
107 const utils::BitVector& live_elements,
143 utils::BitVector all_components_live_;

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