/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
D | TargetSchedule.td | 29 class Bypass; 30 def NoBypass : Bypass; 109 list<Bypass> bypasses = []> { 113 list<Bypass> Bypasses = bypasses; 120 class ProcessorItineraries<list<FuncUnit> fu, list<Bypass> bp, 123 list<Bypass> BP = bp;
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/external/llvm/include/llvm/Target/ |
D | TargetItinerary.td | 32 class Bypass; 33 def NoBypass : Bypass; 112 list<Bypass> bypasses = [], int uops = 1> { 117 list<Bypass> Bypasses = bypasses; 126 class ProcessorItineraries<list<FuncUnit> fu, list<Bypass> bp, 129 list<Bypass> BP = bp;
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
D | TargetItinerary.td | 32 class Bypass; 33 def NoBypass : Bypass; 112 list<Bypass> bypasses = [], int uops = 1> { 117 list<Bypass> Bypasses = bypasses; 126 class ProcessorItineraries<list<FuncUnit> fu, list<Bypass> bp, 129 list<Bypass> BP = bp;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonSchedule.td | 10 def Hex_FWD : Bypass; 11 def HVX_FWD : Bypass;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCScheduleE500.td | 34 def E500_GPR_Bypass : Bypass; 35 def E500_CR_Bypass : Bypass; 36 def E500_DivBypass : Bypass;
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D | PPCScheduleE500mc.td | 39 def E500mc_GPR_Bypass : Bypass; 40 def E500mc_FPR_Bypass : Bypass; 41 def E500mc_CR_Bypass : Bypass;
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D | PPCScheduleE5500.td | 42 def E5500_GPR_Bypass : Bypass; 43 def E5500_FPR_Bypass : Bypass; 44 def E5500_CR_Bypass : Bypass;
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D | PPCSchedule440.td | 60 def P440_GPR_Bypass : Bypass; // The bypass for general-purpose regs. 61 def P440_FPR_Bypass : Bypass; // The bypass for floating-point regs.
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/external/llvm/lib/Target/PowerPC/ |
D | PPCScheduleE500mc.td | 39 def E500_GPR_Bypass : Bypass; 40 def E500_FPR_Bypass : Bypass; 41 def E500_CR_Bypass : Bypass;
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D | PPCScheduleE5500.td | 42 def E5500_GPR_Bypass : Bypass; 43 def E5500_FPR_Bypass : Bypass; 44 def E5500_CR_Bypass : Bypass;
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D | PPCSchedule440.td | 60 def P440_GPR_Bypass : Bypass; // The bypass for general-purpose regs. 61 def P440_FPR_Bypass : Bypass; // The bypass for floating-point regs.
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/external/mesa3d/src/util/xmlpool/ |
D | nl.po | 197 msgid "Bypass the TCL pipeline" 202 "Bypass the TCL pipeline with state-based machine code generated on-the-fly"
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D | fr.po | 196 msgid "Bypass the TCL pipeline" 201 "Bypass the TCL pipeline with state-based machine code generated on-the-fly"
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D | sv.po | 195 msgid "Bypass the TCL pipeline" 200 "Bypass the TCL pipeline with state-based machine code generated on-the-fly"
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D | de.po | 202 msgid "Bypass the TCL pipeline" 207 "Bypass the TCL pipeline with state-based machine code generated on-the-fly"
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D | es.po | 209 msgid "Bypass the TCL pipeline" 214 "Bypass the TCL pipeline with state-based machine code generated on-the-fly"
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D | ca.po | 228 msgid "Bypass the TCL pipeline" 233 "Bypass the TCL pipeline with state-based machine code generated on-the-fly"
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/external/llvm/lib/Transforms/Vectorize/ |
D | LoopVectorize.cpp | 447 void emitMinimumIterationCountCheck(Loop *L, BasicBlock *Bypass); 449 void emitVectorLoopEnteredCheck(Loop *L, BasicBlock *Bypass); 452 void emitSCEVChecks(Loop *L, BasicBlock *Bypass); 454 void emitMemRuntimeChecks(Loop *L, BasicBlock *Bypass); 2833 BasicBlock *Bypass) { in emitMinimumIterationCountCheck() argument 2852 BranchInst::Create(Bypass, NewBB, CheckMinIters)); in emitMinimumIterationCountCheck() 2857 BasicBlock *Bypass) { in emitVectorLoopEnteredCheck() argument 2877 BranchInst::Create(Bypass, NewBB, Cmp)); in emitVectorLoopEnteredCheck() 2881 void InnerLoopVectorizer::emitSCEVChecks(Loop *L, BasicBlock *Bypass) { in emitSCEVChecks() argument 2887 SCEVExpander Exp(*PSE.getSE(), Bypass->getModule()->getDataLayout(), in emitSCEVChecks() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Vectorize/ |
D | LoopVectorize.cpp | 578 void emitMinimumIterationCountCheck(Loop *L, BasicBlock *Bypass); 582 void emitSCEVChecks(Loop *L, BasicBlock *Bypass); 585 void emitMemRuntimeChecks(Loop *L, BasicBlock *Bypass); 2701 BasicBlock *Bypass) { in emitMinimumIterationCountCheck() argument 2724 BranchInst::Create(Bypass, NewBB, CheckMinIters)); in emitMinimumIterationCountCheck() 2728 void InnerLoopVectorizer::emitSCEVChecks(Loop *L, BasicBlock *Bypass) { in emitSCEVChecks() argument 2734 SCEVExpander Exp(*PSE.getSE(), Bypass->getModule()->getDataLayout(), in emitSCEVChecks() 2753 BranchInst::Create(Bypass, NewBB, SCEVCheck)); in emitSCEVChecks() 2758 void InnerLoopVectorizer::emitMemRuntimeChecks(Loop *L, BasicBlock *Bypass) { in emitMemRuntimeChecks() argument 2781 BranchInst::Create(Bypass, NewBB, MemRuntimeCheck)); in emitMemRuntimeChecks()
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/external/u-boot/drivers/serial/ |
D | Kconfig | 421 bool "Bypass output when no connection" 424 Bypass console output and keep going even if there is no JTAG
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/external/iputils/doc/ |
D | ping.sgml | 333 Bypass the normal routing tables and send directly to a host on an attached
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | SpeculativeLoadHardening.md | 238 ### Variant #1.1 and #1.2 attacks: "Bounds Check Bypass Store" 241 The primary technique is known as "Bounds Check Bypass Store" and is discussed
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMScheduleA9.td | 32 def A9_LdBypass : Bypass;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMScheduleA9.td | 36 def A9_LdBypass : Bypass;
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/external/llvm/lib/Target/ARM/ |
D | ARMScheduleA9.td | 36 def A9_LdBypass : Bypass;
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