| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | InfoByHwMode.cpp | 33 ValueTypeByHwMode::ValueTypeByHwMode(Record *R, const CodeGenHwModes &CGH) { in ValueTypeByHwMode() argument
34 const HwModeSelect &MS = CGH.getHwModeSelect(R); in ValueTypeByHwMode()
106 const CodeGenHwModes &CGH) { in getValueTypeByHwMode() argument
114 return ValueTypeByHwMode(Rec, CGH); in getValueTypeByHwMode()
118 RegSizeInfo::RegSizeInfo(Record *R, const CodeGenHwModes &CGH) { in RegSizeInfo() argument
141 const CodeGenHwModes &CGH) { in RegSizeInfoByHwMode() argument
142 const HwModeSelect &MS = CGH.getHwModeSelect(R); in RegSizeInfoByHwMode()
144 auto I = Map.insert({P.first, RegSizeInfo(P.second, CGH)}); in RegSizeInfoByHwMode()
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| D | InfoByHwMode.h | 120 ValueTypeByHwMode(Record *R, const CodeGenHwModes &CGH);
139 const CodeGenHwModes &CGH);
146 RegSizeInfo(Record *R, const CodeGenHwModes &CGH);
162 RegSizeInfoByHwMode(Record *R, const CodeGenHwModes &CGH);
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| D | CodeGenHwModes.cpp | 32 HwModeSelect::HwModeSelect(Record *R, CodeGenHwModes &CGH) { in HwModeSelect() argument
42 unsigned ModeId = CGH.getHwModeId(Modes[i]->getName()); in HwModeSelect()
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| D | CodeGenTarget.h | 57 CodeGenHwModes CGH; variable
132 const CodeGenHwModes &getHwModes() const { return CGH; } in getHwModes()
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| D | CodeGenHwModes.h | 36 HwModeSelect(Record *R, CodeGenHwModes &CGH);
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| D | RegisterInfoEmitter.cpp | 1193 const CodeGenHwModes &CGH = Target.getHwModes(); in runTargetDesc() local
1194 unsigned NumModes = CGH.getNumModeIds(); in runTargetDesc()
1241 OS << CGH.getMode(M).Name; in runTargetDesc()
1582 const CodeGenHwModes &CGH = Target.getHwModes(); in debugDump() local
1583 unsigned NumModes = CGH.getNumModeIds(); in debugDump()
1584 auto getModeName = [CGH] (unsigned M) -> StringRef { in debugDump()
1587 return CGH.getMode(M).Name; in debugDump()
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| D | CodeGenDAGPatterns.cpp | 1331 SDTypeConstraint::SDTypeConstraint(Record *R, const CodeGenHwModes &CGH) { in SDTypeConstraint() argument
1336 VVT = getValueTypeByHwMode(R->getValueAsDef("VT"), CGH); in SDTypeConstraint()
1368 VVT = getValueTypeByHwMode(R->getValueAsDef("VT"), CGH); in SDTypeConstraint()
1607 SDNodeInfo::SDNodeInfo(Record *R, const CodeGenHwModes &CGH) : Def(R) { in SDNodeInfo() argument
1621 TypeConstraints.emplace_back(R, CGH); in SDNodeInfo()
2057 const CodeGenHwModes &CGH = CDP.getTargetInfo().getHwModes(); in getImplicitType() local
2058 return TypeSetByHwMode(getValueTypeByHwMode(R, CGH)); in getImplicitType()
2087 const CodeGenHwModes &CGH = CDP.getTargetInfo().getHwModes(); in getImplicitType() local
2089 return TypeSetByHwMode(getValueTypeByHwMode(T, CGH)); in getImplicitType()
2649 const CodeGenHwModes &CGH = getDAGPatterns().getTargetInfo().getHwModes(); in ParseTreePattern() local
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| D | CodeGenRegisters.h | 521 const CodeGenHwModes &CGH; variable
613 const CodeGenHwModes &getHwModes() const { return CGH; } in getHwModes()
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| D | SubtargetEmitter.cpp | 1617 const CodeGenHwModes &CGH = TGT.getHwModes(); in EmitHwModeCheck() local
1618 assert(CGH.getNumModeIds() > 0); in EmitHwModeCheck()
1619 if (CGH.getNumModeIds() == 1) in EmitHwModeCheck()
1623 for (unsigned M = 1, NumModes = CGH.getNumModeIds(); M != NumModes; ++M) { in EmitHwModeCheck()
1624 const HwMode &HM = CGH.getMode(M); in EmitHwModeCheck()
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| D | CodeGenDAGPatterns.h | 366 SDTypeConstraint(Record *R, const CodeGenHwModes &CGH);
424 SDNodeInfo(Record *R, const CodeGenHwModes &CGH);
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| D | CodeGenTarget.cpp | 197 : Records(records), CGH(records) { in CodeGenTarget()
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| D | CodeGenRegisters.cpp | 1086 const CodeGenHwModes &Modes) : CGH(Modes) { in CodeGenRegBank()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
| D | int-cmp-04.ll | 6 ; Check CGH with no displacement.
19 ; Check the high end of the aligned CGH range.
49 ; Check the high end of the negative aligned CGH range.
63 ; Check the low end of the CGH range.
93 ; Check that CGH allows an index.
109 ; Check the comparison can be reversed if that allows CGH to be used.
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| /external/llvm/test/CodeGen/SystemZ/ |
| D | int-cmp-04.ll | 6 ; Check CGH with no displacement.
19 ; Check the high end of the aligned CGH range.
49 ; Check the high end of the negative aligned CGH range.
63 ; Check the low end of the CGH range.
93 ; Check that CGH allows an index.
109 ; Check the comparison can be reversed if that allows CGH to be used.
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| /external/v8/src/s390/ |
| D | simulator-s390.h | 1006 EVALUATE(CGH);
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| D | constants-s390.h | 864 V(cgh, CGH, 0xE334) /* type = RXY_A COMPARE HALFWORD (64<-16) */ \
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| D | simulator-s390.cc | 1294 EvalTable[CGH] = &Simulator::Evaluate_CGH; in EvalTableInit()
7969 EVALUATE(CGH) { in EVALUATE() argument
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| /external/capstone/arch/SystemZ/ |
| D | SystemZGenAsmWriter.inc | 435 13636932U, // CGH
1762 // C, CDB, CEB, CG, CGF, CGH, CH, CHF, CHY, CL, CLG, CLGF, CLHF, CLY, CY,...
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| D | SystemZGenDisassemblerTables.inc | 1051 /* 850 */ MCD_OPC_Decode, 158, 3, 109, // Opcode: CGH
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZScheduleZ196.td | 511 def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], (instregex "CGH$")>;
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| D | SystemZScheduleZEC12.td | 521 def : InstRW<[WLat2LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CGH$")>;
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| D | SystemZScheduleZ13.td | 545 def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>;
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| D | SystemZScheduleZ14.td | 554 def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>;
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| D | SystemZInstrInfo.td | 1459 def CGH : CompareRXY<"cgh", 0xE334, z_scmp, GR64, asextloadi16, 2>;
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.td | 1301 def CGH : CompareRXY<"cgh", 0xE334, z_scmp, GR64, asextloadi16, 2>;
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