1//=- SystemZScheduleZ196.td - SystemZ Scheduling Definitions ---*- tblgen -*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the machine model for Z196 to support instruction 11// scheduling and other instruction cost heuristics. 12// 13// Pseudos expanded right after isel do not need to be modelled here. 14// 15//===----------------------------------------------------------------------===// 16 17def Z196Model : SchedMachineModel { 18 19 let UnsupportedFeatures = Arch9UnsupportedFeatures.List; 20 21 let IssueWidth = 3; 22 let MicroOpBufferSize = 40; // Issue queues 23 let LoadLatency = 1; // Optimistic load latency. 24 25 let PostRAScheduler = 1; 26 27 // Extra cycles for a mispredicted branch. 28 let MispredictPenalty = 16; 29} 30 31let SchedModel = Z196Model in { 32// These definitions need the SchedModel value. They could be put in a 33// subtarget common include file, but it seems the include system in Tablegen 34// currently (2016) rejects multiple includes of same file. 35 36// Decoder grouping rules 37let NumMicroOps = 1 in { 38 def : WriteRes<NormalGr, []>; 39 def : WriteRes<BeginGroup, []> { let BeginGroup = 1; } 40 def : WriteRes<EndGroup, []> { let EndGroup = 1; } 41} 42def : WriteRes<Cracked, []> { 43 let NumMicroOps = 2; 44 let BeginGroup = 1; 45} 46def : WriteRes<GroupAlone, []> { 47 let NumMicroOps = 3; 48 let BeginGroup = 1; 49 let EndGroup = 1; 50} 51 52// Incoming latency removed from the register operand which is used together 53// with a memory operand by the instruction. 54def : ReadAdvance<RegReadAdv, 4>; 55 56// LoadLatency (above) is not used for instructions in this file. This is 57// instead the role of LSULatency, which is the latency value added to the 58// result of loads and instructions with folded memory operands. 59def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; } 60 61let NumMicroOps = 0 in { 62 foreach L = 1-30 in { 63 def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; } 64 } 65} 66 67// Execution units. 68def Z196_FXUnit : ProcResource<2>; 69def Z196_LSUnit : ProcResource<2>; 70def Z196_FPUnit : ProcResource<1>; 71def Z196_DFUnit : ProcResource<1>; 72def Z196_MCD : ProcResource<1>; 73 74// Subtarget specific definitions of scheduling resources. 75let NumMicroOps = 0 in { 76 def : WriteRes<FXU, [Z196_FXUnit]>; 77 def : WriteRes<LSU, [Z196_LSUnit]>; 78 def : WriteRes<FPU, [Z196_FPUnit]>; 79 def : WriteRes<DFU, [Z196_DFUnit]>; 80 foreach Num = 2-6 in { let ResourceCycles = [Num] in { 81 def : WriteRes<!cast<SchedWrite>("FXU"#Num), [Z196_FXUnit]>; 82 def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z196_LSUnit]>; 83 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [Z196_FPUnit]>; 84 def : WriteRes<!cast<SchedWrite>("DFU"#Num), [Z196_DFUnit]>; 85 }} 86} 87 88def : WriteRes<MCD, [Z196_MCD]> { let NumMicroOps = 3; 89 let BeginGroup = 1; 90 let EndGroup = 1; } 91 92// -------------------------- INSTRUCTIONS ---------------------------------- // 93 94// InstRW constructs have been used in order to preserve the 95// readability of the InstrInfo files. 96 97// For each instruction, as matched by a regexp, provide a list of 98// resources that it needs. These will be combined into a SchedClass. 99 100//===----------------------------------------------------------------------===// 101// Stack allocation 102//===----------------------------------------------------------------------===// 103 104def : InstRW<[WLat1, FXU, NormalGr], (instregex "ADJDYNALLOC$")>; // Pseudo -> LA / LAY 105 106//===----------------------------------------------------------------------===// 107// Branch instructions 108//===----------------------------------------------------------------------===// 109 110// Branch 111def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Call)?BRC(L)?(Asm.*)?$")>; 112def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Call)?J(G)?(Asm.*)?$")>; 113def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Call)?BC(R)?(Asm.*)?$")>; 114def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Call)?B(R)?(Asm.*)?$")>; 115def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "BRCT(G|H)?$")>; 116def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "BCT(G)?(R)?$")>; 117def : InstRW<[WLat1, FXU3, LSU, GroupAlone], 118 (instregex "B(R)?X(H|L).*$")>; 119 120// Compare and branch 121def : InstRW<[WLat1, FXU, LSU, GroupAlone], 122 (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>; 123def : InstRW<[WLat1, FXU, LSU, GroupAlone], 124 (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>; 125 126//===----------------------------------------------------------------------===// 127// Trap instructions 128//===----------------------------------------------------------------------===// 129 130// Trap 131def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Cond)?Trap$")>; 132 133// Compare and trap 134def : InstRW<[WLat1, FXU, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>; 135def : InstRW<[WLat1, FXU, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>; 136def : InstRW<[WLat1, FXU, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>; 137 138//===----------------------------------------------------------------------===// 139// Call and return instructions 140//===----------------------------------------------------------------------===// 141 142// Call 143def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "(Call)?BRAS$")>; 144def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "(Call)?BRASL$")>; 145def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "(Call)?BAS(R)?$")>; 146def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "TLS_(G|L)DCALL$")>; 147 148// Return 149def : InstRW<[WLat1, LSU, EndGroup], (instregex "Return$")>; 150def : InstRW<[WLat1, LSU, EndGroup], (instregex "CondReturn$")>; 151 152//===----------------------------------------------------------------------===// 153// Move instructions 154//===----------------------------------------------------------------------===// 155 156// Moves 157def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "MV(G|H)?HI$")>; 158def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "MVI(Y)?$")>; 159 160// Move character 161def : InstRW<[WLat1, FXU, LSU3, GroupAlone], (instregex "MVC$")>; 162def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>; 163 164// Pseudo -> reg move 165def : InstRW<[WLat1, FXU, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>; 166def : InstRW<[WLat1, FXU, NormalGr], (instregex "EXTRACT_SUBREG$")>; 167def : InstRW<[WLat1, FXU, NormalGr], (instregex "INSERT_SUBREG$")>; 168def : InstRW<[WLat1, FXU, NormalGr], (instregex "REG_SEQUENCE$")>; 169 170// Loads 171def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>; 172def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>; 173def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>; 174 175def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLIH(F|H|L)$")>; 176def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLIL(F|H|L)$")>; 177 178def : InstRW<[WLat1, FXU, NormalGr], (instregex "LG(F|H)I$")>; 179def : InstRW<[WLat1, FXU, NormalGr], (instregex "LHI(Mux)?$")>; 180def : InstRW<[WLat1, FXU, NormalGr], (instregex "LR(Mux)?$")>; 181 182// Load and test 183def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXU, NormalGr], (instregex "LT(G)?$")>; 184def : InstRW<[WLat1, FXU, NormalGr], (instregex "LT(G)?R$")>; 185 186// Stores 187def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STG(RL)?$")>; 188def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "ST128$")>; 189def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>; 190 191// String moves. 192def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>; 193 194//===----------------------------------------------------------------------===// 195// Conditional move instructions 196//===----------------------------------------------------------------------===// 197 198def : InstRW<[WLat2, FXU, EndGroup], (instregex "LOC(G)?R(Asm.*)?$")>; 199def : InstRW<[WLat2LSU, RegReadAdv, FXU, LSU, EndGroup], 200 (instregex "LOC(G)?(Asm.*)?$")>; 201def : InstRW<[WLat1, FXU, LSU, EndGroup], (instregex "STOC(G)?(Asm.*)?$")>; 202 203//===----------------------------------------------------------------------===// 204// Sign extensions 205//===----------------------------------------------------------------------===// 206 207def : InstRW<[WLat1, FXU, NormalGr], (instregex "L(B|H|G)R$")>; 208def : InstRW<[WLat1, FXU, NormalGr], (instregex "LG(B|H|F)R$")>; 209 210def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LTGF$")>; 211def : InstRW<[WLat1, FXU, NormalGr], (instregex "LTGFR$")>; 212 213def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LB(H|Mux)?$")>; 214def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LH(Y)?$")>; 215def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>; 216def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LG(B|H|F)$")>; 217def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LG(H|F)RL$")>; 218 219//===----------------------------------------------------------------------===// 220// Zero extensions 221//===----------------------------------------------------------------------===// 222 223def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLCR(Mux)?$")>; 224def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLHR(Mux)?$")>; 225def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLG(C|H|F|T)R$")>; 226def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>; 227def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>; 228def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LL(C|H)H$")>; 229def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>; 230def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>; 231 232//===----------------------------------------------------------------------===// 233// Truncations 234//===----------------------------------------------------------------------===// 235 236def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>; 237def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>; 238def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STCM(H|Y)?$")>; 239 240//===----------------------------------------------------------------------===// 241// Multi-register moves 242//===----------------------------------------------------------------------===// 243 244// Load multiple (estimated average of 5 ops) 245def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>; 246 247// Load multiple disjoint 248def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>; 249 250// Store multiple (estimated average of 3 ops) 251def : InstRW<[WLat1, LSU2, FXU5, GroupAlone], (instregex "STM(H|Y|G)?$")>; 252 253//===----------------------------------------------------------------------===// 254// Byte swaps 255//===----------------------------------------------------------------------===// 256 257def : InstRW<[WLat1, FXU, NormalGr], (instregex "LRV(G)?R$")>; 258def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LRV(G|H)?$")>; 259def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STRV(G|H)?$")>; 260def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>; 261 262//===----------------------------------------------------------------------===// 263// Load address instructions 264//===----------------------------------------------------------------------===// 265 266def : InstRW<[WLat1, FXU, NormalGr], (instregex "LA(Y|RL)?$")>; 267 268// Load the Global Offset Table address 269def : InstRW<[WLat1, FXU, NormalGr], (instregex "GOT$")>; 270 271//===----------------------------------------------------------------------===// 272// Absolute and Negation 273//===----------------------------------------------------------------------===// 274 275def : InstRW<[WLat2, WLat2, FXU, NormalGr], (instregex "LP(G)?R$")>; 276def : InstRW<[WLat3, WLat3, FXU2, GroupAlone], (instregex "L(N|P)GFR$")>; 277def : InstRW<[WLat2, WLat2, FXU, NormalGr], (instregex "LN(R|GR)$")>; 278def : InstRW<[WLat1, FXU, NormalGr], (instregex "LC(R|GR)$")>; 279def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "LCGFR$")>; 280 281//===----------------------------------------------------------------------===// 282// Insertion 283//===----------------------------------------------------------------------===// 284 285def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "IC(Y)?$")>; 286def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 287 (instregex "IC32(Y)?$")>; 288def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 289 (instregex "ICM(H|Y)?$")>; 290def : InstRW<[WLat1, FXU, NormalGr], (instregex "II(F|H|L)Mux$")>; 291def : InstRW<[WLat1, FXU, NormalGr], (instregex "IIHF(64)?$")>; 292def : InstRW<[WLat1, FXU, NormalGr], (instregex "IIHH(64)?$")>; 293def : InstRW<[WLat1, FXU, NormalGr], (instregex "IIHL(64)?$")>; 294def : InstRW<[WLat1, FXU, NormalGr], (instregex "IILF(64)?$")>; 295def : InstRW<[WLat1, FXU, NormalGr], (instregex "IILH(64)?$")>; 296def : InstRW<[WLat1, FXU, NormalGr], (instregex "IILL(64)?$")>; 297 298//===----------------------------------------------------------------------===// 299// Addition 300//===----------------------------------------------------------------------===// 301 302def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 303 (instregex "A(L)?(Y)?$")>; 304def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "A(L)?SI$")>; 305def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], 306 (instregex "AH(Y)?$")>; 307def : InstRW<[WLat1, FXU, NormalGr], (instregex "AIH$")>; 308def : InstRW<[WLat1, FXU, NormalGr], (instregex "AFI(Mux)?$")>; 309def : InstRW<[WLat1, FXU, NormalGr], (instregex "AGFI$")>; 310def : InstRW<[WLat1, FXU, NormalGr], (instregex "AGHI(K)?$")>; 311def : InstRW<[WLat1, FXU, NormalGr], (instregex "AGR(K)?$")>; 312def : InstRW<[WLat1, FXU, NormalGr], (instregex "AHI(K)?$")>; 313def : InstRW<[WLat1, FXU, NormalGr], (instregex "AHIMux(K)?$")>; 314def : InstRW<[WLat1, FXU, NormalGr], (instregex "AL(FI|HSIK)$")>; 315def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 316 (instregex "ALGF$")>; 317def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALGHSIK$")>; 318def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALGF(I|R)$")>; 319def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALGR(K)?$")>; 320def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALR(K)?$")>; 321def : InstRW<[WLat1, FXU, NormalGr], (instregex "AR(K)?$")>; 322def : InstRW<[WLat1, FXU, NormalGr], (instregex "A(L)?HHHR$")>; 323def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "A(L)?HHLR$")>; 324def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALSIH(N)?$")>; 325def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 326 (instregex "A(L)?G$")>; 327def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "A(L)?GSI$")>; 328 329// Logical addition with carry 330def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU, LSU, GroupAlone], 331 (instregex "ALC(G)?$")>; 332def : InstRW<[WLat2, WLat2, FXU, GroupAlone], (instregex "ALC(G)?R$")>; 333 334// Add with sign extension (32 -> 64) 335def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], 336 (instregex "AGF$")>; 337def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "AGFR$")>; 338 339//===----------------------------------------------------------------------===// 340// Subtraction 341//===----------------------------------------------------------------------===// 342 343def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 344 (instregex "S(G|Y)?$")>; 345def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], 346 (instregex "SH(Y)?$")>; 347def : InstRW<[WLat1, FXU, NormalGr], (instregex "SGR(K)?$")>; 348def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLFI$")>; 349def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 350 (instregex "SL(G|GF|Y)?$")>; 351def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLGF(I|R)$")>; 352def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLGR(K)?$")>; 353def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLR(K)?$")>; 354def : InstRW<[WLat1, FXU, NormalGr], (instregex "SR(K)?$")>; 355def : InstRW<[WLat1, FXU, NormalGr], (instregex "S(L)?HHHR$")>; 356def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "S(L)?HHLR$")>; 357 358// Subtraction with borrow 359def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU, LSU, GroupAlone], 360 (instregex "SLB(G)?$")>; 361def : InstRW<[WLat2, WLat2, FXU, GroupAlone], (instregex "SLB(G)?R$")>; 362 363// Subtraction with sign extension (32 -> 64) 364def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], 365 (instregex "SGF$")>; 366def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "SGFR$")>; 367 368//===----------------------------------------------------------------------===// 369// AND 370//===----------------------------------------------------------------------===// 371 372def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 373 (instregex "N(G|Y)?$")>; 374def : InstRW<[WLat1, FXU, NormalGr], (instregex "NGR(K)?$")>; 375def : InstRW<[WLat1, FXU, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>; 376def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "NI(Y)?$")>; 377def : InstRW<[WLat1, FXU, NormalGr], (instregex "NIHF(64)?$")>; 378def : InstRW<[WLat1, FXU, NormalGr], (instregex "NIHH(64)?$")>; 379def : InstRW<[WLat1, FXU, NormalGr], (instregex "NIHL(64)?$")>; 380def : InstRW<[WLat1, FXU, NormalGr], (instregex "NILF(64)?$")>; 381def : InstRW<[WLat1, FXU, NormalGr], (instregex "NILH(64)?$")>; 382def : InstRW<[WLat1, FXU, NormalGr], (instregex "NILL(64)?$")>; 383def : InstRW<[WLat1, FXU, NormalGr], (instregex "NR(K)?$")>; 384def : InstRW<[WLat5LSU, LSU2, FXU, GroupAlone], (instregex "NC$")>; 385 386//===----------------------------------------------------------------------===// 387// OR 388//===----------------------------------------------------------------------===// 389 390def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 391 (instregex "O(G|Y)?$")>; 392def : InstRW<[WLat1, FXU, NormalGr], (instregex "OGR(K)?$")>; 393def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "OI(Y)?$")>; 394def : InstRW<[WLat1, FXU, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>; 395def : InstRW<[WLat1, FXU, NormalGr], (instregex "OIHF(64)?$")>; 396def : InstRW<[WLat1, FXU, NormalGr], (instregex "OIHH(64)?$")>; 397def : InstRW<[WLat1, FXU, NormalGr], (instregex "OIHL(64)?$")>; 398def : InstRW<[WLat1, FXU, NormalGr], (instregex "OILF(64)?$")>; 399def : InstRW<[WLat1, FXU, NormalGr], (instregex "OILH(64)?$")>; 400def : InstRW<[WLat1, FXU, NormalGr], (instregex "OILL(64)?$")>; 401def : InstRW<[WLat1, FXU, NormalGr], (instregex "OR(K)?$")>; 402def : InstRW<[WLat5LSU, LSU2, FXU, GroupAlone], (instregex "OC$")>; 403 404//===----------------------------------------------------------------------===// 405// XOR 406//===----------------------------------------------------------------------===// 407 408def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 409 (instregex "X(G|Y)?$")>; 410def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "XI(Y)?$")>; 411def : InstRW<[WLat1, FXU, NormalGr], (instregex "XIFMux$")>; 412def : InstRW<[WLat1, FXU, NormalGr], (instregex "XGR(K)?$")>; 413def : InstRW<[WLat1, FXU, NormalGr], (instregex "XIHF(64)?$")>; 414def : InstRW<[WLat1, FXU, NormalGr], (instregex "XILF(64)?$")>; 415def : InstRW<[WLat1, FXU, NormalGr], (instregex "XR(K)?$")>; 416def : InstRW<[WLat5LSU, LSU2, FXU, GroupAlone], (instregex "XC$")>; 417 418//===----------------------------------------------------------------------===// 419// Multiplication 420//===----------------------------------------------------------------------===// 421 422def : InstRW<[WLat6LSU, RegReadAdv, FXU, LSU, NormalGr], 423 (instregex "MS(GF|Y)?$")>; 424def : InstRW<[WLat6, FXU, NormalGr], (instregex "MS(R|FI)$")>; 425def : InstRW<[WLat8LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "MSG$")>; 426def : InstRW<[WLat8, FXU, NormalGr], (instregex "MSGR$")>; 427def : InstRW<[WLat6, FXU, NormalGr], (instregex "MSGF(I|R)$")>; 428def : InstRW<[WLat11LSU, RegReadAdv, FXU2, LSU, GroupAlone], 429 (instregex "MLG$")>; 430def : InstRW<[WLat9, FXU2, GroupAlone], (instregex "MLGR$")>; 431def : InstRW<[WLat5, FXU, NormalGr], (instregex "MGHI$")>; 432def : InstRW<[WLat5, FXU, NormalGr], (instregex "MHI$")>; 433def : InstRW<[WLat5LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "MH(Y)?$")>; 434def : InstRW<[WLat7, FXU2, GroupAlone], (instregex "M(L)?R$")>; 435def : InstRW<[WLat7LSU, RegReadAdv, FXU2, LSU, GroupAlone], 436 (instregex "M(FY|L)?$")>; 437 438//===----------------------------------------------------------------------===// 439// Division and remainder 440//===----------------------------------------------------------------------===// 441 442def : InstRW<[WLat30, FPU4, FXU5, GroupAlone], (instregex "DR$")>; 443def : InstRW<[WLat30, RegReadAdv, FPU4, LSU, FXU4, GroupAlone], 444 (instregex "D$")>; 445def : InstRW<[WLat30, FPU4, FXU4, GroupAlone], (instregex "DSG(F)?R$")>; 446def : InstRW<[WLat30, RegReadAdv, FPU4, LSU, FXU3, GroupAlone], 447 (instregex "DSG(F)?$")>; 448def : InstRW<[WLat30, FPU4, FXU5, GroupAlone], (instregex "DL(G)?R$")>; 449def : InstRW<[WLat30, RegReadAdv, FPU4, LSU, FXU4, GroupAlone], 450 (instregex "DL(G)?$")>; 451 452//===----------------------------------------------------------------------===// 453// Shifts 454//===----------------------------------------------------------------------===// 455 456def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLL(G|K)?$")>; 457def : InstRW<[WLat1, FXU, NormalGr], (instregex "SRL(G|K)?$")>; 458def : InstRW<[WLat1, FXU, NormalGr], (instregex "SRA(G|K)?$")>; 459def : InstRW<[WLat2, WLat2, FXU, NormalGr], (instregex "SLA(G|K)?$")>; 460def : InstRW<[WLat5LSU, WLat5LSU, FXU4, LSU, GroupAlone], 461 (instregex "S(L|R)D(A|L)$")>; 462 463// Rotate 464def : InstRW<[WLat2LSU, FXU, LSU, NormalGr], (instregex "RLL(G)?$")>; 465 466// Rotate and insert 467def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBG(32)?$")>; 468def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBH(G|H|L)$")>; 469def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBL(G|H|L)$")>; 470def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBMux$")>; 471 472// Rotate and Select 473def : InstRW<[WLat3, WLat3, FXU2, GroupAlone], (instregex "R(N|O|X)SBG$")>; 474 475//===----------------------------------------------------------------------===// 476// Comparison 477//===----------------------------------------------------------------------===// 478 479def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "C(G|Y|Mux|RL)?$")>; 480def : InstRW<[WLat1, FXU, NormalGr], (instregex "C(F|H)I(Mux)?$")>; 481def : InstRW<[WLat1, FXU, NormalGr], (instregex "CG(F|H)I$")>; 482def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CG(HSI|RL)$")>; 483def : InstRW<[WLat1, FXU, NormalGr], (instregex "C(G)?R$")>; 484def : InstRW<[WLat1, FXU, NormalGr], (instregex "CIH$")>; 485def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CHF$")>; 486def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CHSI$")>; 487def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], 488 (instregex "CL(Y|Mux)?$")>; 489def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLFHSI$")>; 490def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLFI(Mux)?$")>; 491def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CLG$")>; 492def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>; 493def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CLGF$")>; 494def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLGFRL$")>; 495def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLGF(I|R)$")>; 496def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLGR$")>; 497def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLGRL$")>; 498def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CLHF$")>; 499def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>; 500def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLIH$")>; 501def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLI(Y)?$")>; 502def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLR$")>; 503def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLRL$")>; 504def : InstRW<[WLat1, FXU, NormalGr], (instregex "C(L)?HHR$")>; 505def : InstRW<[WLat2, FXU2, GroupAlone], (instregex "C(L)?HLR$")>; 506 507// Compare halfword 508def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], 509 (instregex "CH(Y)?$")>; 510def : InstRW<[WLat2LSU, FXU2, LSU, GroupAlone], (instregex "CHRL$")>; 511def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], (instregex "CGH$")>; 512def : InstRW<[WLat2LSU, FXU2, LSU, GroupAlone], (instregex "CGHRL$")>; 513def : InstRW<[WLat2LSU, FXU2, LSU, GroupAlone], (instregex "CHHSI$")>; 514 515// Compare with sign extension (32 -> 64) 516def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], (instregex "CGF$")>; 517def : InstRW<[WLat2LSU, FXU2, LSU, GroupAlone], (instregex "CGFRL$")>; 518def : InstRW<[WLat2, FXU2, GroupAlone], (instregex "CGFR$")>; 519 520// Compare logical character 521def : InstRW<[WLat9, FXU, LSU2, GroupAlone], (instregex "CLC$")>; 522def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>; 523def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>; 524 525// Test under mask 526def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "TM(Y)?$")>; 527def : InstRW<[WLat1, FXU, NormalGr], (instregex "TM(H|L)Mux$")>; 528def : InstRW<[WLat1, FXU, NormalGr], (instregex "TMHH(64)?$")>; 529def : InstRW<[WLat1, FXU, NormalGr], (instregex "TMHL(64)?$")>; 530def : InstRW<[WLat1, FXU, NormalGr], (instregex "TMLH(64)?$")>; 531def : InstRW<[WLat1, FXU, NormalGr], (instregex "TMLL(64)?$")>; 532 533// Compare logical characters under mask 534def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], 535 (instregex "CLM(H|Y)?$")>; 536 537//===----------------------------------------------------------------------===// 538// Prefetch 539//===----------------------------------------------------------------------===// 540 541def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PFD(RL)?$")>; 542 543//===----------------------------------------------------------------------===// 544// Atomic operations 545//===----------------------------------------------------------------------===// 546 547def : InstRW<[WLat1, LSU, EndGroup], (instregex "Serialize$")>; 548 549def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAA(G)?$")>; 550def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAAL(G)?$")>; 551def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAN(G)?$")>; 552def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAO(G)?$")>; 553def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAX(G)?$")>; 554 555// Test and set 556def : InstRW<[WLat1LSU, FXU, LSU, EndGroup], (instregex "TS$")>; 557 558// Compare and swap 559def : InstRW<[WLat2LSU, WLat2LSU, FXU2, LSU, GroupAlone], 560 (instregex "CS(G|Y)?$")>; 561 562// Compare double and swap 563def : InstRW<[WLat5LSU, WLat5LSU, FXU5, LSU, GroupAlone], 564 (instregex "CDS(Y)?$")>; 565def : InstRW<[WLat12, WLat12, FXU6, LSU2, GroupAlone], 566 (instregex "CDSG$")>; 567 568// Compare and swap and store 569def : InstRW<[WLat30, MCD], (instregex "CSST$")>; 570 571// Perform locked operation 572def : InstRW<[WLat30, MCD], (instregex "PLO$")>; 573 574// Load/store pair from/to quadword 575def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>; 576def : InstRW<[WLat1, FXU2, LSU2, GroupAlone], (instregex "STPQ$")>; 577 578// Load pair disjoint 579def : InstRW<[WLat2LSU, WLat2LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>; 580 581//===----------------------------------------------------------------------===// 582// Translate and convert 583//===----------------------------------------------------------------------===// 584 585def : InstRW<[WLat30, MCD], (instregex "TR$")>; 586def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT$")>; 587def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>; 588def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>; 589def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>; 590def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>; 591def : InstRW<[WLat30, WLat30, WLat30, MCD], 592 (instregex "CU(12|14|21|24|41|42)(Opt)?$")>; 593def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>; 594 595//===----------------------------------------------------------------------===// 596// Message-security assist 597//===----------------------------------------------------------------------===// 598 599def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], 600 (instregex "KM(C|F|O|CTR)?$")>; 601def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(KIMD|KLMD|KMAC|PCC)$")>; 602 603//===----------------------------------------------------------------------===// 604// Decimal arithmetic 605//===----------------------------------------------------------------------===// 606 607def : InstRW<[WLat30, RegReadAdv, FXU, DFU2, LSU2, GroupAlone], 608 (instregex "CVBG$")>; 609def : InstRW<[WLat20, RegReadAdv, FXU, DFU, LSU, GroupAlone], 610 (instregex "CVB(Y)?$")>; 611def : InstRW<[WLat1, FXU3, DFU4, LSU, GroupAlone], (instregex "CVDG$")>; 612def : InstRW<[WLat1, FXU2, DFU, LSU, GroupAlone], (instregex "CVD(Y)?$")>; 613def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>; 614def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>; 615def : InstRW<[WLat10, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>; 616def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "UNPK$")>; 617 618def : InstRW<[WLat11LSU, FXU, DFU4, LSU2, GroupAlone], 619 (instregex "(A|S|ZA)P$")>; 620def : InstRW<[WLat1, FXU, DFU4, LSU2, GroupAlone], (instregex "(M|D)P$")>; 621def : InstRW<[WLat15, FXU2, DFU4, LSU3, GroupAlone], (instregex "SRP$")>; 622def : InstRW<[WLat11, DFU4, LSU2, GroupAlone], (instregex "CP$")>; 623def : InstRW<[WLat5LSU, DFU2, LSU2, GroupAlone], (instregex "TP$")>; 624def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>; 625 626//===----------------------------------------------------------------------===// 627// Access registers 628//===----------------------------------------------------------------------===// 629 630// Extract/set/copy access register 631def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>; 632 633// Load address extended 634def : InstRW<[WLat5, LSU, FXU, GroupAlone], (instregex "LAE(Y)?$")>; 635 636// Load/store access multiple (not modeled precisely) 637def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LAM(Y)?$")>; 638def : InstRW<[WLat1, FXU5, LSU5, GroupAlone], (instregex "STAM(Y)?$")>; 639 640//===----------------------------------------------------------------------===// 641// Program mask and addressing mode 642//===----------------------------------------------------------------------===// 643 644// Insert Program Mask 645def : InstRW<[WLat3, FXU, EndGroup], (instregex "IPM$")>; 646 647// Set Program Mask 648def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>; 649 650// Branch and link 651def : InstRW<[WLat1, FXU2, LSU, GroupAlone], (instregex "BAL(R)?$")>; 652 653// Test addressing mode 654def : InstRW<[WLat1, FXU, NormalGr], (instregex "TAM$")>; 655 656// Set addressing mode 657def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAM(24|31|64)$")>; 658 659// Branch (and save) and set mode. 660def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "BSM$")>; 661def : InstRW<[WLat1, FXU2, LSU, GroupAlone], (instregex "BASSM$")>; 662 663//===----------------------------------------------------------------------===// 664// Miscellaneous Instructions. 665//===----------------------------------------------------------------------===// 666 667// Find leftmost one 668def : InstRW<[WLat7, WLat7, FXU2, GroupAlone], (instregex "FLOGR$")>; 669 670// Population count 671def : InstRW<[WLat3, WLat3, FXU, NormalGr], (instregex "POPCNT$")>; 672 673// String instructions 674def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>; 675def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>; 676 677// Various complex instructions 678def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>; 679def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD], 680 (instregex "UPT$")>; 681def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>; 682def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>; 683 684// Execute 685def : InstRW<[LSU, GroupAlone], (instregex "EX(RL)?$")>; 686 687//===----------------------------------------------------------------------===// 688// .insn directive instructions 689//===----------------------------------------------------------------------===// 690 691// An "empty" sched-class will be assigned instead of the "invalid sched-class". 692// getNumDecoderSlots() will then return 1 instead of 0. 693def : InstRW<[], (instregex "Insn.*")>; 694 695 696// ----------------------------- Floating point ----------------------------- // 697 698//===----------------------------------------------------------------------===// 699// FP: Move instructions 700//===----------------------------------------------------------------------===// 701 702// Load zero 703def : InstRW<[WLat1, FXU, NormalGr], (instregex "LZ(DR|ER)$")>; 704def : InstRW<[WLat2, FXU2, GroupAlone], (instregex "LZXR$")>; 705 706// Load 707def : InstRW<[WLat1, FXU, NormalGr], (instregex "LER$")>; 708def : InstRW<[WLat1, FXU, NormalGr], (instregex "LD(R|R32|GR)$")>; 709def : InstRW<[WLat3, FXU, NormalGr], (instregex "LGDR$")>; 710def : InstRW<[WLat2, FXU2, GroupAlone], (instregex "LXR$")>; 711 712// Load and Test 713def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)BR$")>; 714def : InstRW<[WLat9, FPU, NormalGr], (instregex "LT(E|D)BRCompare$")>; 715def : InstRW<[WLat10, WLat10, FPU4, GroupAlone], (instregex "LTXBR(Compare)?$")>; 716 717// Copy sign 718def : InstRW<[WLat5, FXU2, GroupAlone], (instregex "CPSDR(d|s)(d|s)$")>; 719 720//===----------------------------------------------------------------------===// 721// FP: Load instructions 722//===----------------------------------------------------------------------===// 723 724def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(E|D)(Y|E32)?$")>; 725def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>; 726 727//===----------------------------------------------------------------------===// 728// FP: Store instructions 729//===----------------------------------------------------------------------===// 730 731def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "ST(E|D)(Y)?$")>; 732def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STX$")>; 733 734//===----------------------------------------------------------------------===// 735// FP: Conversion instructions 736//===----------------------------------------------------------------------===// 737 738// Load rounded 739def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEDBR(A)?$")>; 740def : InstRW<[WLat9, FPU2, NormalGr], (instregex "L(E|D)XBR(A)?$")>; 741 742// Load lengthened 743def : InstRW<[WLat7LSU, FPU, LSU, NormalGr], (instregex "LDEB$")>; 744def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>; 745def : InstRW<[WLat11LSU, FPU4, LSU, GroupAlone], (instregex "LX(E|D)B$")>; 746def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "LX(E|D)BR$")>; 747 748// Convert from fixed / logical 749def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)BR(A)?$")>; 750def : InstRW<[WLat11, FXU, FPU4, GroupAlone], (instregex "CX(F|G)BR(A?)$")>; 751def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CEL(F|G)BR$")>; 752def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CDL(F|G)BR$")>; 753def : InstRW<[WLat11, FXU, FPU4, GroupAlone], (instregex "CXL(F|G)BR$")>; 754 755// Convert to fixed / logical 756def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone], 757 (instregex "C(F|G)(E|D)BR(A?)$")>; 758def : InstRW<[WLat12, WLat12, FXU, FPU2, GroupAlone], 759 (instregex "C(F|G)XBR(A?)$")>; 760def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone], 761 (instregex "CL(F|G)(E|D)BR$")>; 762def : InstRW<[WLat12, WLat12, FXU, FPU2, GroupAlone], (instregex "CL(F|G)XBR$")>; 763 764//===----------------------------------------------------------------------===// 765// FP: Unary arithmetic 766//===----------------------------------------------------------------------===// 767 768// Load Complement / Negative / Positive 769def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>; 770def : InstRW<[WLat1, FXU, NormalGr], (instregex "L(C|N|P)DFR(_32)?$")>; 771def : InstRW<[WLat10, WLat10, FPU4, GroupAlone], (instregex "L(C|N|P)XBR$")>; 772 773// Square root 774def : InstRW<[WLat30, FPU, LSU, NormalGr], (instregex "SQ(E|D)B$")>; 775def : InstRW<[WLat30, FPU, NormalGr], (instregex "SQ(E|D)BR$")>; 776def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "SQXBR$")>; 777 778// Load FP integer 779def : InstRW<[WLat7, FPU, NormalGr], (instregex "FI(E|D)BR(A)?$")>; 780def : InstRW<[WLat15, FPU4, GroupAlone], (instregex "FIXBR(A)?$")>; 781 782//===----------------------------------------------------------------------===// 783// FP: Binary arithmetic 784//===----------------------------------------------------------------------===// 785 786// Addition 787def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], 788 (instregex "A(E|D)B$")>; 789def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "A(E|D)BR$")>; 790def : InstRW<[WLat20, WLat20, FPU4, GroupAlone], (instregex "AXBR$")>; 791 792// Subtraction 793def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], 794 (instregex "S(E|D)B$")>; 795def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "S(E|D)BR$")>; 796def : InstRW<[WLat20, WLat20, FPU4, GroupAlone], (instregex "SXBR$")>; 797 798// Multiply 799def : InstRW<[WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], 800 (instregex "M(D|DE|EE)B$")>; 801def : InstRW<[WLat7, FPU, NormalGr], (instregex "M(D|DE|EE)BR$")>; 802def : InstRW<[WLat11LSU, RegReadAdv, FPU4, LSU, GroupAlone], 803 (instregex "MXDB$")>; 804def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "MXDBR$")>; 805def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "MXBR$")>; 806 807// Multiply and add / subtract 808def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, FPU2, LSU, GroupAlone], 809 (instregex "M(A|S)EB$")>; 810def : InstRW<[WLat7, FPU, GroupAlone], (instregex "M(A|S)EBR$")>; 811def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, FPU2, LSU, GroupAlone], 812 (instregex "M(A|S)DB$")>; 813def : InstRW<[WLat7, FPU, GroupAlone], (instregex "M(A|S)DBR$")>; 814 815// Division 816def : InstRW<[WLat30, RegReadAdv, FPU, LSU, NormalGr], (instregex "D(E|D)B$")>; 817def : InstRW<[WLat30, FPU, NormalGr], (instregex "D(E|D)BR$")>; 818def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "DXBR$")>; 819 820// Divide to integer 821def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>; 822 823//===----------------------------------------------------------------------===// 824// FP: Comparisons 825//===----------------------------------------------------------------------===// 826 827// Compare 828def : InstRW<[WLat11LSU, RegReadAdv, FPU, LSU, NormalGr], 829 (instregex "(K|C)(E|D)B$")>; 830def : InstRW<[WLat9, FPU, NormalGr], (instregex "(K|C)(E|D)BR$")>; 831def : InstRW<[WLat30, FPU2, NormalGr], (instregex "(K|C)XBR$")>; 832 833// Test Data Class 834def : InstRW<[WLat15, FPU, LSU, NormalGr], (instregex "TC(E|D)B$")>; 835def : InstRW<[WLat15, FPU4, LSU, GroupAlone], (instregex "TCXB$")>; 836 837//===----------------------------------------------------------------------===// 838// FP: Floating-point control register instructions 839//===----------------------------------------------------------------------===// 840 841def : InstRW<[WLat4, FXU, LSU, GroupAlone], (instregex "EFPC$")>; 842def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "STFPC$")>; 843def : InstRW<[WLat1, LSU, GroupAlone], (instregex "SFPC$")>; 844def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "LFPC$")>; 845def : InstRW<[WLat30, MCD], (instregex "SFASR$")>; 846def : InstRW<[WLat30, MCD], (instregex "LFAS$")>; 847def : InstRW<[WLat2, FXU, GroupAlone], (instregex "SRNM(B|T)?$")>; 848 849 850// --------------------- Hexadecimal floating point ------------------------- // 851 852//===----------------------------------------------------------------------===// 853// HFP: Move instructions 854//===----------------------------------------------------------------------===// 855 856// Load and Test 857def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)R$")>; 858def : InstRW<[WLat9, WLat9, FPU4, GroupAlone], (instregex "LTXR$")>; 859 860//===----------------------------------------------------------------------===// 861// HFP: Conversion instructions 862//===----------------------------------------------------------------------===// 863 864// Load rounded 865def : InstRW<[WLat7, FPU, NormalGr], (instregex "(LEDR|LRER)$")>; 866def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEXR$")>; 867def : InstRW<[WLat9, FPU, NormalGr], (instregex "(LDXR|LRDR)$")>; 868 869// Load lengthened 870def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>; 871def : InstRW<[WLat1, FXU, NormalGr], (instregex "LDER$")>; 872def : InstRW<[WLat11LSU, FPU4, LSU, GroupAlone], (instregex "LX(E|D)$")>; 873def : InstRW<[WLat9, FPU4, GroupAlone], (instregex "LX(E|D)R$")>; 874 875// Convert from fixed 876def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)R$")>; 877def : InstRW<[WLat10, FXU, FPU4, GroupAlone], (instregex "CX(F|G)R$")>; 878 879// Convert to fixed 880def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone], 881 (instregex "C(F|G)(E|D)R$")>; 882def : InstRW<[WLat30, WLat30, FXU, FPU2, GroupAlone], (instregex "C(F|G)XR$")>; 883 884// Convert BFP to HFP / HFP to BFP. 885def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "THD(E)?R$")>; 886def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "TB(E)?DR$")>; 887 888//===----------------------------------------------------------------------===// 889// HFP: Unary arithmetic 890//===----------------------------------------------------------------------===// 891 892// Load Complement / Negative / Positive 893def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "L(C|N|P)(E|D)R$")>; 894def : InstRW<[WLat9, WLat9, FPU4, GroupAlone], (instregex "L(C|N|P)XR$")>; 895 896// Halve 897def : InstRW<[WLat7, FPU, NormalGr], (instregex "H(E|D)R$")>; 898 899// Square root 900def : InstRW<[WLat30, FPU, LSU, NormalGr], (instregex "SQ(E|D)$")>; 901def : InstRW<[WLat30, FPU, NormalGr], (instregex "SQ(E|D)R$")>; 902def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "SQXR$")>; 903 904// Load FP integer 905def : InstRW<[WLat7, FPU, NormalGr], (instregex "FI(E|D)R$")>; 906def : InstRW<[WLat15, FPU4, GroupAlone], (instregex "FIXR$")>; 907 908//===----------------------------------------------------------------------===// 909// HFP: Binary arithmetic 910//===----------------------------------------------------------------------===// 911 912// Addition 913def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], 914 (instregex "A(E|D|U|W)$")>; 915def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "A(E|D|U|W)R$")>; 916def : InstRW<[WLat15, WLat15, FPU4, GroupAlone], (instregex "AXR$")>; 917 918// Subtraction 919def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], 920 (instregex "S(E|D|U|W)$")>; 921def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "S(E|D|U|W)R$")>; 922def : InstRW<[WLat15, WLat15, FPU4, GroupAlone], (instregex "SXR$")>; 923 924// Multiply 925def : InstRW<[WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], (instregex "M(D|EE)$")>; 926def : InstRW<[WLat8LSU, RegReadAdv, FPU, LSU, NormalGr], (instregex "M(DE|E)$")>; 927def : InstRW<[WLat7, FPU, NormalGr], (instregex "M(D|EE)R$")>; 928def : InstRW<[WLat8, FPU, NormalGr], (instregex "M(DE|E)R$")>; 929def : InstRW<[WLat11LSU, RegReadAdv, FPU4, LSU, GroupAlone], (instregex "MXD$")>; 930def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "MXDR$")>; 931def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "MXR$")>; 932def : InstRW<[WLat11LSU, RegReadAdv, FPU4, LSU, GroupAlone], (instregex "MY$")>; 933def : InstRW<[WLat7LSU, RegReadAdv, FPU2, LSU, GroupAlone], 934 (instregex "MY(H|L)$")>; 935def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "MYR$")>; 936def : InstRW<[WLat7, FPU, GroupAlone], (instregex "MY(H|L)R$")>; 937 938// Multiply and add / subtract 939def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, FPU2, LSU, GroupAlone], 940 (instregex "M(A|S)(E|D)$")>; 941def : InstRW<[WLat7, FPU, GroupAlone], (instregex "M(A|S)(E|D)R$")>; 942def : InstRW<[WLat11LSU, RegReadAdv, RegReadAdv, FPU4, LSU, GroupAlone], 943 (instregex "MAY$")>; 944def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, FPU2, LSU, GroupAlone], 945 (instregex "MAY(H|L)$")>; 946def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "MAYR$")>; 947def : InstRW<[WLat7, FPU, GroupAlone], (instregex "MAY(H|L)R$")>; 948 949// Division 950def : InstRW<[WLat30, RegReadAdv, FPU, LSU, NormalGr], (instregex "D(E|D)$")>; 951def : InstRW<[WLat30, FPU, NormalGr], (instregex "D(E|D)R$")>; 952def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "DXR$")>; 953 954//===----------------------------------------------------------------------===// 955// HFP: Comparisons 956//===----------------------------------------------------------------------===// 957 958// Compare 959def : InstRW<[WLat11LSU, RegReadAdv, FPU, LSU, NormalGr], (instregex "C(E|D)$")>; 960def : InstRW<[WLat9, FPU, NormalGr], (instregex "C(E|D)R$")>; 961def : InstRW<[WLat15, FPU2, NormalGr], (instregex "CXR$")>; 962 963 964// ------------------------ Decimal floating point -------------------------- // 965 966//===----------------------------------------------------------------------===// 967// DFP: Move instructions 968//===----------------------------------------------------------------------===// 969 970// Load and Test 971def : InstRW<[WLat4, WLat4, DFU, NormalGr], (instregex "LTDTR$")>; 972def : InstRW<[WLat6, WLat6, DFU4, GroupAlone], (instregex "LTXTR$")>; 973 974//===----------------------------------------------------------------------===// 975// DFP: Conversion instructions 976//===----------------------------------------------------------------------===// 977 978// Load rounded 979def : InstRW<[WLat30, DFU, NormalGr], (instregex "LEDTR$")>; 980def : InstRW<[WLat30, DFU2, NormalGr], (instregex "LDXTR$")>; 981 982// Load lengthened 983def : InstRW<[WLat7, DFU, NormalGr], (instregex "LDETR$")>; 984def : InstRW<[WLat6, DFU4, GroupAlone], (instregex "LXDTR$")>; 985 986// Convert from fixed / logical 987def : InstRW<[WLat9, FXU, DFU, GroupAlone], (instregex "CDFTR$")>; 988def : InstRW<[WLat30, FXU, DFU, GroupAlone], (instregex "CDGTR(A)?$")>; 989def : InstRW<[WLat5, FXU, DFU4, GroupAlone], (instregex "CXFTR(A)?$")>; 990def : InstRW<[WLat30, FXU, DFU4, GroupAlone], (instregex "CXGTR(A)?$")>; 991def : InstRW<[WLat9, FXU, DFU, GroupAlone], (instregex "CDL(F|G)TR$")>; 992def : InstRW<[WLat9, FXU, DFU4, GroupAlone], (instregex "CXLFTR$")>; 993def : InstRW<[WLat5, FXU, DFU4, GroupAlone], (instregex "CXLGTR$")>; 994 995// Convert to fixed / logical 996def : InstRW<[WLat11, WLat11, FXU, DFU, GroupAlone], (instregex "CFDTR(A)?$")>; 997def : InstRW<[WLat30, WLat30, FXU, DFU, GroupAlone], (instregex "CGDTR(A)?$")>; 998def : InstRW<[WLat7, WLat7, FXU, DFU2, GroupAlone], (instregex "CFXTR$")>; 999def : InstRW<[WLat30, WLat30, FXU, DFU2, GroupAlone], (instregex "CGXTR(A)?$")>; 1000def : InstRW<[WLat11, WLat11, FXU, DFU, GroupAlone], (instregex "CL(F|G)DTR$")>; 1001def : InstRW<[WLat7, WLat7, FXU, DFU2, GroupAlone], (instregex "CL(F|G)XTR$")>; 1002 1003// Convert from / to signed / unsigned packed 1004def : InstRW<[WLat5, FXU, DFU, GroupAlone], (instregex "CD(S|U)TR$")>; 1005def : InstRW<[WLat8, FXU2, DFU4, GroupAlone], (instregex "CX(S|U)TR$")>; 1006def : InstRW<[WLat7, FXU, DFU, GroupAlone], (instregex "C(S|U)DTR$")>; 1007def : InstRW<[WLat12, FXU2, DFU4, GroupAlone], (instregex "C(S|U)XTR$")>; 1008 1009// Perform floating-point operation 1010def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>; 1011 1012//===----------------------------------------------------------------------===// 1013// DFP: Unary arithmetic 1014//===----------------------------------------------------------------------===// 1015 1016// Load FP integer 1017def : InstRW<[WLat8, DFU, NormalGr], (instregex "FIDTR$")>; 1018def : InstRW<[WLat10, DFU4, GroupAlone], (instregex "FIXTR$")>; 1019 1020// Extract biased exponent 1021def : InstRW<[WLat7, FXU, DFU, GroupAlone], (instregex "EEDTR$")>; 1022def : InstRW<[WLat8, FXU, DFU2, GroupAlone], (instregex "EEXTR$")>; 1023 1024// Extract significance 1025def : InstRW<[WLat7, FXU, DFU, GroupAlone], (instregex "ESDTR$")>; 1026def : InstRW<[WLat8, FXU, DFU2, GroupAlone], (instregex "ESXTR$")>; 1027 1028//===----------------------------------------------------------------------===// 1029// DFP: Binary arithmetic 1030//===----------------------------------------------------------------------===// 1031 1032// Addition 1033def : InstRW<[WLat9, WLat9, DFU, NormalGr], (instregex "ADTR(A)?$")>; 1034def : InstRW<[WLat30, WLat30, DFU4, GroupAlone], (instregex "AXTR(A)?$")>; 1035 1036// Subtraction 1037def : InstRW<[WLat9, WLat9, DFU, NormalGr], (instregex "SDTR(A)?$")>; 1038def : InstRW<[WLat30, WLat30, DFU4, GroupAlone], (instregex "SXTR(A)?$")>; 1039 1040// Multiply 1041def : InstRW<[WLat30, DFU, NormalGr], (instregex "MDTR(A)?$")>; 1042def : InstRW<[WLat30, DFU4, GroupAlone], (instregex "MXTR(A)?$")>; 1043 1044// Division 1045def : InstRW<[WLat30, DFU, NormalGr], (instregex "DDTR(A)?$")>; 1046def : InstRW<[WLat30, DFU4, GroupAlone], (instregex "DXTR(A)?$")>; 1047 1048// Quantize 1049def : InstRW<[WLat8, WLat8, DFU, NormalGr], (instregex "QADTR$")>; 1050def : InstRW<[WLat10, WLat10, DFU4, GroupAlone], (instregex "QAXTR$")>; 1051 1052// Reround 1053def : InstRW<[WLat11, WLat11, FXU, DFU, GroupAlone], (instregex "RRDTR$")>; 1054def : InstRW<[WLat30, WLat30, FXU, DFU4, GroupAlone], (instregex "RRXTR$")>; 1055 1056// Shift significand left/right 1057def : InstRW<[WLat7LSU, LSU, DFU, GroupAlone], (instregex "S(L|R)DT$")>; 1058def : InstRW<[WLat11LSU, LSU, DFU4, GroupAlone], (instregex "S(L|R)XT$")>; 1059 1060// Insert biased exponent 1061def : InstRW<[WLat5, FXU, DFU, GroupAlone], (instregex "IEDTR$")>; 1062def : InstRW<[WLat7, FXU, DFU4, GroupAlone], (instregex "IEXTR$")>; 1063 1064//===----------------------------------------------------------------------===// 1065// DFP: Comparisons 1066//===----------------------------------------------------------------------===// 1067 1068// Compare 1069def : InstRW<[WLat9, DFU, NormalGr], (instregex "(K|C)DTR$")>; 1070def : InstRW<[WLat10, DFU2, NormalGr], (instregex "(K|C)XTR$")>; 1071 1072// Compare biased exponent 1073def : InstRW<[WLat4, DFU, NormalGr], (instregex "CEDTR$")>; 1074def : InstRW<[WLat5, DFU2, NormalGr], (instregex "CEXTR$")>; 1075 1076// Test Data Class/Group 1077def : InstRW<[WLat9, LSU, DFU, NormalGr], (instregex "TD(C|G)DT$")>; 1078def : InstRW<[WLat10, LSU, DFU, NormalGr], (instregex "TD(C|G)ET$")>; 1079def : InstRW<[WLat10, LSU, DFU2, NormalGr], (instregex "TD(C|G)XT$")>; 1080 1081 1082// -------------------------------- System ---------------------------------- // 1083 1084//===----------------------------------------------------------------------===// 1085// System: Program-Status Word Instructions 1086//===----------------------------------------------------------------------===// 1087 1088def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>; 1089def : InstRW<[WLat30, MCD], (instregex "LPSW(E)?$")>; 1090def : InstRW<[WLat3, FXU, GroupAlone], (instregex "IPK$")>; 1091def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>; 1092def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>; 1093def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "ST(N|O)SM$")>; 1094def : InstRW<[WLat3, FXU, NormalGr], (instregex "IAC$")>; 1095def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>; 1096 1097//===----------------------------------------------------------------------===// 1098// System: Control Register Instructions 1099//===----------------------------------------------------------------------===// 1100 1101def : InstRW<[WLat10, WLat10, LSU2, GroupAlone], (instregex "LCTL(G)?$")>; 1102def : InstRW<[WLat1, FXU5, LSU5, GroupAlone], (instregex "STCT(L|G)$")>; 1103def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>; 1104def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>; 1105def : InstRW<[WLat30, MCD], (instregex "ESEA$")>; 1106 1107//===----------------------------------------------------------------------===// 1108// System: Prefix-Register Instructions 1109//===----------------------------------------------------------------------===// 1110 1111def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>; 1112 1113//===----------------------------------------------------------------------===// 1114// System: Storage-Key and Real Memory Instructions 1115//===----------------------------------------------------------------------===// 1116 1117def : InstRW<[WLat30, MCD], (instregex "ISKE$")>; 1118def : InstRW<[WLat30, MCD], (instregex "IVSK$")>; 1119def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>; 1120def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>; 1121def : InstRW<[WLat30, MCD], (instregex "PFMF$")>; 1122def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>; 1123def : InstRW<[WLat30, MCD], (instregex "PGIN$")>; 1124def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>; 1125 1126//===----------------------------------------------------------------------===// 1127// System: Dynamic-Address-Translation Instructions 1128//===----------------------------------------------------------------------===// 1129 1130def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>; 1131def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>; 1132def : InstRW<[WLat30, MCD], (instregex "PTLB$")>; 1133def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>; 1134def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>; 1135def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>; 1136def : InstRW<[WLat30, MCD], (instregex "STRAG$")>; 1137def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>; 1138def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>; 1139def : InstRW<[WLat30, MCD], (instregex "TPROT$")>; 1140 1141//===----------------------------------------------------------------------===// 1142// System: Memory-move Instructions 1143//===----------------------------------------------------------------------===// 1144 1145def : InstRW<[WLat30, MCD], (instregex "MVC(K|P|S)$")>; 1146def : InstRW<[WLat30, MCD], (instregex "MVC(S|D)K$")>; 1147def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>; 1148def : InstRW<[WLat30, MCD], (instregex "MVPG$")>; 1149 1150//===----------------------------------------------------------------------===// 1151// System: Address-Space Instructions 1152//===----------------------------------------------------------------------===// 1153 1154def : InstRW<[WLat30, MCD], (instregex "LASP$")>; 1155def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>; 1156def : InstRW<[WLat30, MCD], (instregex "PC$")>; 1157def : InstRW<[WLat30, MCD], (instregex "PR$")>; 1158def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>; 1159def : InstRW<[WLat30, MCD], (instregex "RP$")>; 1160def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>; 1161def : InstRW<[WLat30, MCD], (instregex "TAR$")>; 1162 1163//===----------------------------------------------------------------------===// 1164// System: Linkage-Stack Instructions 1165//===----------------------------------------------------------------------===// 1166 1167def : InstRW<[WLat30, MCD], (instregex "BAKR$")>; 1168def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>; 1169def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>; 1170 1171//===----------------------------------------------------------------------===// 1172// System: Time-Related Instructions 1173//===----------------------------------------------------------------------===// 1174 1175def : InstRW<[WLat30, MCD], (instregex "PTFF$")>; 1176def : InstRW<[WLat30, MCD], (instregex "SCK$")>; 1177def : InstRW<[WLat30, MCD], (instregex "SCKPF$")>; 1178def : InstRW<[WLat30, MCD], (instregex "SCKC$")>; 1179def : InstRW<[WLat30, MCD], (instregex "SPT$")>; 1180def : InstRW<[WLat30, MCD], (instregex "STCK(F)?$")>; 1181def : InstRW<[WLat30, MCD], (instregex "STCKE$")>; 1182def : InstRW<[WLat30, MCD], (instregex "STCKC$")>; 1183def : InstRW<[WLat30, MCD], (instregex "STPT$")>; 1184 1185//===----------------------------------------------------------------------===// 1186// System: CPU-Related Instructions 1187//===----------------------------------------------------------------------===// 1188 1189def : InstRW<[WLat30, MCD], (instregex "STAP$")>; 1190def : InstRW<[WLat30, MCD], (instregex "STIDP$")>; 1191def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>; 1192def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>; 1193def : InstRW<[WLat30, MCD], (instregex "ECAG$")>; 1194def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>; 1195def : InstRW<[WLat30, MCD], (instregex "PTF$")>; 1196def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>; 1197 1198//===----------------------------------------------------------------------===// 1199// System: Miscellaneous Instructions 1200//===----------------------------------------------------------------------===// 1201 1202def : InstRW<[WLat30, MCD], (instregex "SVC$")>; 1203def : InstRW<[WLat1, FXU, GroupAlone], (instregex "MC$")>; 1204def : InstRW<[WLat30, MCD], (instregex "DIAG$")>; 1205def : InstRW<[WLat30, MCD], (instregex "TRAC(E|G)$")>; 1206def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>; 1207def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>; 1208def : InstRW<[WLat30, MCD], (instregex "SIE$")>; 1209 1210//===----------------------------------------------------------------------===// 1211// System: CPU-Measurement Facility Instructions 1212//===----------------------------------------------------------------------===// 1213 1214def : InstRW<[WLat1, FXU, NormalGr], (instregex "LPP$")>; 1215def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>; 1216def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>; 1217def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>; 1218def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>; 1219def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>; 1220def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>; 1221 1222//===----------------------------------------------------------------------===// 1223// System: I/O Instructions 1224//===----------------------------------------------------------------------===// 1225 1226def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>; 1227def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>; 1228def : InstRW<[WLat30, MCD], (instregex "RCHP$")>; 1229def : InstRW<[WLat30, MCD], (instregex "SCHM$")>; 1230def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>; 1231def : InstRW<[WLat30, MCD], (instregex "TPI$")>; 1232def : InstRW<[WLat30, MCD], (instregex "SAL$")>; 1233 1234} 1235 1236