| /external/llvm/test/CodeGen/X86/ |
| D | atomic32.ll | 1 …lc < %s -O0 -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefix=WITH-CMOV
2 …: llc < %s -O0 -march=x86 -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefix=WITH-CMOV
8 ; WITH-CMOV-LABEL: atomic_fetch_add32:
12 ; WITH-CMOV: lock
13 ; WITH-CMOV: incl
15 ; WITH-CMOV: lock
16 ; WITH-CMOV: addl $3
18 ; WITH-CMOV: lock
19 ; WITH-CMOV: xaddl
21 ; WITH-CMOV: lock
[all …]
|
| D | cmovcmov.ll | 1 …verbose=false -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=CHECK --check-prefix=CMOV
12 ; CMOV-NEXT: ucomiss %xmm1, %xmm0
13 ; CMOV-NEXT: cmovnel %esi, %edi
14 ; CMOV-NEXT: cmovpl %esi, %edi
15 ; CMOV-NEXT: movl %edi, %eax
16 ; CMOV-NEXT: retq
39 ; CMOV-NEXT: ucomiss %xmm1, %xmm0
40 ; CMOV-NEXT: cmovneq %rsi, %rdi
41 ; CMOV-NEXT: cmovpq %rsi, %rdi
42 ; CMOV-NEXT: movq %rdi, %rax
[all …]
|
| D | pseudo_cmov_lower.ll | 4 ; for lowering the CMOV pseudos that get created for this IR.
18 ; for lowering the CMOV pseudos that get created for this IR. This makes
35 ; for lowering the CMOV pseudos that get created for this IR.
51 ; for lowering the CMOV pseudos that get created for this IR.
67 ; for lowering the CMOV pseudos that get created for this IR.
81 ; for lowering the CMOV pseudos that get created for this IR.
95 ; for lowering the CMOV pseudos that get created for this IR.
109 ; for lowering the CMOV pseudos that get created for this IR.
123 ; for lowering the CMOV pseudos that get created for this IR. This combines
214 ; for lowering the CMOV pseudos that get created for this IR.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | cmov-promotion.ll | 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=CMOV
6 ; CMOV-LABEL: cmov_zpromotion_8_to_16:
7 ; CMOV: # %bb.0:
8 ; CMOV-NEXT: testb $1, %dil
9 ; CMOV-NEXT: movb $117, %al
10 ; CMOV-NEXT: jne .LBB0_2
11 ; CMOV-NEXT: # %bb.1:
12 ; CMOV-NEXT: movb $-19, %al
13 ; CMOV-NEXT: .LBB0_2:
14 ; CMOV-NEXT: movzbl %al, %eax
[all …]
|
| D | cmovcmov.ll | 1 …verbose=false -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=CHECK --check-prefix=CMOV
12 ; CMOV-NEXT: ucomiss %xmm1, %xmm0
13 ; CMOV-NEXT: cmovnel %esi, %edi
14 ; CMOV-NEXT: cmovpl %esi, %edi
15 ; CMOV-NEXT: movl %edi, %eax
16 ; CMOV-NEXT: retq
39 ; CMOV-NEXT: ucomiss %xmm1, %xmm0
40 ; CMOV-NEXT: cmovneq %rsi, %rdi
41 ; CMOV-NEXT: cmovpq %rsi, %rdi
42 ; CMOV-NEXT: movq %rdi, %rax
[all …]
|
| D | iabs.ll | 2 …llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86 --check-prefix=X86-NO-CMOV
3 …mtriple=i686-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X86 --check-prefix=X86-CMOV
37 ; X86-NO-CMOV-LABEL: test_i16:
38 ; X86-NO-CMOV: # %bb.0:
39 ; X86-NO-CMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
40 ; X86-NO-CMOV-NEXT: movl %eax, %ecx
41 ; X86-NO-CMOV-NEXT: sarw $15, %cx
42 ; X86-NO-CMOV-NEXT: addl %ecx, %eax
43 ; X86-NO-CMOV-NEXT: xorl %ecx, %eax
44 ; X86-NO-CMOV-NEXT: # kill: def $ax killed $ax killed $eax
[all …]
|
| D | atomic32.ll | 2 …6_64-unknown-unknown -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefixes=X64,X64-CMOV
3 …i686-unknown-unknown -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefixes=X86,X86-CMOV
295 ; X86-CMOV-LABEL: atomic_fetch_max32:
296 ; X86-CMOV: # %bb.0:
297 ; X86-CMOV-NEXT: pushl %ebx
298 ; X86-CMOV-NEXT: subl $12, %esp
299 ; X86-CMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
300 ; X86-CMOV-NEXT: movl sc32, %ecx
301 ; X86-CMOV-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
302 ; X86-CMOV-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
[all …]
|
| D | pseudo_cmov_lower.ll | 4 ; for lowering the CMOV pseudos that get created for this IR.
18 ; for lowering the CMOV pseudos that get created for this IR. This makes
35 ; for lowering the CMOV pseudos that get created for this IR.
51 ; for lowering the CMOV pseudos that get created for this IR.
67 ; for lowering the CMOV pseudos that get created for this IR.
81 ; for lowering the CMOV pseudos that get created for this IR.
95 ; for lowering the CMOV pseudos that get created for this IR.
109 ; for lowering the CMOV pseudos that get created for this IR.
123 ; for lowering the CMOV pseudos that get created for this IR. This combines
214 ; for lowering the CMOV pseudos that get created for this IR.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
| D | cmov.ll | 1 … -mcpu=mips32 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMOV
2 … -mcpu=mips32 -regalloc=basic -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMOV
3 … -mcpu=mips32r2 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMOV
5 … -mcpu=mips4 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,64-CMOV
6 … -mcpu=mips64 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,64-CMOV
14 ; 32-CMOV-DAG: lw $[[R0:[0-9]+]], %got(i3)
15 ; 32-CMOV-DAG: addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(i1)
16 ; 32-CMOV-DAG: movn $[[R0]], $[[R1]], $4
17 ; 32-CMOV-DAG: lw $2, 0($[[R0]])
26 ; 64-CMOV-DAG: ldr $[[R0:[0-9]+]]
[all …]
|
| D | zeroreg.ll | 1 … < %s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,32-CMOV
2 … < %s -march=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,32-CMOV
4 …sel -mcpu=mips4 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
5 …sel -mcpu=mips64 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
6 …sel -mcpu=mips64r2 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
15 ; 32-CMOV: lw $2, 0(${{[0-9]+}})
16 ; 32-CMOV: movn $2, $zero, $4
21 ; 64-CMOV: lw $2, 0(${{[0-9]+}})
22 ; 64-CMOV: movn $2, $zero, $4
37 ; 32-CMOV: lw $2, 0(${{[0-9]+}})
[all …]
|
| /external/llvm/test/CodeGen/Mips/ |
| D | cmov.ll | 1 … -mcpu=mips32 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMOV
2 … -mcpu=mips32 -regalloc=basic -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMOV
3 … -mcpu=mips32r2 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMOV
5 … -mcpu=mips4 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,64-CMOV
6 … -mcpu=mips64 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,64-CMOV
14 ; 32-CMOV-DAG: lw $[[R0:[0-9]+]], %got(i3)
15 ; 32-CMOV-DAG: addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(i1)
16 ; 32-CMOV-DAG: movn $[[R0]], $[[R1]], $4
17 ; 32-CMOV-DAG: lw $2, 0($[[R0]])
26 ; 64-CMOV-DAG: ldr $[[R0:[0-9]+]]
[all …]
|
| D | zeroreg.ll | 1 … < %s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,32-CMOV
2 … < %s -march=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,32-CMOV
4 …sel -mcpu=mips4 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
5 …sel -mcpu=mips64 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
6 …sel -mcpu=mips64r2 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
15 ; 32-CMOV: lw $2, 0(${{[0-9]+}})
16 ; 32-CMOV: movn $2, $zero, $4
21 ; 64-CMOV: lw $2, 0(${{[0-9]+}})
22 ; 64-CMOV: movn $2, $zero, $4
37 ; 32-CMOV: lw $2, 0(${{[0-9]+}})
[all …]
|
| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | select-flt.ll | 4 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R1
6 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
8 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
10 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
16 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
18 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
20 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
22 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
24 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
47 ; CMOV-32: mtc1 $6, $f0
[all …]
|
| D | select-dbl.ll | 4 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R1
6 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
8 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
10 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
16 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
18 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
20 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
22 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
24 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
47 ; CMOV-32: mtc1 $7, $[[F0:f[0-9]+]]
[all …]
|
| D | select-int.ll | 4 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R1
6 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
8 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
10 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
16 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
18 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
20 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
22 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
24 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
45 ; CMOV: andi $[[T0:[0-9]+]], $4, 1
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | select-int.ll | 4 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R1
6 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
8 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
10 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
16 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
18 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
20 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
22 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
24 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
46 ; CMOV: andi $[[T0:[0-9]+]], $4, 1
[all …]
|
| D | add.ll | 4 ; RUN: -check-prefixes=ALL,NOT-R2-R6,GP32,GP32-CMOV
6 ; RUN: -check-prefixes=ALL,R2-R6,GP32,GP32-CMOV
8 ; RUN: -check-prefixes=ALL,R2-R6,GP32,GP32-CMOV
10 ; RUN: -check-prefixes=ALL,R2-R6,GP32,GP32-CMOV
153 ; GP32-CMOV: lw $[[T0:[0-9]+]], 24($sp)
154 ; GP32-CMOV: addu $[[T1:[0-9]+]], $6, $[[T0]]
155 ; GP32-CMOV: lw $[[T2:[0-9]+]], 28($sp)
156 ; GP32-CMOV: addu $[[T3:[0-9]+]], $7, $[[T2]]
157 ; GP32-CMOV: sltu $[[T4:[0-9]+]], $[[T3]], $7
158 ; GP32-CMOV: addu $[[T5:[0-9]+]], $[[T1]], $[[T4]]
[all …]
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 17 multiclass CMOV<bits<8> opc, string Mnemonic, PatLeaf CondNode> {
58 defm CMOVO : CMOV<0x40, "cmovo" , X86_COND_O>;
59 defm CMOVNO : CMOV<0x41, "cmovno", X86_COND_NO>;
60 defm CMOVB : CMOV<0x42, "cmovb" , X86_COND_B>;
61 defm CMOVAE : CMOV<0x43, "cmovae", X86_COND_AE>;
62 defm CMOVE : CMOV<0x44, "cmove" , X86_COND_E>;
63 defm CMOVNE : CMOV<0x45, "cmovne", X86_COND_NE>;
64 defm CMOVBE : CMOV<0x46, "cmovbe", X86_COND_BE>;
65 defm CMOVA : CMOV<0x47, "cmova" , X86_COND_A>;
66 defm CMOVS : CMOV<0x48, "cmovs" , X86_COND_S>;
[all …]
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 16 // CMOV instructions.
17 multiclass CMOV<bits<8> opc, string Mnemonic, PatLeaf CondNode> {
64 defm CMOVO : CMOV<0x40, "cmovo" , X86_COND_O>;
65 defm CMOVNO : CMOV<0x41, "cmovno", X86_COND_NO>;
66 defm CMOVB : CMOV<0x42, "cmovb" , X86_COND_B>;
67 defm CMOVAE : CMOV<0x43, "cmovae", X86_COND_AE>;
68 defm CMOVE : CMOV<0x44, "cmove" , X86_COND_E>;
69 defm CMOVNE : CMOV<0x45, "cmovne", X86_COND_NE>;
70 defm CMOVBE : CMOV<0x46, "cmovbe", X86_COND_BE>;
71 defm CMOVA : CMOV<0x47, "cmova" , X86_COND_A>;
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 16 // CMOV instructions.
17 multiclass CMOV<bits<8> opc, string Mnemonic, X86FoldableSchedWrite Sched,
62 defm CMOVO : CMOV<0x40, "cmovo" , WriteCMOV, X86_COND_O>;
63 defm CMOVNO : CMOV<0x41, "cmovno", WriteCMOV, X86_COND_NO>;
64 defm CMOVB : CMOV<0x42, "cmovb" , WriteCMOV, X86_COND_B>;
65 defm CMOVAE : CMOV<0x43, "cmovae", WriteCMOV, X86_COND_AE>;
66 defm CMOVE : CMOV<0x44, "cmove" , WriteCMOV, X86_COND_E>;
67 defm CMOVNE : CMOV<0x45, "cmovne", WriteCMOV, X86_COND_NE>;
68 defm CMOVBE : CMOV<0x46, "cmovbe", WriteCMOV2, X86_COND_BE>;
69 defm CMOVA : CMOV<0x47, "cmova" , WriteCMOV2, X86_COND_A>;
[all …]
|
| /external/swiftshader/src/Reactor/ |
| D | CPUID.cpp | 33 bool CPUID::CMOV = detectCMOV(); member in rr::CPUID
66 if(!CMOV) in setEnableCMOV()
190 return CMOV = (registers[3] & 0x00008000) != 0; in detectCMOV()
|
| D | CPUID.hpp | 50 static bool CMOV; member in rr::CPUID
84 return CMOV && enableCMOV; in supportsCMOV()
|
| /external/swiftshader/src/System/ |
| D | CPUID.cpp | 33 bool CPUID::CMOV = detectCMOV(); member in sw::CPUID
68 if(!CMOV) in setEnableCMOV()
192 return CMOV = (registers[3] & 0x00008000) != 0; in detectCMOV()
|
| /external/swiftshader/src/Common/ |
| D | CPUID.cpp | 33 bool CPUID::CMOV = detectCMOV(); member in sw::CPUID
68 if(!CMOV) in setEnableCMOV()
192 return CMOV = (registers[3] & 0x00008000) != 0; in detectCMOV()
|
| D | CPUID.hpp | 55 static bool CMOV; member in sw::CPUID
93 return CMOV && enableCMOV; in supportsCMOV()
|