| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 345 CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF, enumerator
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 388 CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 288 case ISD::CTLZ_ZERO_UNDEF: in LegalizeOp()
701 case ISD::CTLZ_ZERO_UNDEF: in Expand()
1032 unsigned Opc = Op.getOpcode() == ISD::CTLZ_ZERO_UNDEF ? ISD::CTLZ : ISD::CTTZ; in ExpandCTLZ_CTTZ_ZERO_UNDEF()
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| D | SelectionDAGDumper.cpp | 322 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef"; in getOperationName()
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| D | LegalizeDAG.cpp | 2683 case ISD::CTLZ_ZERO_UNDEF: in ExpandBitCount()
2690 if (TLI.isOperationLegalOrCustom(ISD::CTLZ_ZERO_UNDEF, VT)) { in ExpandBitCount()
2692 SDValue CTLZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, dl, VT, Op); in ExpandBitCount()
2749 case ISD::CTLZ_ZERO_UNDEF: in ExpandNode()
4013 case ISD::CTLZ_ZERO_UNDEF: in PromoteNode()
4030 Node->getOpcode() == ISD::CTLZ_ZERO_UNDEF) { in PromoteNode()
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| D | LegalizeIntegerTypes.cpp | 62 case ISD::CTLZ_ZERO_UNDEF: in PromoteIntegerResult()
1317 case ISD::CTLZ_ZERO_UNDEF: in ExpandIntegerResult()
1970 SDValue HiLZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, dl, NVT, Hi); in ExpandIntRes_CTLZ()
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| D | LegalizeVectorTypes.cpp | 73 case ISD::CTLZ_ZERO_UNDEF: in ScalarizeVectorResult()
632 case ISD::CTLZ_ZERO_UNDEF: in SplitVectorResult()
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| D | SelectionDAG.cpp | 2246 case ISD::CTLZ_ZERO_UNDEF: in computeKnownBits()
2944 case ISD::CTLZ_ZERO_UNDEF: in getNode()
3036 case ISD::CTLZ_ZERO_UNDEF: in getNode()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 347 case ISD::CTLZ_ZERO_UNDEF: in LegalizeOp()
734 case ISD::CTLZ_ZERO_UNDEF: in Expand()
1094 if (Op.getOpcode() == ISD::CTLZ_ZERO_UNDEF && in ExpandCTLZ()
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| D | SelectionDAGDumper.cpp | 351 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef"; in getOperationName()
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| D | LegalizeDAG.cpp | 2759 case ISD::CTLZ_ZERO_UNDEF: in ExpandBitCount()
2766 if (TLI.isOperationLegalOrCustom(ISD::CTLZ_ZERO_UNDEF, VT)) { in ExpandBitCount()
2768 SDValue CTLZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, dl, VT, Op); in ExpandBitCount()
2837 case ISD::CTLZ_ZERO_UNDEF: in ExpandNode()
4303 case ISD::CTLZ_ZERO_UNDEF: in PromoteNode()
4320 Node->getOpcode() == ISD::CTLZ_ZERO_UNDEF) { in PromoteNode()
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| D | LegalizeIntegerTypes.cpp | 64 case ISD::CTLZ_ZERO_UNDEF: in PromoteIntegerResult()
1388 case ISD::CTLZ_ZERO_UNDEF: in ExpandIntegerResult()
2143 SDValue HiLZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, dl, NVT, Hi); in ExpandIntRes_CTLZ()
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| D | LegalizeVectorTypes.cpp | 76 case ISD::CTLZ_ZERO_UNDEF: in ScalarizeVectorResult()
688 case ISD::CTLZ_ZERO_UNDEF: in SplitVectorResult()
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| D | SelectionDAG.cpp | 2654 case ISD::CTLZ_ZERO_UNDEF: { in computeKnownBits()
3819 case ISD::CTLZ_ZERO_UNDEF: in getNode()
3932 case ISD::CTLZ_ZERO_UNDEF: in getNode()
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| D | DAGCombiner.cpp | 1539 case ISD::CTLZ_ZERO_UNDEF: return visitCTLZ_ZERO_UNDEF(N); in visit()
6960 if (!LegalOperations || TLI.isOperationLegal(ISD::CTLZ_ZERO_UNDEF, VT)) { in visitCTLZ()
6962 return DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SDLoc(N), VT, N0); in visitCTLZ()
6974 return DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SDLoc(N), VT, N0); in visitCTLZ_ZERO_UNDEF()
18033 Count.getOpcode() == ISD::CTLZ_ZERO_UNDEF) && in SimplifySelectCC()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 340 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Custom); in AMDGPUTargetLowering()
346 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Custom); in AMDGPUTargetLowering()
724 case ISD::CTLZ_ZERO_UNDEF: in LowerOperation()
1852 bool ZeroUndef = Op.getOpcode() == ISD::CTLZ_ZERO_UNDEF; in LowerCTLZ()
1870 SDValue CtlzLo = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i32, Lo); in LowerCTLZ()
1871 SDValue CtlzHi = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i32, Hi); in LowerCTLZ()
1943 SDValue LZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i64, L); in LowerINT_TO_FP32()
2474 return Opc == ISD::CTLZ || Opc == ISD::CTLZ_ZERO_UNDEF; in isCtlzOpc()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 104 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Custom); in BPFTargetLowering()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 396 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Custom); in AMDGPUTargetLowering()
1151 case ISD::CTLZ_ZERO_UNDEF: in LowerOperation()
2217 return Opc == ISD::CTLZ || Opc == ISD::CTLZ_ZERO_UNDEF; in isCtlzOpc()
2228 Op.getOpcode() == ISD::CTLZ_ZERO_UNDEF; in LowerCTLZ_CTTZ()
2232 ISDOpc = ISD::CTLZ_ZERO_UNDEF; in LowerCTLZ_CTTZ()
2338 SDValue LZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i64, L); in LowerINT_TO_FP32()
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| D | R600ISelLowering.cpp | 244 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Custom); in R600TargetLowering()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 115 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Custom); in BPFTargetLowering()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 631 setOperationAction(ISD::CTLZ_ZERO_UNDEF, VT, Expand); in initActions()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 887 setOperationAction(ISD::CTLZ_ZERO_UNDEF, VT, Expand); in initActions()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 414 def ctlz_zero_undef : SDNode<"ISD::CTLZ_ZERO_UNDEF", SDTIntUnaryOp>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 396 def ctlz_zero_undef : SDNode<"ISD::CTLZ_ZERO_UNDEF", SDTIntUnaryOp>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/ |
| D | ctlz.ll | 465 ; CTLZ_ZERO_UNDEF
|