| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ConditionOptimizer.cpp | 112 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
113 void modifyCmp(MachineInstr *CmpMI, const CmpInfo &Info);
114 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
243 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp() argument
244 unsigned Opc = CmpMI->getOpcode(); in adjustCmp()
256 const int OldImm = (int)CmpMI->getOperand(2).getImm(); in adjustCmp()
270 void AArch64ConditionOptimizer::modifyCmp(MachineInstr *CmpMI, in modifyCmp() argument
277 MachineBasicBlock *const MBB = CmpMI->getParent(); in modifyCmp()
280 BuildMI(*MBB, CmpMI, CmpMI->getDebugLoc(), TII->get(Opc)) in modifyCmp()
281 .add(CmpMI->getOperand(0)) in modifyCmp()
[all …]
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| D | AArch64ConditionalCompares.cpp | 157 MachineInstr *CmpMI; member in __anonfe4fbe8f0111::SSACCmpConv
187 bool canSpeculateInstrs(MachineBasicBlock *MBB, const MachineInstr *CmpMI);
384 const MachineInstr *CmpMI) { in canSpeculateInstrs() argument
428 if (&I != CmpMI && I.modifiesRegister(AArch64::NZCV, TRI)) { in canSpeculateInstrs()
559 CmpMI = findConvertibleCompare(CmpBB); in canConvert()
560 if (!CmpMI) in canConvert()
563 if (!canSpeculateInstrs(CmpBB, CmpMI)) { in canConvert()
655 switch (CmpMI->getOpcode()) { in convert()
691 MRI->constrainRegClass(CmpMI->getOperand(FirstOp).getReg(), in convert()
693 if (CmpMI->getOperand(FirstOp + 1).isReg()) in convert()
[all …]
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| D | AArch64InstructionSelector.cpp | 1407 MachineInstr &CmpMI = *BuildMI(MBB, I, I.getDebugLoc(), TII.get(CmpOpc)) in select() local
1419 constrainSelectedInstRegOperands(CmpMI, TII, TRI, RBI); in select()
1449 MachineInstr &CmpMI = *BuildMI(MBB, I, I.getDebugLoc(), TII.get(CmpOpc)) in select() local
1482 constrainSelectedInstRegOperands(CmpMI, TII, TRI, RBI); in select()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ConditionOptimizer.cpp | 101 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
102 void modifyCmp(MachineInstr *CmpMI, const CmpInfo &Info);
103 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
232 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp() argument
233 unsigned Opc = CmpMI->getOpcode(); in adjustCmp()
245 const int OldImm = (int)CmpMI->getOperand(2).getImm(); in adjustCmp()
259 void AArch64ConditionOptimizer::modifyCmp(MachineInstr *CmpMI, in modifyCmp() argument
266 MachineBasicBlock *const MBB = CmpMI->getParent(); in modifyCmp()
269 BuildMI(*MBB, CmpMI, CmpMI->getDebugLoc(), TII->get(Opc)) in modifyCmp()
270 .addOperand(CmpMI->getOperand(0)) in modifyCmp()
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| D | AArch64ConditionalCompares.cpp | 155 MachineInstr *CmpMI; member in __anon2dd089570111::SSACCmpConv
185 bool canSpeculateInstrs(MachineBasicBlock *MBB, const MachineInstr *CmpMI);
378 const MachineInstr *CmpMI) { in canSpeculateInstrs() argument
422 if (&I != CmpMI && I.modifiesRegister(AArch64::NZCV, TRI)) { in canSpeculateInstrs()
549 CmpMI = findConvertibleCompare(CmpBB); in canConvert()
550 if (!CmpMI) in canConvert()
553 if (!canSpeculateInstrs(CmpBB, CmpMI)) { in canConvert()
612 switch (CmpMI->getOpcode()) { in convert()
648 MRI->constrainRegClass(CmpMI->getOperand(FirstOp).getReg(), in convert()
650 if (CmpMI->getOperand(FirstOp + 1).isReg()) in convert()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMConstantIslandPass.cpp | 1668 MachineBasicBlock::iterator CmpMI = Br.MI; in OptimizeThumb2Branches() local
1669 if (CmpMI != Br.MI->getParent()->begin()) { in OptimizeThumb2Branches()
1670 --CmpMI; in OptimizeThumb2Branches()
1671 if (CmpMI->getOpcode() == ARM::tCMPi8) { in OptimizeThumb2Branches()
1672 unsigned Reg = CmpMI->getOperand(0).getReg(); in OptimizeThumb2Branches()
1673 Pred = llvm::getInstrPredicate(CmpMI, PredReg); in OptimizeThumb2Branches()
1675 CmpMI->getOperand(1).getImm() == 0 && in OptimizeThumb2Branches()
1679 BuildMI(*MBB, CmpMI, Br.MI->getDebugLoc(), TII->get(NewOpc)) in OptimizeThumb2Branches()
1681 CmpMI->eraseFromParent(); in OptimizeThumb2Branches()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMConstantIslandPass.cpp | 1958 MachineBasicBlock::iterator CmpMI = Br.MI; in optimizeThumb2Branches() local
1959 if (CmpMI != Br.MI->getParent()->begin()) { in optimizeThumb2Branches()
1960 --CmpMI; in optimizeThumb2Branches()
1961 if (CmpMI->getOpcode() == ARM::tCMPi8) { in optimizeThumb2Branches()
1962 unsigned Reg = CmpMI->getOperand(0).getReg(); in optimizeThumb2Branches()
1963 Pred = getInstrPredicate(*CmpMI, PredReg); in optimizeThumb2Branches()
1965 CmpMI->getOperand(1).getImm() == 0 && in optimizeThumb2Branches()
1968 DEBUG(dbgs() << "Fold: " << *CmpMI << " and: " << *Br.MI); in optimizeThumb2Branches()
1970 BuildMI(*MBB, CmpMI, Br.MI->getDebugLoc(), TII->get(NewOpc)) in optimizeThumb2Branches()
1972 CmpMI->eraseFromParent(); in optimizeThumb2Branches()
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| D | ARMBaseInstrInfo.cpp | 1714 MachineBasicBlock::iterator CmpMI = LastMI; in isProfitableToIfCvt() local
1715 if (CmpMI != Pred->begin()) { in isProfitableToIfCvt()
1716 --CmpMI; in isProfitableToIfCvt()
1717 if (CmpMI->getOpcode() == ARM::tCMPi8 || in isProfitableToIfCvt()
1718 CmpMI->getOpcode() == ARM::t2CMPri) { in isProfitableToIfCvt()
1719 unsigned Reg = CmpMI->getOperand(0).getReg(); in isProfitableToIfCvt()
1721 ARMCC::CondCodes P = getInstrPredicate(*CmpMI, PredReg); in isProfitableToIfCvt()
1722 if (P == ARMCC::AL && CmpMI->getOperand(1).getImm() == 0 && in isProfitableToIfCvt()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMConstantIslandPass.cpp | 1888 MachineBasicBlock::iterator CmpMI = Br.MI; in optimizeThumb2Branches() local
1889 if (CmpMI != Br.MI->getParent()->begin()) { in optimizeThumb2Branches()
1890 --CmpMI; in optimizeThumb2Branches()
1891 if (CmpMI->getOpcode() == ARM::tCMPi8) { in optimizeThumb2Branches()
1892 unsigned Reg = CmpMI->getOperand(0).getReg(); in optimizeThumb2Branches()
1893 Pred = getInstrPredicate(*CmpMI, PredReg); in optimizeThumb2Branches()
1895 CmpMI->getOperand(1).getImm() == 0 && in optimizeThumb2Branches()
1898 LLVM_DEBUG(dbgs() << "Fold: " << *CmpMI << " and: " << *Br.MI); in optimizeThumb2Branches()
1900 BuildMI(*MBB, CmpMI, Br.MI->getDebugLoc(), TII->get(NewOpc)) in optimizeThumb2Branches()
1902 CmpMI->eraseFromParent(); in optimizeThumb2Branches()
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| D | ARMBaseInstrInfo.cpp | 1892 MachineBasicBlock::iterator CmpMI = LastMI; in isProfitableToIfCvt() local
1893 if (CmpMI != Pred->begin()) { in isProfitableToIfCvt()
1894 --CmpMI; in isProfitableToIfCvt()
1895 if (CmpMI->getOpcode() == ARM::tCMPi8 || in isProfitableToIfCvt()
1896 CmpMI->getOpcode() == ARM::t2CMPri) { in isProfitableToIfCvt()
1897 unsigned Reg = CmpMI->getOperand(0).getReg(); in isProfitableToIfCvt()
1899 ARMCC::CondCodes P = getInstrPredicate(*CmpMI, PredReg); in isProfitableToIfCvt()
1900 if (P == ARMCC::AL && CmpMI->getOperand(1).getImm() == 0 && in isProfitableToIfCvt()
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