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/external/libxaac/decoder/armv7/
Dixheaacd_dec_DCT2_64_asm.s101 VUZP.16 D20, D21
104 VMULL.U16 Q15, D20, D8
107 VMLAL.U16 Q14, D20, D10
153 VUZP.16 D20, D21
159 VMULL.U16 Q15, D20, D8
165 VMLAL.U16 Q14, D20, D10
198 VUZP.16 D20, D21
200 VMULL.U16 Q15, D20, D8
204 VMLAL.U16 Q14, D20, D10
256 VUZP.16 D20, D21
[all …]
Dixheaacd_calc_pre_twid.s63 VSHRN.S64 D20, Q10, #32
70 VSUB.I32 D1, D20, D22
Dixheaacd_no_lap1.s71 VUZP.16 D21, D20
101 VUZP.16 D21, D20
Dixheaacd_tns_ar_filter_fixed.s120 VLD1.32 {D20, D21}, [R8]!
226 VMLAL.S32 Q1, D24, D20
270 VMLAL.S32 Q1, D24, D20
316 VMLAL.S32 Q1, D24, D20
413 VLD1.32 {D20, D21}, [R8]!
518 VMLAL.S32 Q1, D24, D20
Dixheaacd_sbr_qmfanal32_winadds.s153 VLD2.16 {D19, D20}, [R3]!
245 VLD2.16 {D19, D20}, [R3]!
Dixheaacd_sbr_qmfanal32_winadds_eld.s133 VLD1.16 {D19, D20}, [R3]! @ tmpQmf_c2[2*(n + 256)] load and incremented
227 VLD1.16 {D19, D20}, [R3]!
/external/libhevc/decoder/arm/
Dihevcd_fmt_conv_420sp_to_rgba8888.s237 VQMOVUN.S16 D20,Q10
242 VZIP.8 D20,D21
251 VST1.32 D20,[R2]!
288 VQMOVUN.S16 D20,Q10
293 VZIP.8 D20,D21
302 VST1.32 D20,[R8]!
368 VQMOVUN.S16 D20,Q10
373 VZIP.8 D20,D21
382 VST1.32 D20,[R2]!
410 VQMOVUN.S16 D20,Q10
[all …]
/external/libhevc/common/arm/
Dihevc_sao_band_offset_chroma.s270 VCLE.U8 D20,D9,D29 @vcle_u8(band_table.val[0], vdup_n_u8(16))
271 VORR.U8 D9,D9,D20 @band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp)
280 VCLE.U8 D20,D9,D29 @vcle_u8(band_table.val[0], vdup_n_u8(16))
281 VAND.U8 D9,D9,D20 @band_table.val[0] = vand_u8(band_table.val[0], au1_cmp)
314 VSUB.I8 D20,D18,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v)
327 …VTBX.8 D18,{D9-D12},D20 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(…
368 VSUB.I8 D20,D18,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v)
379 …VTBX.8 D18,{D9-D12},D20 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(…
Dihevc_resi_trans_32x32_a9q.s204 VSWP D20,D21 @ Q10: 24 23 22 21 20 19 18 17 row 1
447 VMULL.S16 Q1,D20,D4 @o[0][0-3]* R2 -- dual issue
477 VMULL.S16 Q5,D20,D4 @o[0][0-3]* R2
502 VMULL.S16 Q9,D20,D4 @o[0][0-3]* R2 -- dual issue with 2nd cycle
522 VMULL.S16 Q13,D20,D4 @o[0][0-3]* R2
554 VMULL.S16 Q1,D20,D4 @o[0][0-3]* R2
577 VMULL.S16 Q5,D20,D4 @o[0][0-3]* R2 -- dual issue with 2nd cycle
592 VMULL.S16 Q9,D20,D4 @o[0][0-3]* R2
603 VMULL.S16 Q13,D20,D4 @o[0][0-3]* R2
636 VMULL.S16 Q1,D20,D4 @o[0][0-3]* R2
[all …]
Dihevc_sao_edge_offset_class3_chroma.s442 VMOVN.I16 D20,Q10 @I vmovn_s16(pi2_tmp_cur_row.val[0])
543 VLD1.8 D20,[r2] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
547 VTBL.8 D18,{D20},D18 @III vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
551 VTBL.8 D19,{D20},D19 @III vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
596 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0])
671 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0])
809 VLD1.8 D20,[r2] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
819 VTBL.8 D26,{D20},D26 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
821 VTBL.8 D27,{D20},D27 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
985 VLD1.8 D20,[r2] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
[all …]
Dihevc_sao_band_offset_luma.s216 VSUB.I8 D20,D19,D31 @vsub_u8(au1_cur_row, band_pos)
218 …VTBX.8 D19,{D1-D4},D20 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, ba…
Dihevc_sao_edge_offset_class1.s208 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0])
333 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0])
340 VST1.8 {D20},[r10],r1 @vst1q_u8(pu1_src_cpy, pu1_cur_row)
Dihevc_sao_edge_offset_class1_chroma.s218 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0])
359 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0])
370 VST1.8 {D20},[r10],r1 @vst1q_u8(pu1_src_cpy, pu1_cur_row)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Disel-zext-vNi1.ll34 ; CHECK-DAG: r[[D20:([0-9]+:[0-9]+)]] = CONST64(#72340172838076673)
37 ; CHECK: r1:0 = and(r[[D21]],r[[D20]])
/external/swiftshader/third_party/LLVM/test/MC/MachO/
Dx86_64-symbols.s65 D20: label
Dx86_32-symbols.s65 D20: label
/external/llvm/test/MC/MachO/
Dx86_64-symbols.s65 D20: label
Dx86_32-symbols.s65 D20: label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/MachO/
Dx86_64-symbols.s65 D20: label
Dx86_32-symbols.s65 D20: label
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h132 case AArch64::D20: return AArch64::B20; in getBRegFromDReg()
172 case AArch64::B20: return AArch64::D20; in getDRegFromBReg()
/external/llvm/lib/Target/ARM/
DARMBaseRegisterInfo.h69 case D23: case D22: case D21: case D20: in isARMArea3Register()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMBaseRegisterInfo.h82 case D23: case D22: case D21: case D20: in isARMArea3Register()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h132 case AArch64::D20: return AArch64::B20; in getBRegFromDReg()
172 case AArch64::B20: return AArch64::D20; in getDRegFromBReg()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/
DARMBaseInfo.h176 case S20: case D20: return 20; in getARMRegisterNumbering()

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