1.text 2.p2align 2 3.global ixheaacd_sbr_qmfanal32_winadds_eld 4 5ixheaacd_sbr_qmfanal32_winadds_eld: 6 7 STMFD sp!, {R4-R12, R14} 8 LDR R5, [SP, #44] @filterStates 9 LDR R6, [SP, #48] @timeIn 10 LDR R7, [SP, #52] @stride 11 12 MOV R9, R7, LSL #1 13 14 ADD r5, r5, #64 15 MOV r10, #3 16 17LOOP: 18 LDRSH r4 , [R6], r9 19 LDRSH r8 , [R6], r9 20 LDRSH r11 , [R6], r9 21 LDRSH r12 , [R6], r9 22 23 24 STRH r4 , [r5 , #-2]! 25 STRH r8 , [r5 , #-2]! 26 STRH r11 , [r5 , #-2]! 27 STRH r12 , [r5 , #-2]! 28 29 LDRSH r4 , [R6], r9 30 LDRSH r8 , [R6], r9 31 LDRSH r11 , [R6], r9 32 LDRSH r12 , [R6], r9 33 34 35 STRH r4 , [r5 , #-2]! 36 STRH r8 , [r5 , #-2]! 37 STRH r11 , [r5 , #-2]! 38 STRH r12 , [r5 , #-2]! 39 40 41 SUBS r10, r10, #1 42 43 BPL LOOP 44 45 LDR R4, [SP, #40] @winAdd 46 47 MOV R5, #8 48 VLD1.16 D0, [R0]! @tmpQ1[n + 0] load and incremented R0 by 8 49 50 MOV R6, #64 51 MOV R6, R6, LSL #1 @ 52 VLD1.16 {D1, D2}, [R2]! @ tmpQmf_c1[2*(n + 0)] load and incremented 53 54 MOV R7, #244 @ NOT USED further 55 56 MOV R9, R0 57 ADD R0, R0, #120 @ incrementing R0 by 120 + 8 = 128 58 59 MOV R11, R4 @ Mov winAdd to R11 60 VLD1.16 D2, [R0], R6 @ tmpQ1[n + 64] load and incremented by R6 61 ADD R11, R11, #128 @ increment winAdd by 128 62 63 64 MOV R10, R2 @ 65 ADD R2, R2, #112 @ This should be 240 --> 112 66 67 VMULL.S16 Q15, D0, D1 68 VLD1.16 {D3, D4}, [R2]! @ tmpQmf_c1[2*(n + 64)] load and incremented 69 ADD R2, R2, #112 @ This should be 112 70 71 72 VLD1.16 D4, [R0], R6 @ tmpQ1[n + 128] load and incremented by R6 73 VMLAL.S16 Q15, D2, D3 74 75 VLD1.16 {D5, D6}, [R2]! @ tmpQmf_c1[2*(n + 128)] load and incremented 76 SUB R10, R10, #8 77 78 79 ADD R2, R2, #112 @ This should be 112 80 VLD1.16 D6, [R0], R6 @ tmpQ1[n + 192] load and incremented by R6 81 VMLAL.S16 Q15, D4, D5 82 83 VLD1.16 {D7, D8}, [R2]! @ tmpQmf_c1[2*(n + 192)] load and incremented 84 85 86 ADD R2, R2, #112 @ This should be 112 87 VLD1.16 D8, [R0], R6 @ tmpQ1[n + 256] load and incremented by R6 88 VMLAL.S16 Q15, D6, D7 89 90 MOV R0, R9 91 VLD1.16 {D9, D10}, [R2]! @ tmpQmf_c1[2*(n + 256)] load and incremented 92 93 94 ADD R2, R2, #112 @ This should be 112 95 VLD1.16 D10, [R1]! @ tmpQ2[n + 0] load and incremented 96 VMLAL.S16 Q15, D8, D9 97 98 99 100 MOV R9, R1 101 VLD1.16 {D11, D12}, [R3]! @ tmpQmf_c2[2*(n + 0)] load and incremented 102 ADD R1, R1, #120 @ incrementing R1 by 120 + 8 = 128 103 104 105 MOV R2, R10 @ 106 VLD1.16 D12, [R1], R6 @ tmpQ2[n + 64] load and incremented by R6 107 MOV R10, R3 108 109 ADD R3, R3, #112 @ This sholud be 112 110 VLD1.16 {D13, D14}, [R3]! @ tmpQmf_c2[2*(n + 64)] load and incremented 111 ADD R3, R3, #112 @ This sholud be 112 112 113 114 VLD1.16 {D15, D16}, [R3]! @ tmpQmf_c2[2*(n + 128)] load and incremented 115 116 SUB R10, R10, #8 117 118 VLD1.16 D14, [R1], R6 119 ADD R3, R3, #112 @ This should be 112 120 121 122 123 VLD1.16 D16, [R1], R6 124 SUB R5, R5, #1 125 126 VLD1.16 {D17, D18}, [R3]! @ tmpQmf_c2[2*(n + 192)] load and incremented 127 128 129 ADD R3, R3, #112 @ This should be 112 130 VLD1.16 D18, [R1], R6 131 132 MOV R1, R9 133 VLD1.16 {D19, D20}, [R3]! @ tmpQmf_c2[2*(n + 256)] load and incremented 134 135 ADD R3, R3, #112 @ This should be 112 136 137 MOV R3, R10 138 139 140LOOP_1: 141 142 143 VLD1.16 D0, [R0]! 144 145 MOV R9, R0 146 VLD1.16 {D1, D2}, [R2]! 147 ADD R0, R0, #120 148 149 MOV R10, R2 150 VST1.32 {Q15}, [R4]! 151 ADD R2, R2, #112 @ This should be 112 152 153 154 VMULL.S16 Q15, D10, D11 155 VLD1.16 D2, [R0], R6 156 VMLAL.S16 Q15, D12, D13 157 158 VMLAL.S16 Q15, D14, D15 159 VLD1.16 {D3, D4}, [R2]! 160 VMLAL.S16 Q15, D16, D17 161 162 VMLAL.S16 Q15, D18, D19 163 VLD1.16 D4, [R0], R6 164 ADD R2, R2, #112 @ This should be 112 165 166 VST1.32 {Q15}, [R11]! 167 SUB R10, R10, #8 168 169 170 VMULL.S16 Q15, D0, D1 171 VLD1.16 {D5, D6}, [R2]! 172 VMLAL.S16 Q15, D2, D3 173 174 175 176 ADD R2, R2, #112 @ This should be 112 177 VLD1.16 D6, [R0], R6 178 VMLAL.S16 Q15, D4, D5 179 180 VLD1.16 {D7, D8}, [R2]! 181 182 183 ADD R2, R2, #112 @ This should be 112 184 VLD1.16 D8, [R0], R6 185 VMLAL.S16 Q15, D6, D7 186 187 MOV R0, R9 188 VLD1.16 {D9, D10}, [R2]! 189 190 191 192 ADD R2, R2, #112 @ This should be 112 193 VLD1.16 D10, [R1]! 194 MOV R2, R10 195 196 MOV R9, R1 197 VLD1.16 {D11, D12}, [R3]! 198 ADD R1, R1, #120 199 200 201 VMLAL.S16 Q15, D8, D9 202 VLD1.16 D12, [R1], R6 203 MOV R10, R3 204 205 206 ADD R3, R3, #112 @ This should be 112 207 VLD1.16 {D13, D14}, [R3]! 208 ADD R3, R3, #112 @ This should be 112 209 210 211 212 VLD1.16 D14, [R1], R6 213 SUB R10, R10, #8 214 VLD1.16 {D15, D16}, [R3]! 215 ADD R3, R3, #112 @ This should be 112 216 217 218 VLD1.16 D16, [R1], R6 219 VLD1.16 {D17, D18}, [R3]! 220 ADD R3, R3, #112 @ This should be 112 221 222 223 VLD1.16 D18, [R1], R6 224 SUBS R5, R5, #1 225 226 MOV R1, R9 227 VLD1.16 {D19, D20}, [R3]! 228 229 ADD R3, R3, #112 @ This should be 112 230 231 MOV R3, R10 232 233 BGT LOOP_1 234 235 VST1.32 {Q15}, [R4]! 236 VMULL.S16 Q15, D10, D11 237 VMLAL.S16 Q15, D12, D13 238 239 VMLAL.S16 Q15, D14, D15 240 VMLAL.S16 Q15, D16, D17 241 VMLAL.S16 Q15, D18, D19 242 243 VST1.32 {Q15}, [R11]! 244 245 LDMFD sp!, {R4-R12, R15} 246