Searched refs:DstReg64 (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 2725 SDValue DstReg64 = SDValue(DAG.getMachineNode(TargetOpcode::IMPLICIT_DEF, in LowerF64Op() local
2727 DstReg64 = DAG.getTargetInsertSubreg(SP::sub_even, dl, MVT::f64, in LowerF64Op()
2728 DstReg64, Hi32); in LowerF64Op()
2729 DstReg64 = DAG.getTargetInsertSubreg(SP::sub_odd, dl, MVT::f64, in LowerF64Op()
2730 DstReg64, Lo32); in LowerF64Op()
2731 return DstReg64; in LowerF64Op()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 2774 SDValue DstReg64 = SDValue(DAG.getMachineNode(TargetOpcode::IMPLICIT_DEF, in LowerF64Op() local
2776 DstReg64 = DAG.getTargetInsertSubreg(SP::sub_even, dl, MVT::f64, in LowerF64Op()
2777 DstReg64, Hi32); in LowerF64Op()
2778 DstReg64 = DAG.getTargetInsertSubreg(SP::sub_odd, dl, MVT::f64, in LowerF64Op()
2779 DstReg64, Lo32); in LowerF64Op()
2780 return DstReg64; in LowerF64Op()
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