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Searched refs:DstRegs (Results 1 – 7 of 7) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/
DLegalizerHelper.cpp288 SmallVector<unsigned, 2> DstRegs; in narrowScalar() local
290 DstRegs.push_back( in narrowScalar()
292 MIRBuilder.buildMerge(MI.getOperand(0).getReg(), DstRegs); in narrowScalar()
304 SmallVector<unsigned, 2> Src1Regs, Src2Regs, DstRegs; in narrowScalar() local
318 DstRegs.push_back(DstReg); in narrowScalar()
322 MIRBuilder.buildMerge(DstReg, DstRegs); in narrowScalar()
337 SmallVector<unsigned, 2> SrcRegs, DstRegs; in narrowScalar() local
352 DstRegs.push_back(SrcRegs[i]); in narrowScalar()
375 DstRegs.push_back(SegReg); in narrowScalar()
378 MIRBuilder.buildMerge(MI.getOperand(0).getReg(), DstRegs); in narrowScalar()
[all …]
DIRTranslator.cpp512 auto &DstRegs = allocateVRegs(U); in translateExtractValue() local
514 for (unsigned i = 0; i < DstRegs.size(); ++i) in translateExtractValue()
515 DstRegs[i] = SrcRegs[Idx++]; in translateExtractValue()
524 auto &DstRegs = allocateVRegs(U); in translateInsertValue() local
530 for (unsigned i = 0; i < DstRegs.size(); ++i) { in translateInsertValue()
532 DstRegs[i] = *InsertedIt++; in translateInsertValue()
534 DstRegs[i] = SrcRegs[i]; in translateInsertValue()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/
DLegalizationArtifactCombiner.h163 SmallVector<unsigned, 2> DstRegs; in tryCombineMerges() local
166 DstRegs.push_back(MI.getOperand(DefIdx).getReg()); in tryCombineMerges()
168 Builder.buildUnmerge(DstRegs, MergeI->getOperand(Idx + 1).getReg()); in tryCombineMerges()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DR600ControlFlowFinalizer.cpp298 std::set<unsigned> &DstRegs) const { in isCompatibleWithClause()
325 if ((DstRegs.find(SrcMI) == DstRegs.end())) { in isCompatibleWithClause()
326 DstRegs.insert(DstMI); in isCompatibleWithClause()
339 std::set<unsigned> DstRegs; in MakeFetchClause() local
348 if (!isCompatibleWithClause(*I, DstRegs)) in MakeFetchClause()
/external/llvm/lib/Target/AMDGPU/
DR600ControlFlowFinalizer.cpp282 std::set<unsigned> &DstRegs) const { in isCompatibleWithClause()
309 if ((DstRegs.find(SrcMI) == DstRegs.end())) { in isCompatibleWithClause()
310 DstRegs.insert(DstMI); in isCompatibleWithClause()
323 std::set<unsigned> DstRegs; in MakeFetchClause() local
332 if (!isCompatibleWithClause(*I, DstRegs)) in MakeFetchClause()
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.cpp826 SmallSet<unsigned, 4> DstRegs; in copyPhysReg() local
833 assert(!DstRegs.count(Src) && "destructive vector copy"); in copyPhysReg()
834 DstRegs.insert(Dst); in copyPhysReg()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.cpp913 SmallSet<unsigned, 4> DstRegs; in copyPhysReg() local
920 assert(!DstRegs.count(Src) && "destructive vector copy"); in copyPhysReg()
921 DstRegs.insert(Dst); in copyPhysReg()